Sr. Soc Power Engineer, Annapurna Labs - Cloud Scale Machine Learning

Amazon Amazon · Big Tech · Cupertino, CA · Applied Science

This role is for a Sr. SoC Power Engineer focused on developing and optimizing the power consumption of machine learning accelerators (Inferentia and Trainium SoCs). The engineer will be responsible for power analysis and modeling from RTL to netlist, working with various design teams, and making lab measurements. While the SoCs are for ML workloads, the role itself is focused on hardware engineering (power analysis) rather than AI/ML model development or deployment.

What you'd actually do

  1. Responsible for full chip power analysis & modelling at various stages of design (RTL to gate level netlist)
  2. Develop and maintain dashboards for power rollups
  3. Work with designers, architects, Verification engineers and Physical Design engineers to develop vectors for IR analysis, Thermal analysis and power estimation
  4. Give feedback to designers and architects on how to reduce power
  5. Make power measurements in the lab and correlate back to simulations.

Skills

Required

  • Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or related fields
  • BS + 6yrs or MS + 5yrs or PhD + 3yr in EE/CS
  • Expert on power analysis tools like PrimePower, PowerArtist or similar
  • Deep, circuit-level understanding of chip power
  • Ability to give feedback to RTL designers and Physical Designers on how to reduce power
  • Highly proficient with scripting language (Tcl, Perl, Python or similar)
  • Good understanding of Physical Design, EM/IR, Power Integrity, and Thermal at the die, package, board, and server level
  • Some experience with lab equipment and capable of doing lab power analysis

Nice to have

  • Master's degree in Computer Science, Computer Engineering, or Electrical Engineering
  • Familiarity with Make or similar for automation of power rollups
  • Experience with RTL design (System verilog)
  • Familiarity with EMIR analysis tools (Redhawk / Voltus)
  • Experience with Zebu Emulator platform

What the JD emphasized

  • proven track record of handling challenges at scale
  • Expert on power analysis tools like PrimePower, PowerArtist or similar
  • Deep, circuit-level understanding of chip power
  • Ability to give feedback to RTL designers and Physical Designers on how to reduce power