Sr. Staff ML Engineer, Quantization & Compression

Rivian Rivian · Auto · Palo Alto, CA · Mechanical & Electrical Engineering

This role focuses on optimizing quantized deep learning models for hardware acceleration in autonomous systems, bridging perception model design and hardware-aware deployment for embedded platforms. The engineer will research state-of-the-art perception models and develop optimization pipelines for quantized versions to achieve real-time performance and energy efficiency on custom accelerators.

What you'd actually do

  1. Research state of the art perception models in collaboration with the ADAS SW teams
  2. Lead the development of optimizations for mapping quantized perception models (e.g., CNNs, Transformers, LLMs) to embedded and heterogeneous hardware platforms.
  3. Design and implement hardware-aware optimizations, including quantization strategies, model compression, memory-efficient representations, and operator fusion, targeted to custom accelerators.
  4. Collaborate with hardware teams to co-optimize model architecture and compute pipeline under real-time constraints (latency, throughput, power).
  5. Benchmark and analyze system performance across platforms and iterate to achieve optimal deployment efficiency.

Skills

Required

  • Ph.D. or M.S. in Computer Engineering, Electrical Engineering, Computer Science, or related field with a focus on ML compilers, embedded systems, or hardware-aware AI.
  • Hands-on experience with quantized model deployment, ML design stacks, and code generation for embedded or heterogeneous compute systems.
  • Strong understanding of computer vision models (e.g., object detection, segmentation) and their optimization for edge inference.
  • Proficiency in deep learning frameworks (e.g., PyTorch, TensorFlow) and their low-level IRs or export formats (e.g., ONNX).
  • Solid programming skills in C++, Python
  • Familiarity with CUDA/OpenCL (or other accelerator programming models).

Nice to have

  • Prior experience working with hardware-software co-design, especially for autonomous or robotics platforms.
  • Deep knowledge of numerical precision trade-offs, quantization-aware training (QAT), and dynamic/static quantization flows
  • Familiarity with embedded real-time constraints and hardware profiling/debugging tools.
  • Familiarity with rearchitecting models to best suit hardware capabilities.
  • Publication record in top-tier ML/Systems conferences (e.g., MLSys, NeurIPS, DAC, ICCAD).

What the JD emphasized

  • hardware acceleration
  • embedded compute platforms
  • real-time performance
  • energy efficiency
  • quantized perception models
  • custom accelerators
  • real-time constraints
  • hardware-aware optimizations
  • quantized model deployment
  • edge inference
  • embedded real-time constraints

Other signals

  • quantized deep learning models
  • hardware acceleration
  • embedded compute platforms
  • real-time performance
  • energy efficiency