Staff Design Verification Engineer

AMD AMD · Semiconductors · Penang, Malaysia · Engineering

Staff Design Verification Engineer at AMD in Penang, Malaysia. The role involves working on next-generation SoCs, focusing on the Design and Verification of critical components. Responsibilities include understanding and defining verification requirements, owning functional verification from test planning to debug and sign-off, and implementing test benches using UVM methodology. Requires advanced knowledge of ASIC design and verification flows, Verilog, System Verilog, UVM, and power-aware simulation. Familiarity with industry standard interconnects and protocols is preferred. Strong analytical and problem-solving skills are essential. The role mentions 'Strong AI coding and debugging experience' as a preferred experience.

What you'd actually do

  1. Own or be involved in all aspects of the functional verification from initial test planning, test creation, and debug. to coverage and sign-off closure, while providing technical leadership to the team.
  2. Own verification of high-speed, low-power digital designs at the IP and System level using both coverage-driven constraints, random, and directed testing techniques, as well as formal verification.
  3. Implement test benches and components, such as test and sequence libraries, monitors, models, and BFMs, using object-oriented verification techniques aligned with the UVM methodology.

Skills

Required

  • Verilog
  • System Verilog
  • UVM
  • power-aware simulation
  • firmware/hardware co-verification
  • AMBA (AXI, APB, AHB)
  • ACPI
  • GPIO
  • CLK
  • UART/DMA
  • SPI/eSPI
  • I2C/I3C
  • USB
  • PCIE
  • analytical and problem-solving skills
  • attention to detail
  • independently driving tasks
  • organized and timely manner
  • excellent quality

Nice to have

  • AI coding and debugging experience

What the JD emphasized

  • Strong AI coding and debugging experience