Staff Engineer Digital Osvvm Verification

Northrop Grumman Northrop Grumman · Aerospace · San Diego, CA +1 · Engineering Mult-Func

This role focuses on FPGA verification using VHDL and OSVVM for digital designs in multi-function software-defined radios for military applications. It requires experience with EDA tools and board/system level debug.

What you'd actually do

  1. Experience with developing verification plans, test benches, and verification components using OSVVM.
  2. Hands on experience in VHDL design, verification, simulation, and testing of AMD and/or Intel FPGAs.
  3. Experience with Electronic Design Automation (EDA) Tools for FPGA Development: Vivado, Quartus, Questa Simulator.
  4. Demonstrated ability to work independently, taking initiative to complete tasks with minimal supervision while contributing to team success.
  5. Experience with board or system level debug using common test equipment.

Skills

Required

  • FPGA Verification
  • VHDL
  • OSVVM
  • EDA Tools (Vivado, Quartus, Questa Simulator)
  • Board/System Level Debug
  • DOD Secret Clearance

Nice to have

  • Physical constraints
  • Timing constraints
  • Timing closure
  • FPGA requirements development
  • Design-assurance deliverables
  • Technical data packages
  • Multilayer board design
  • High-speed interfaces
  • RF communication systems

What the JD emphasized

  • Must have the ability to obtain and maintain DOD Secret Clearance.
  • CLEARANCE REQUIRED FOR START: Yes
  • CLEARANCE TYPE: Secret