Staff Soc Dft Engineer

Intel Intel · Semiconductors · Penang, Malaysia

Staff SOC DFT Engineer responsible for the testability, debuggability, and reliability of complex SoC designs. This role involves developing DFT methodologies, optimizing workflows with AI, and enhancing post-silicon efficiency. The engineer will collaborate with cross-functional teams and ensure products meet quality standards.

What you'd actually do

  1. Develop and implement advanced DFT methodologies for complex SoC designs to maximize test coverage and efficiency.
  2. Collaborate with design, verification, and manufacturing teams to define and optimize post silicon strategies and requirements.
  3. Integrate DFT/DFD features into RTL and ensure verification of design for testability requirements.
  4. Collaborate with post-silicon teams to debug and validate DFT features.
  5. Stay current with emerging trends, AI adoption and technologies in DFT/DFD to ensure best practices are incorporated into workflows.

Skills

Required

  • DFT
  • SoC design
  • RTL design
  • Verilog
  • VHDL
  • SystemVerilog

Nice to have

  • AI application
  • advanced DFT methods
  • low-power SoC designs
  • high-performance SoC designs
  • IEEE 1687 (IJTAG)
  • 1149.1 (JTAG)
  • IEEE 1500 (Core Test)
  • Synopsys DFT Compiler
  • Mentor Tessent
  • Cadence Modus
  • Python
  • scripting languages
  • managing multi-functional teams
  • complex SoC projects

What the JD emphasized

  • 5+ years of experience