Standard Cell Design Engineer

Intel Intel · Semiconductors · Penang, Malaysia

Standard Cell Design Engineer responsible for the delivery of standard cell library collaterals, including power integrity and reliability libraries, using advanced CMOS technologies. The role involves driving characterization methodology, ensuring library quality, debugging implementation issues, and collaborating with cross-functional teams.

What you'd actually do

  1. Own the delivery of standard cell library collaterals including power integrity library (apl, pgv), reliability library (emt, mtv) and other related library deliverables.
  2. Drive library characterization methodology and establish robust quality checks to ensure consistency across EDA tools and industry-standard requirements.
  3. Ensure library quality, consistency, and usability across downstream implementation flows.
  4. Debug implementation issues reported by design teams and develop effective, innovative solutions.
  5. Collaborate closely with cross-functional teams, including design, characterization, CAD, PDK to support smooth library development and release cycles.

Skills

Required

  • standard cell library development
  • reliability analysis and verification
  • EDA tools for IR drop and reliability analysis (Primelib, Primesim EMIR, RedHawk, Totem)
  • implementation tools (Voltus, RedHawk Seascape)
  • scripting languages (TCL, Perl, Python, shell scripting)

Nice to have

  • foundry or chip design with advanced CMOS technologies