Synthesis Sta Lead

AMD AMD · Semiconductors · Bangalore, India · Engineering

This role is for a Senior Member of Technical Staff (SMTS) Silicon Design Engineer in the NBIO IP Physical Aware group at AMD. The primary responsibilities involve synthesis, Static Timing Analysis (STA), constraint development, and physical-aware activities like floorplanning and placement. The role also includes leading junior team members. While the company mentions AI and data centers, the core responsibilities of this specific role are in silicon design and verification, not AI/ML model development or deployment.

What you'd actually do

  1. Synthesis of Complex IPs & High speed IPs, constraint developement.
  2. Strong handson on Synthesis , STA.
  3. Strong handson on constraints
  4. Good hands on conformal flow, LEC
  5. Develop feedback to RTL team for physically driven microarchirtecture changes, Manage data for shared design across multiple projects.

Skills

Required

  • Synthesis
  • STA
  • Constraints development
  • Conformal flow
  • LEC

Nice to have

  • Physical design
  • STA
  • Synthesis design cycle