System Validation Engineer

Intel Intel · Semiconductors · Haifa, Israel

System Validation Engineer at Intel responsible for defining, developing, and performing functional validation for Thunderbolt technology. This involves engaging from early product stages to define HW/FW hooks, developing methodologies and test plans, executing plans, and collaborating with engineers for design optimization, troubleshooting, and failure analysis. The role requires FPGA and Silicon debug, understanding the full stack (HW/FW, driver, OS), and applying various tools and techniques to ensure validation coverage. The engineer will publish validation reports, work with cross-functional teams (architecture, design, verification, etc.) to improve debug and validation strategies, and develop content for IP interactions. The role also involves engaging in all product life cycle phases, developing and validating content and infrastructure, and performing bug hunts in simulation, emulation, and FPGAs to ensure silicon readiness.

What you'd actually do

  1. Defines, develops, and performs functional validation for Thunderbolt technology which involves multiple protocols and system level features.
  2. Engage from early stages of the product to define HW/FW hooks for validation, develop validation methodologies, validation test plans, execute validation plans and collaboration with other engineers for design optimization troubleshooting, and failure analysis.
  3. Perform FPGA and Silicon debug to identify root causes and resolves all functional failures.
  4. Understand all the stack from HW/FW, driver and OS in order validate all the system level flows.
  5. Applies various hardware and software level tools and techniques to ensure validation coverage of the product

Skills

Required

  • BSc in computer Science/Electrical Engineering
  • System-level validation experience
  • Thunderbolt technology
  • HW/FW hooks
  • validation methodologies
  • validation test plans
  • FPGA debug
  • Silicon debug
  • driver and OS understanding
  • hardware and software level tools

Nice to have

  • Background in post-Silicon validation
  • Knowledge in PCIe protocol

What the JD emphasized

  • System-level validation experience
  • Post-Silicon validation