Technical Program Manager – GPU Floorplanning

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

Technical Program Manager for GPU Floorplanning at NVIDIA, focusing on driving execution of large, complex multi-die SoC and chiplet programs. Requires deep technical understanding of physical design and system-level trade-offs, program management rigor, and cross-functional collaboration.

What you'd actually do

  1. Own and drive end‑to‑end execution tracking for large‑scale GPU / SoC floorplan programs across multiple dies and chiplets.
  2. Build and maintain integrated program views spanning breakthroughs, dependencies, risks, and cross‑team interactions.
  3. Ensure plans from multiple chiplet / die owners roll up into a cohesive, executable project‑level view.
  4. Partner closely with floorplan and technical leads to identify, track, and prioritize critical technical issues impacting area, wiring, timing, and schedule.
  5. Proactively identify execution risks, misalignment, and early warning signals across the program.

Skills

Required

  • Bachelor’s degree in Electrical Engineering, Computer Engineering or equivalent experience
  • 10+ years of relevant working experience
  • Strong program or technical project management experience in complex hardware or silicon development programs
  • Proven ability to manage highly interdependent, multi‑threaded execution across multiple partners
  • Sufficient technical depth to understand and engage on topics such as SoC architecture, physical design flows, floorplanning, or chip integration
  • Excellent written and verbal communication skills

Nice to have

  • Prior experience supporting floorplan, physical design, chip integration, or early silicon planning teams
  • Experience working on multi‑die, chiplet‑based, or large SoC programs
  • Ability to operate effectively in environments with incomplete data, evolving requirements, and tight milestones
  • Strong judgment in prioritization

What the JD emphasized

  • 10+ years of relevant working experience
  • Strong program or technical project management experience in complex hardware or silicon development programs
  • Proven ability to manage highly interdependent, multi‑threaded execution across multiple partners
  • Sufficient technical depth to understand and engage on topics such as SoC architecture, physical design flows, floorplanning, or chip integration