Vlsi Rtl Design Engineer

AMD AMD · Semiconductors · Fort Collins, CO · Engineering

The role is for a VLSI RTL design engineer focused on designing high-performance, energy-efficient cache and fabric designs for AMD's CPU cores. Responsibilities include collaborating with architects, physical design, verification, and DFT teams, and solving complex design and tool problems. Prior experience with SRAM, Coherent Cache, interconnect/NOC RTL design, Digital RTL Design, Verilog HDL, Software Development, and Scripting is preferred.

What you'd actually do

  1. Collaborate with Cache and CPU Architects to design, document, and execute optimized high-performance Cache and Routing Fabric designs.
  2. Collaborate with Physical Design to develop RTL that is optimized for physical construction and timing closure.
  3. Collaborate with Design Verification to develop architecture and features that are documented clearly and are verifiable.
  4. Collaborate with Design For Test teams to develop RTL that is reliable, testable, and manufacturable.
  5. Work across global teams to solve complex architectural interactions between IP and SOC designs

Skills

Required

  • BS/MS in EE, CS, CSE (or similar), plus 3+ years hardware design experience
  • Verilog HDL
  • Digital RTL Design

Nice to have

  • SRAM
  • Coherent Cache
  • interconnect/NOC RTL design
  • Software Development
  • Scripting

What the JD emphasized

  • invent and implement the highest performance, most energy efficient cache and fabric designs in the industry
  • push the envelope on chip performance
  • Solve design and tool problems requiring ground-breaking approaches and champion innovation across the organization