Intel

Intel is seeking a Compiler Engineer to develop and advance their open-source compiler stack (LLVM.org) for CPUs and GPUs, focusing on high-performance computing and AI workloads. The role involves setting technical direction, designing language extensions, and optimizing compiler performance for heterogeneous architectures.

Firmware Development Engineer role focused on creating foundational software that interfaces directly with hardware components, including microcode, IP-specific firmware, FPGA, and DSPs. Responsibilities include design, implementation, testing, and validation of these interfaces. Requires C and System Software experience, with preferred experience in C++, Rust, System C, Python, and knowledge of embedded systems and SoC architecture.

This is an ASIC Design Automation Engineering Intern role focused on developing and enhancing automation scripts and tools for front-end RTL design and verification processes in the semiconductor industry. The role involves debugging, problem-solving, and collaborating with design teams, utilizing scripting languages and industry-standard EDA tools.

This role is for an ASIC Design Emulation Engineer focused on next-generation System-on-Chip (SoC) technologies. The engineer will work on verification processes using industry-leading EDA tools and methodologies to simulate and validate designs against ASIC specifications. The position requires a student pursuing a Bachelor's degree in Electrical or Computer Engineering with a foundation in digital design verification, HVL languages, programming languages, scripting, and EDA simulation tools.

This is an internship role for ASIC Design & Verification Engineering, focusing on next-generation System-on-Chip (SoC) technologies. The intern will work with industry-leading EDA tools and methodologies, contributing to high-impact projects in semiconductor design. Responsibilities include debugging, problem-solving, and teamwork. Qualifications include a strong foundation in digital design verification (System Verilog, VHDL), object-oriented programming, and scripting languages.

Principal Analog Circuit Design Engineer with expertise in high-speed SerDes applications, focusing on design, development, and verification of analog circuits in advanced process nodes. The role involves floorplanning, circuit design, parameter extraction, simulation, test plan creation, and optimization for power, performance, area, timing, and yield. Requires strong foundational knowledge of analog design principles and hands-on experience with advanced FinFET CMOS processes and simulation tools. The principal engineer is expected to influence technical direction, mentor junior engineers, and drive technical strategy.

Principal Analog Circuit Design Engineer to lead the design and validation of cutting-edge analog circuits for high-speed (112G and 224G) SerDes applications. Requires expertise in PLL, CDR, CTLE, DFE, ADC, or TX design, and experience with advanced FinFET CMOS technologies. Role involves technical direction, mentorship, and cross-functional collaboration.

Compiler Engineer role at Intel focusing on developing and maintaining an LLVM-based compiler stack (C, C++, SYCL, Fortran) for Intel processor platforms, impacting AI and HPC. Requires strong C/C++ and LLVM experience, with collaboration in open-source communities and with hardware teams.

Senior Verification Engineer role focused on ASIC/FPGA design verification using UVM, formal methods, and coverage-driven techniques. Responsibilities include defining verification strategy, leading execution, debugging, and mentoring junior engineers. Requires 5+ years of experience in ASIC/FPGA verification.

Develops logic design, RTL coding, and simulation for AI SoC development, focusing on power, performance, area, and timing goals. Integrates IP blocks, performs quality checks, and supports silicon bring-up.

Senior Staff Analog Design Engineer focused on high-speed SerDes applications (112G and 224G) for data centers, AI infrastructure, and communication networks. Responsibilities include designing analog blocks, collaborating with cross-functional teams, leading validation and optimization, and mentoring junior engineers. Requires Master's degree, 5+ years of analog/mixed-signal design experience, and expertise in specific analog domains and simulation tools. Preferred qualifications include a Ph.D., more experience, and knowledge of next-gen standards and system-level modeling.

Senior Pre-Silicon Verification Engineer specializing in mixed-signal verification for semiconductor designs. Responsibilities include developing verification strategies, creating behavioral models, executing verification plans, and debugging pre-silicon environments.