Currently tracking 22 active AI roles, down 23% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $100k–$500k (avg $300k).
| Title | Stage | AI score |
|---|---|---|
| ML Engineer, AI Models ML Engineer focused on bringing up, validating, and optimizing AI models (LLMs, CNNs, recommendation, vision) on Tenstorrent's hardware and simulators. This role involves porting models into Tenstorrent toolchains, running experiments for accuracy/performance/stability, and debugging cross-stack issues with hardware, compiler, and runtime teams. | Serve | 8 |
| Staff Engineer, SoC RTL Engineer Tenstorrent is seeking a Staff Digital Design Engineer to define, build, and optimize high-performance chiplet-based SoC architectures. The role involves RTL development, microarchitecture, and performance/power optimization for AI hardware. | — | 0 |
| Senior Physical Design Engineer Senior Physical Design Engineer for Tenstorrent's AIDC Yayoi project, focusing on chiplet-level and chip-top physical implementation of high-performance CPU-based SoCs in a system-in-package environment. Requires extensive experience in SoC/ASIC/GPU/CPU physical design, proficiency with industry-standard tools, and scripting skills. |
| — |
| 0 |
| Power Design Engineer Tenstorrent is an AI company seeking a Power Design Engineer to focus on power analysis and optimization for CPU chiplets. The role involves defining power strategies, managing power vectors, driving analysis on RTL and netlist using tools like Joules and PrimePower, and collaborating with various design teams. While the company is in the AI space, this specific role is focused on semiconductor design (CPU power) rather than direct AI/ML model development or deployment. | — | 0 |
| Program Manager Program Manager for a talent development initiative in the semiconductor industry, in partnership with a government agency. Focuses on project leadership, financial oversight, and cross-functional coordination to train semiconductor design engineers. | — | 0 |
| Verification Engineer Tenstorrent is seeking a Verification Engineer in Tokyo to ensure the functionality and performance of their System-in-package, which integrates multiple chiplets. The role involves verifying digital IP and SoC logic, building verification infrastructure, creating testbenches, and collaborating with global teams. Experience in CPU or SoC verification and knowledge of Verilog/System Verilog are required. | — | 0 |
| Senior DFT Engineer, Architecture Tenstorrent is seeking a Senior DFT Engineer to design and integrate chiplets into a System-in-package, focusing on DFT implementation for high-speed CPU core design. Responsibilities include building chip-level DFT strategies, inserting test features, collaborating with cross-functional teams, scripting EDA tools, and supporting silicon bring-up. | — | 0 |