Tenstorrent

Role focuses on analyzing and optimizing AI workloads on hardware architecture (Tensix) to improve performance, power, and area. Involves developing performance models, simulators, and collaborating with RTL, Compiler, and Runtime teams. Connects architecture, software, and RTL for next-gen AI systems.

Machine Learning Engineer focused on bringing advanced LLMs and vision models to life on custom AI hardware, involving porting, tuning, and validating models for performance and efficiency.

Software Engineer role focused on developing and optimizing an MLIR-based AI compiler (TT-Forge) to run AI models efficiently on Tenstorrent hardware. Involves optimizing computational graphs, creating custom dialects, and transformation passes, with a focus on training and multi-chip scaling.

C++ Machine Learning Engineer focused on extending and optimizing the ML training framework for custom silicon, debugging model performance, and supporting production integration.

Sr. Engineer, Software - AI Compiler role at Tenstorrent focused on developing TT-Forge, an MLIR-based compiler for Tenstorrent hardware, optimizing AI models for training and inference.

Staff Technical Program Manager responsible for end-to-end delivery of AI model IP and supporting software (compiler outputs, runtime libraries, model artifacts, hardware collateral) into customer environments. This role involves defining release criteria, aligning cross-functional teams (hardware, compiler, runtime, kernel, legal), identifying and mitigating integration risks, and providing leadership visibility on deployment status. The role bridges customer requirements with engineering realities, focusing on AI systems and IP delivery at scale.

This role focuses on integrating and optimizing AI/HPC software stacks on RISC-V processors, specifically leading the bring-up of a RISC-V-native agentic AI software stack including runtime orchestration and distributed execution frameworks. The engineer will work closely with hardware architects and compiler engineers to align software capabilities with RISC-V features, operating at the hardware-software boundary.

The role focuses on architecting and building scalable cycle-accurate AI accelerator performance models to inform hardware design and optimization. This involves defining abstraction layers, leading performance modeling, and integrating models into larger simulation environments.

The role involves architecting, integrating, and deploying AI/ML-driven solutions into production physical design flows for advanced semiconductor nodes. This includes creating custom CAD tools and optimizing EDA tools using data-driven and ML-based techniques to improve PPA and runtime. The engineer will also develop and enhance RTL-to-GDS methodologies.

Sr. Engineer, Kernel Development and Optimization at Tenstorrent, focusing on designing, implementing, and optimizing performance-critical kernels for AI hardware, including matrix multiplication and attention primitives. The role involves host-side orchestration, parallelization, developing benchmarks and tests, and collaborating with compiler, runtime, ML, and hardware teams to integrate kernels into production systems. Experience with C++, low-level software, concurrency, and data-driven optimization is required.

Software Engineer focused on developing and optimizing performance-critical kernels for AI hardware, targeting ML and HPC workloads. This role involves C++ systems engineering, low-level optimization, and close collaboration with hardware and software teams.

Software Engineer on the Metal Runtime team working on low-level software for AI accelerators, focusing on scheduling, memory movement, and efficient execution across parallel processors. The role involves building and optimizing high-performance runtime systems close to the hardware.

The role focuses on optimizing the energy efficiency of RISC-V based CPUs and AI Data Centers for Tenstorrent, a company at the forefront of AI technology. The Power Architect will be responsible for power management, SoC power architecture, power delivery networks, thermal analysis, and performance trade-offs, with a specific emphasis on analyzing AI and ML workloads for performance and efficiency. This is a hybrid role based in Santa Clara, CA, with opportunities for growth and impact in the AI hardware design space.

The role focuses on developing software for state-of-the-art AI inferencing on Tenstorrent's hardware, including designing APIs, deploying workloads, and benchmarking inference speed. It involves optimizing end-to-end ML inference on custom silicon and building scalable software interfaces.

Software Engineer role focused on developing and scaling an MLIR-based AI compiler (TT-Forge) for Tenstorrent, involving graph transformations, lowering passes, and kernel optimizations to support both training and inference on custom chip architectures.

Software Engineer role focused on developing and optimizing distributed software systems for AI and HPC clusters, specifically for distributed inference and training infrastructure. Requires strong C/C++ systems programming, distributed computing principles, and experience with MPI-based technologies.

Software Engineer role focused on building and optimizing TT-Fabric, a low-level networking library for Tenstorrent's AI compute clusters. The role involves architecting, implementing, and maintaining the networking layer that connects thousands of AI processors for distributed training and inference, optimizing protocols and data movement for maximum hardware performance.

Lead a team of Verification Engineers to validate the functionality and performance of next-generation AI hardware, focusing on AI-specific data types, compute patterns, and on-chip network validation.

Software Engineer role focused on developing and optimizing Tenstorrent's MLIR-based AI compiler (TT-Forge) to run AI models efficiently on Tenstorrent hardware. Responsibilities include optimizing computational graphs, creating custom dialects and transformation passes, and potentially developing human-in-the-loop tuning tools.

Tenstorrent is seeking a Physical Design Engineer to implement high-performance partitions for an AI SOC. The role involves owning the complete implementation flow from synthesis to tapeout, working with architects, RTL designers, and DFT engineers to resolve issues and ensure signoff.

Physical Design Engineer to implement high-performance blocks for CPU and AI/ML architectures, owning the complete implementation flow from synthesis to tapeout. Requires expertise in SOC/ASIC physical design, synthesis, PnR, timing closure, and industry-standard tools.

Develop and optimize the software stack for AI and RISC-V hardware IP customers, including firmware, drivers, system tools, and APIs, ensuring seamless integration and customer experience. Partner with hardware, IP delivery, customer support, and product teams.

Field Application Engineer role focused on customer success and driving adoption of Tenstorrent's AI products and solutions. Requires strong technical knowledge in AI/ML, customer-facing skills, and experience with AI technologies and frameworks, embedded systems, and AI accelerators. The role involves collaborating with sales and product teams, understanding customer challenges, and providing solutions. Experience with hardware/software co-optimization for edge inference is important.

Tenstorrent is seeking a Senior Engineer, System-Level Design Verification to validate full-system behavior of AI silicon, ensuring reliable and scalable performance in real workloads. The role involves validating system connectivity, coherency, and functionality across large distributed compute platforms, and measuring/tuning performance for end-to-end AI workloads.

Director of Customer Engineering role at Tenstorrent, focusing on managing technical relationships with strategic customers and FAEs to translate their silicon needs into precise requirements for hardware and software teams. The role involves connecting customer architectures to Tenstorrent platforms for efficient model execution on their silicon, and overseeing RTL changes and customization for customer-specific AI silicon.

Experienced Technical Recruiter for an AI company, focusing on hiring deeply technical roles in AI, ML, systems, hardware, or infrastructure. The role involves full-cycle ownership, proactive sourcing, and acting as a trusted advisor to hiring managers.

Site Reliability Engineer role focused on ensuring the reliability, observability, and production readiness of Tenstorrent's large-scale AI systems, both internal and customer-facing. This involves troubleshooting, monitoring, automation, and partnering with engineering teams and customers.

This role focuses on designing and operating Kubernetes-based platforms on on-prem data centers, enabling engineers and customers to run workloads efficiently on Tenstorrent hardware. The team builds platforms that power internal development, workload orchestration, and hardware allocation across large-scale AI systems.

Regional Sales Lead for Tenstorrent in Singapore, focusing on building customer relationships and driving new business for AI and compute solutions. This role requires technical understanding to position hardware and IP solutions effectively and achieve revenue targets.

This role focuses on post-silicon power characterization and correlation for AI semiconductor products. The engineer will develop and execute power measurement strategies, analyze results against pre-silicon models, and collaborate with design, architecture, validation, and systems teams to ensure power and performance specifications are met. The role involves hands-on lab work with measurement tools and scripting, with opportunities to learn about AI SoC behavior and cross-functional collaboration.

Software Engineer on the Metal Runtime team at Tenstorrent, working on low-level software for AI accelerators. Designs runtime systems close to hardware and defines host/device APIs. Focuses on API design, abstraction, performance, and developer experience.

Tenstorrent is seeking an Infrastructure and Platform Development Engineer to build and maintain platforms for AI development workflows, workload orchestration, and ML services. This role involves productionizing and scaling Kubernetes-based platforms, integrating automation, and supporting large-scale on-prem and customer-facing environments on custom AI hardware.

This role supports hardware emulation infrastructure and internal chip design teams by integrating transactors, developing Python test frameworks, and providing technical support. It requires proficiency in Python, C++, and SystemVerilog, with experience in chip design, verification, or emulation. The role also involves using AI tools for code generation and debugging.

This role focuses on Static Timing Analysis (STA) methodology for advanced-node, high-performance, low-power semiconductor designs. The engineer will lead the development and optimization of STA methodologies and flows, drive data- and ML-assisted timing automation, and collaborate with various teams and EDA vendors to solve complex timing challenges. The role involves improving PPA (Power, Performance, Area) and runtime efficiency through automation and data-driven techniques.

Field Application Engineer focused on deploying and optimizing Tenstorrent's AI hardware and software solutions for enterprise customers in the EMEA region. This role involves system-level problem solving, customer relationship management, and acting as a liaison between customers and engineering teams.

Seeking a Senior High Speed Interconnect / Signal Integrity Engineer to design and validate high-bandwidth links for large-scale AI systems, focusing on interconnect solutions across copper and optical technologies for next-generation AI inference and training clusters.

This role focuses on designing and building next-generation CPU networking architecture for AI/ML workloads, targeting both datacenter and robotics/automotive applications. The primary focus is on the interconnect and compute aspects that enable AI systems, rather than directly building AI models.

Staff Software Engineer focused on cloud infrastructure, SRE, and DevOps to support AI technology development. Responsibilities include infrastructure automation, integration, operations, backend development, and IaC, leveraging tools like Python, Ansible, Prometheus, and Kubernetes. The role will utilize AI tools and collaborate with AI/ML experts.

Tenstorrent is seeking an Automotive and Robotics SoC Architect to define system architectures for next-generation automotive applications, unifying CPU and AI technologies. This senior role requires expertise in safety-critical systems, hardware/software co-design, and automotive standards to ensure high performance, safety, and reliability. The position involves shaping architectural direction and collaborating across teams to deliver world-class automotive solutions.

Director of Systems & Solutions at Tenstorrent, focusing on deploying and optimizing AI hardware and computer systems. The role involves leading a team, working with customers, and understanding hardware architecture, Linux, and system software. It emphasizes hands-on technical detail and scaling customer adoption of next-generation AI and HPC hardware.

Field Applications Engineer for Tenstorrent's RISC-V CPU and AI accelerator IP products. Responsible for end-to-end technical engagements with customers, translating architectural advantages into wins, and shaping product roadmap with market feedback. Requires deep technical expertise in semiconductors and customer engagement skills.

This role focuses on porting and enabling AI workloads on RISC-V architectures, requiring expertise in DevOps, workload migration, and systems software to optimize hardware performance for AI applications. It involves bridging the gap between IT, DevOps, and AI teams.

This role is an AI Processor IP Product Engineer who acts as a technical bridge between Tenstorrent's AI processor technology and customer success. The engineer will guide customers in integrating AI processors, RISC-V CPUs, and chiplet solutions into their SoCs, focusing on optimal performance and accelerated time-to-market. The role requires expertise in ASIC design, IP integration, system-level debug, and customer-facing engagements.

This role focuses on performance architecture for AI/HPC platforms, bridging software execution and silicon design. The architect will work on ML software stacks, compilers, CPU design, cache coherency, and interconnect fabrics to optimize SoC performance. Familiarity with ML/AI traffic patterns is a plus.

Tenstorrent is seeking a Memory Architect to design and develop memory chiplet architectures for AI and CPU applications. The role involves defining specifications, exploring next-generation memory technologies, and building performance/power modeling infrastructure to optimize data movement for high-throughput, low-latency systems.

This role focuses on validating and qualifying die-to-die (D2D) subsystems, AI, and Processor IP testchips for the chiplet ecosystem. Responsibilities include developing hardware infrastructure for validation platforms, performing electrical characterization, and supporting customer silicon bring-up. The role requires expertise in silicon test and characterization, lab environments, and high-speed measurements.

Tenstorrent is seeking a Risc-V Architect to analyze AI workloads and architect custom RISC-V CPU cores optimized for performance, power, and area. The role involves designing custom instructions and collaborating across teams to co-design the company's next-gen compute architecture, focusing on improving programmability and developer experience for AI compute.