Tenstorrent
Semiconductors · RISC-V AI chip (Jim Keller)
- HQ
- Toronto, CA
- Founded
- 2016
- Website
- tenstorrent.com
Currently tracking 22 active AI roles, down 42% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $100k–$500k (avg $300k).
Tenstorrent currently has 27 active AI-related job listings, with a significant majority, 81%, focused on serving infrastructure. Engineering roles comprise all of their AI hiring. The company is primarily hiring in the United States and Canada. Frequent technical tags include model_serving, inference_infra, and agent_orchestration, suggesting a focus on AI model deployment and management. In the last 30 days, Tenstorrent has not posted any new AI roles, representing a 100% decrease compared to the previous 30-day period.
Semiconductors · RISC-V AI chip (Jim Keller)
Tenstorrent currently has 25 active AI-related roles in our index. The most common open titles are: Sr. Engineer, Software - AI Compiler (2), AI/ML Physical Design Flow Engineer, C++ Machine Learning Engineer, Models Training, Design Verification Lead, AI Hardware , Infrastructure and Platform Development Engineer. Most positions are in Engineering and Research.
Tenstorrent's active AI hiring is concentrated in: serving infrastructure (80%), agents (8%), application (4%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
Tenstorrent is hiring AI talent in: United States (10 roles), Canada (8 roles), Serbia (4 roles), Poland (2 roles).
Job postings at Tenstorrent most frequently reference: inference infra, model serving, fine tuning, agent orchestration, vision.
In the past 30 days, Tenstorrent has posted 1 new AI-related role.
| Title | Stage | AI score |
|---|---|---|
| Sr. Engineer, Software - AI Compiler Software Engineer role focused on developing and optimizing an MLIR-based AI compiler (TT-Forge) to run AI models efficiently on Tenstorrent hardware. Involves optimizing computational graphs, creating custom dialects, and transformation passes, with a focus on training and multi-chip scaling. | Serve | 8 |
| AI/ML Physical Design Flow Engineer The role involves architecting, integrating, and deploying AI/ML-driven solutions into production physical design flows for advanced semiconductor nodes. This includes creating custom CAD tools and optimizing EDA tools using data-driven and ML-based techniques to improve PPA and runtime. The engineer will also develop and enhance RTL-to-GDS methodologies. | Serve | 7 |
| Software Engineer, Metal Runtime (Core Systems) Software Engineer on the Metal Runtime team working on low-level software for AI accelerators, focusing on scheduling, memory movement, and efficient execution across parallel processors. The role involves building and optimizing high-performance runtime systems close to the hardware. |
| Serve |
| 7 |
| Software Engineer, AI Compiler Software Engineer role focused on developing and scaling an MLIR-based AI compiler (TT-Forge) for Tenstorrent, involving graph transformations, lowering passes, and kernel optimizations to support both training and inference on custom chip architectures. | Serve | 7 |
| Software Engineer, TT-Distributed Software Engineer role focused on developing and optimizing distributed software systems for AI and HPC clusters, specifically for distributed inference and training infrastructure. Requires strong C/C++ systems programming, distributed computing principles, and experience with MPI-based technologies. | ServeData | 7 |
| Design Verification Lead, AI Hardware Lead a team of Verification Engineers to validate the functionality and performance of next-generation AI hardware, focusing on AI-specific data types, compute patterns, and on-chip network validation. | Serve | 7 |