Tenstorrent
Semiconductors · RISC-V AI chip (Jim Keller)
- HQ
- Toronto, CA
- Founded
- 2016
- Website
- tenstorrent.com
Tenstorrent currently has 27 active AI-related job listings, with a significant majority, 81%, focused on serving infrastructure. Engineering roles comprise all of their AI hiring. The company is primarily hiring in the United States and Canada. Frequent technical tags include model_serving, inference_infra, and agent_orchestration, suggesting a focus on AI model deployment and management. In the last 30 days, Tenstorrent has not posted any new AI roles, representing a 100% decrease compared to the previous 30-day period.
Semiconductors · RISC-V AI chip (Jim Keller)
Currently tracking 22 active AI roles, down 50% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $100k–$500k (avg $300k).
Tenstorrent currently has 25 active AI-related roles in our index. The most common open titles are: Sr. Engineer, Software - AI Compiler (2), AI/ML Physical Design Flow Engineer, C++ Machine Learning Engineer, Models Training, Design Verification Lead, AI Hardware , Infrastructure and Platform Development Engineer. Most positions are in Engineering and Research.
Tenstorrent's active AI hiring is concentrated in: serving infrastructure (80%), agents (8%), application (4%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
Tenstorrent is hiring AI talent in: United States (10 roles), Canada (8 roles), Serbia (4 roles), Poland (2 roles).
Job postings at Tenstorrent most frequently reference: inference infra, model serving, fine tuning, agent orchestration, vision.
In the past 30 days, Tenstorrent has posted 1 new AI-related role.
| Title | Stage | AI score |
|---|---|---|
| Model Research, Optimization, and Training Research role focused on optimizing and training large language models on custom AI accelerators, involving techniques like speculative decoding and quantization, and translating research into production-ready systems. | Post-trainServe | 9 |
| RISC-V AI / HPC & Agentic Software Engineering Lead Lead engineering efforts for RISC-V CPUs optimized for AI, HPC, and agentic systems, focusing on integrating and optimizing low-level kernels and leading the bring-up of a RISC-V-native agentic AI software stack, including runtime orchestration and distributed execution frameworks. | AgentServe | 9 |
| C++ Machine Learning Engineer, Models Training C++ Machine Learning Engineer focused on optimizing and extending the ML training framework for custom AI silicon, debugging model performance, and collaborating with compiler and kernel teams. | Data | 9 |
| ML Engineer, AI Models ML Engineer focused on bringing up, validating, and optimizing AI models (LLMs, CNNs, recommendation, vision) on Tenstorrent's hardware and simulators. This role involves porting models into Tenstorrent toolchains, running experiments for accuracy/performance/stability, and debugging cross-stack issues with hardware, compiler, and runtime teams. | Serve | 8 |
| Performance Architect, AI HW Role focuses on analyzing and optimizing AI workloads on hardware architecture (Tensix) to improve performance, power, and area. Involves developing performance models, simulators, and collaborating with RTL, Compiler, and Runtime teams. Connects architecture, software, and RTL for next-gen AI systems. | Serve | 8 |
| Machine Learning Engineer, AI Models Machine Learning Engineer focused on bringing advanced LLMs and vision models to life on custom AI hardware, involving porting, tuning, and validating models for performance and efficiency. | ServePost-train | 8 |
| Sr. Engineer, Software - AI Compiler Software Engineer role focused on developing and optimizing an MLIR-based AI compiler (TT-Forge) to run AI models efficiently on Tenstorrent hardware. Involves optimizing computational graphs, creating custom dialects, and transformation passes, with a focus on training and multi-chip scaling. | Serve | 8 |
| Sr. Engineer, Software - AI Compiler Sr. Engineer, Software - AI Compiler role at Tenstorrent focused on developing TT-Forge, an MLIR-based compiler for Tenstorrent hardware, optimizing AI models for training and inference. | Serve | 8 |
| Staff Technical Program Manager, AI Systems and IP Delivery Staff Technical Program Manager responsible for end-to-end delivery of AI model IP and supporting software (compiler outputs, runtime libraries, model artifacts, hardware collateral) into customer environments. This role involves defining release criteria, aligning cross-functional teams (hardware, compiler, runtime, kernel, legal), identifying and mitigating integration risks, and providing leadership visibility on deployment status. The role bridges customer requirements with engineering realities, focusing on AI systems and IP delivery at scale. | ShipServe | 7 |
| RISC-V AI / HPC & Agentic Software Engineer This role focuses on integrating and optimizing AI/HPC software stacks on RISC-V processors, specifically leading the bring-up of a RISC-V-native agentic AI software stack including runtime orchestration and distributed execution frameworks. The engineer will work closely with hardware architects and compiler engineers to align software capabilities with RISC-V features, operating at the hardware-software boundary. | AgentServe | 7 |
| AI/ML Physical Design Flow Engineer The role involves architecting, integrating, and deploying AI/ML-driven solutions into production physical design flows for advanced semiconductor nodes. This includes creating custom CAD tools and optimizing EDA tools using data-driven and ML-based techniques to improve PPA and runtime. The engineer will also develop and enhance RTL-to-GDS methodologies. | Serve | 7 |
| Sr. Engineer, Kernel Development and Optimization Sr. Engineer, Kernel Development and Optimization at Tenstorrent, focusing on designing, implementing, and optimizing performance-critical kernels for AI hardware, including matrix multiplication and attention primitives. The role involves host-side orchestration, parallelization, developing benchmarks and tests, and collaborating with compiler, runtime, ML, and hardware teams to integrate kernels into production systems. Experience with C++, low-level software, concurrency, and data-driven optimization is required. | Serve | 7 |
| Software Engineer, Kernel Development and Optimization Software Engineer focused on developing and optimizing performance-critical kernels for AI hardware, targeting ML and HPC workloads. This role involves C++ systems engineering, low-level optimization, and close collaboration with hardware and software teams. | Serve | 7 |
| Software Engineer, Metal Runtime (Core Systems) Software Engineer on the Metal Runtime team working on low-level software for AI accelerators, focusing on scheduling, memory movement, and efficient execution across parallel processors. The role involves building and optimizing high-performance runtime systems close to the hardware. | Serve | 7 |
| Sr Engineer, Server Inference The role focuses on developing software for state-of-the-art AI inferencing on Tenstorrent's hardware, including designing APIs, deploying workloads, and benchmarking inference speed. It involves optimizing end-to-end ML inference on custom silicon and building scalable software interfaces. | Serve | 7 |
| Software Engineer, AI Compiler Software Engineer role focused on developing and scaling an MLIR-based AI compiler (TT-Forge) for Tenstorrent, involving graph transformations, lowering passes, and kernel optimizations to support both training and inference on custom chip architectures. | Serve | 7 |
| Software Engineer, TT-Distributed Software Engineer role focused on developing and optimizing distributed software systems for AI and HPC clusters, specifically for distributed inference and training infrastructure. Requires strong C/C++ systems programming, distributed computing principles, and experience with MPI-based technologies. | ServeData | 7 |
| Design Verification Lead, AI Hardware Lead a team of Verification Engineers to validate the functionality and performance of next-generation AI hardware, focusing on AI-specific data types, compute patterns, and on-chip network validation. | Serve | 7 |
| Software Engineer, Scale Out Software Engineer focused on low-level systems software for AI hardware, optimizing infrastructure for large inference and training models. Requires strong C/C++ and Linux systems programming skills. | Serve | 7 |
| Software Engineer, Acceleration Kernel Development Software Engineer focused on optimizing low-level compute kernels for AI hardware, directly impacting ML workload performance and efficiency. | Serve | 7 |
| Sr. Software Engineer, AI Compiler Software Engineer role focused on developing and optimizing Tenstorrent's MLIR-based AI compiler (TT-Forge) to run AI models efficiently on Tenstorrent hardware. Responsibilities include optimizing computational graphs, creating custom dialects and transformation passes, and potentially developing human-in-the-loop tuning tools. | Serve | 7 |