Debug Architect

Tenstorrent Tenstorrent · Semiconductors · Toronto, ON · DC Deployment

Tenstorrent is seeking a Debug Architect to define and scale debug and trace capabilities across their CPU and AI product lines. This role involves working across hardware and software boundaries to enable validation, diagnosis, and optimization of workloads on RISC-V, x86, or ARM systems.

What you'd actually do

  1. Define and implement scalable debug architecture across multiple CPU and AI product lines.
  2. Design and validate hardware debug and trace features during development and verification.
  3. Prove debug capabilities during silicon development and ensure readiness for production use.
  4. Support silicon bring-up and establish robust post-silicon debug infrastructure.
  5. Collaborate with hardware, software, and deployment teams to enable efficient debugging and performance analysis.

Skills

Required

  • Hardware debug for CPU, SoC, or ASIC systems
  • Processor architecture and microarchitecture (RISC-V, x86, or ARM)
  • Debug, profiling, and trace methodologies (e.g., iJTAG)
  • Hardware and software boundary interaction
  • HDL (Verilog or VHDL)
  • Python
  • Git

What the JD emphasized

  • Experienced in hardware debug for CPU, SoC, or ASIC systems, including bring-up and post-silicon environments.
  • Strong understanding of processor architecture and microarchitecture across RISC-V, x86, or ARM.
  • Familiar with debug, profiling, and trace methodologies, including industry standards such as iJTAG.
  • Comfortable working across hardware and software boundaries, including firmware and driver interaction.
  • Proficient in HDL such as Verilog or VHDL and programming tools including Python and Git.
  • Define and implement scalable debug architecture across multiple CPU and AI product lines.
  • Design and validate hardware debug and trace features during development and verification.
  • Prove debug capabilities during silicon development and ensure readiness for production use.
  • Support silicon bring-up and establish robust post-silicon debug infrastructure.
  • Collaborate with hardware, software, and deployment teams to enable efficient debugging and performance analysis.