Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.
Tenstorrent is seeking a high impact Emulation Engineer to help bring our SiP based AI or ML engines to life through scalable, high performance emulation platforms. This role is ideal for someone who thrives on technical ownership, solves system level problems, and wants to influence silicon debug, DV, and performance from the ground up. You will build the infrastructure that allows our chiplet based systems to be explored, tested, and validated across hardware, software, and architectural layers.
This role is remote, based in Munich, Germany.
We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
Who You Are
- Bring 10+ years of SoC or ASIC experience, including a deep understanding of logic design, verification, and emulation platforms.
- Fluent in Verilog or SystemVerilog, C or C++, and SystemC, with hands-on experience using commercial emulators such as ZeBu, Palladium, or Veloce.
- Confident in architecting DV and emulation environments, from transactors to monitors to debug hooks, and automate everything you can.
- Collaborative and self driven, with a passion for mentoring junior engineers and working cross functionally with architecture, software, and DV teams.
What We Need
- A passion to build and scale a multi chiplet emulation ecosystem that supports DV, software development, and power or performance debug.
- Comfort in developing testbenches, transactors, monitors, and support systems to enable high quality, high efficiency emulation usage.
- Experience in driving emulation coverage from functional and performance to low level software enablement, and automate as much of the flow as possible.
- To optimize the platform for frequency, resource sharing, and end user support, ensuring Tenstorrent teams get the most from emulation.
What You Will Learn
- Building an emulation flow that supports chiplet based SiPs at scale, spanning AI workloads, interconnects, and system level power.
- How Tenstorrent integrates AI engines, RISC V CPUs, die to die links, PCIe, UCIe, and memory controllers into one unified platform.
- To align virtual prototyping, power analysis, and emulation into a full stack validation solution.
- How emulation sits at the core of a cross functional silicon bring up strategy, from RTL to post silicon debug and customer delivery.
Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.
This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.