Packaging Process Engineer

Snap Snap · Consumer · Taipei City, Taiwan

This role is for a Packaging Process Engineer focused on backend packaging processes for advanced displays, including die attach, molding/encapsulation, marking, and final packing. The engineer will own supplier process design transfers, drive process development, yield, and manufacturability, and partner with cross-functional teams. Experience in microfabrication, lithography, and semiconductor/display packaging is required.

What you'd actually do

  1. Own and optimize backend packaging process for LCOS advanced displays, from early development through high-volume manufacturing, ensuring stable, high-yield output.
  2. Act as the primary technical interface for equipment, materials, and manufacturing partners, overseeing tool qualification, process capability, build readiness, and issue resolution.
  3. Develop, qualify, and sustain assembly and packaging recipes, control plans, and SPC systems, driving continuous improvement in CD/overlay, defectivity, yields, and reliability.
  4. Lead structured problem solving (DOEs, FMEA, root cause analysis, corrective actions) for yield excursions, line stops, and parametric drifts across lithography and packaging.
  5. Partner with cross-functional teams to define capacity models, WIP/uptime strategies, and roadmap for next-generation display architectures, packaging schemes, and interconnect technologies.

Skills

Required

  • BS degree in Electrical Engineering, Materials Science or a related technical field
  • 7+ years of experience as a process or packaging engineer in microfabrication fabs
  • Direct experience in processes such as die attach, wire bonding, molding/encapsulation, and final test for semiconductor or display packages
  • Demonstrated track record of improving yield and process stability through structured experimentation (DOE), SPC, and cross-functional problem solving
  • Experience planning and executing process transfers from R&D to production sites
  • Strong expertise in backend assembly processes for advanced displays, including die attach, molding/encapsulation, marking, and final packing
  • Experience developing and sustaining wire bonding processes (materials, bond parameters, loop profiles, pad design interfaces) for high‑density LOCS packages
  • Working knowledge of optical lithography and photoresist processes in a microfab environment, and how front end choices interact with packaging assembly windows
  • Hands-on experience with relevant equipment sets across the processes (e.g.resist tracks, mask aligners, packing equipment) including recipe setup, tuning, and troubleshooting
  • Proven ability to function as a module owner in a high-volume fab or OSAT environment, balancing NPI design transfer activities and roadmap work
  • Exceptional problem solver with a structured, solution focused approach, leveraging advanced statistical tools to improve yield and stability in lithography and packaging
  • Comfortable working in ISO 5–6 cleanroom environments and enforcing best practices in contamination control, safety, and EHS compliance

Nice to have

  • 10+ years of experience in photolithography process engineering and backend packaging
  • Ownership of module performance and direct collaboration with applications engineers
  • Experience working directly with external manufacturing partners or customers in Asia
  • Excellent problem solver with a foundation in Six Sigma
  • Proficient in written and verbal communication in both Mandarin and English

What the JD emphasized

  • technical process owner
  • supplier process design transfers
  • process development
  • yield
  • manufacturability
  • backend packaging processing
  • advanced displays
  • high-volume manufacturing
  • technical interface
  • tool qualification
  • process capability
  • build readiness
  • issue resolution
  • assembly and packaging recipes
  • control plans
  • SPC systems
  • continuous improvement
  • structured problem solving
  • yield excursions
  • line stops
  • parametric drifts
  • capacity models
  • WIP/uptime strategies
  • roadmap
  • next-generation display architectures
  • packaging schemes
  • interconnect technologies
  • backend assembly processes
  • die attach
  • molding/encapsulation
  • marking
  • final packing
  • wire bonding processes
  • high-density LOCS packages
  • optical lithography
  • photoresist processes
  • microfab environment
  • relevant equipment sets
  • recipe setup
  • tuning
  • troubleshooting
  • module owner
  • high-volume fab
  • OSAT environment
  • NPI design transfer activities
  • roadmap work
  • Exceptional problem solver
  • structured, solution focused approach
  • advanced statistical tools
  • yield and stability
  • ISO 5–6 cleanroom environments
  • contamination control
  • safety
  • EHS compliance
  • BS degree
  • 7+ years of experience
  • process or packaging engineer
  • microfabrication fabs
  • Direct experience
  • semiconductor or display packages
  • Demonstrated track record
  • improving yield and process stability
  • structured experimentation (DOE)
  • SPC
  • cross-functional problem solving
  • planning and executing process transfers
  • R&D to production sites
  • International travel
  • up to ~30%
  • 10+ years of experience
  • photolithography process engineering
  • backend packaging
  • Ownership of module performance
  • direct collaboration with applications engineers
  • working directly with external manufacturing partners or customers
  • Asia
  • foundation in Six Sigma
  • Proficient in written and verbal communication
  • Mandarin and English