Senior Design Verification Engineer, AI Hw

Tenstorrent · Semiconductors · Austin, TX +1 · Tensix

Senior Design Verification Engineer for AI hardware, focusing on custom AI compute cores, RISC-V CPUs, and chiplet-based architectures. The role involves validating compute IP and subsystems, building scalable DV infrastructure, and contributing to verification environments, agents, and scoreboards using SystemVerilog and Python. The position requires experience in modern verification methodologies, scripting, and coverage-driven verification, with a focus on AI-native compute architectures.

What you'd actually do

  1. Contribute to verification of Tensix IP and subsystems from early planning through tape-out, owning coverage goals and driving them to closure.
  2. Build and maintain reusable verification environments, agents, scoreboards, and supporting infrastructure in SystemVerilog and Python.
  3. Develop constrained-random and directed tests and close functional, code, and assertion coverage using data-driven approaches.
  4. Debug complex issues across RTL and testbench while collaborating with design, firmware, compiler, and architecture teams.
  5. Help evolve DV infrastructure including regression flows, CI/CD integration, EDA compute environments, and reproducible setups.

Skills

Required

  • SystemVerilog
  • Python scripting
  • Bash scripting
  • Linux environments
  • coverage-driven verification
  • debug complex issues
  • RTL
  • testbench development
  • structured testbench development
  • microarchitecture behavior
  • data-driven approaches
  • CI/CD integration

Nice to have

  • AI hardware verification
  • RISC-V CPU verification
  • chiplet-based architectures verification
  • emulation
  • software-driven workloads
  • BF16
  • FP4
  • INT8
  • containerized regression systems

What the JD emphasized

  • Experienced in modern verification methodologies
  • strong SystemVerilog skills
  • Proficient in Linux environments with Python, or Bash scripting
  • Skilled in coverage-driven verification
  • Motivated by AI hardware
  • Contribute to verification of Tensix IP and subsystems
  • Build and maintain reusable verification environments
  • Develop constrained-random and directed tests
  • Debug complex issues
  • Help evolve DV infrastructure
  • numerical precision formats such as BF16, FP4, and INT8
  • data analytics and modern AI tooling can enhance verification workflows