Senior Npi Engineering Program Manager I (smt Process)

Axon Axon · Enterprise · Ho Chi Minh City, Vietnam · 2004 Sensors - Devices

This role is for a Senior NPI Engineering Program Manager focused on Surface Mount Technology (SMT) process development and qualification for new hardware programs with Southeast Asia contract manufacturers. The individual will act as the technical interface between Axon's electrical design teams and factory operations, leading DFM/DFA reviews, qualifying solder processes, performing failure analysis, and driving corrective actions based on test data. Success is measured by yield, schedule adherence, and process qualification.

What you'd actually do

  1. Plan and execute contract-manufacturer PCB assembly builds through Axon Product Lifecycle gates (SP, EVT, DVT, PVT) with clear SMT readiness metrics and exit criteria
  2. Lead DFM/DFA reviews with electrical design teams, focusing on board layout, component placement, land pattern design, panelization, and solderability
  3. Drive solder paste, reflow, wave, and selective solder process qualification at CM sites
  4. Specify and validate CM equipment, stencil design, and material selection (paste, flux, PCB surface finish)
  5. Interpret and act on SPI, AOI, AXI, and ICT data to identify and resolve process escapes before they impact yield

Skills

Required

  • B.S. in Electrical Engineering, Electronics Engineering, or related engineering discipline; 8+ years of relevant experience
  • 5+ years in SMT process engineering within an NPI or high-mix electronics manufacturing environment
  • Demonstrated PCB assembly ramps with Southeast Asia contract manufacturers (reflow, wave/selective solder, BGA, fine-pitch components)
  • Hands-on experience with SPI, AOI, AXI, and ICT interpretation and process response
  • Board-level failure analysis: solder joint characterization, cross-sectioning, delamination, pad cratering, component failure modes
  • DFM/DFA reviews for PCB layout, component selection, land pattern design, and panelization
  • Process qualification and DOE execution: reflow profiles, stencil design, paste selection, underfill, conformal coat
  • Statistical toolkit: DOE, GR&R, SPC, Cp/Cpk analysis applied to SMT process control
  • Strong CM management instincts — able to challenge analysis, verify root cause, and drive corrective action
  • Reads and interprets IPC standards (IPC-A-610, J-STD-001, IPC-7711/21)
  • SMT equipment familiarity: screen printers, reflow ovens, selective solder, SPI/AOI/AXI platforms
  • EDA tools (Altium, Cadence, or equivalent) for PCB review and DFM markup
  • Clear, concise technical communication in English across engineering, factory, and executive audiences
  • Proven CM engagement across Southeast Asia; on-site factory support up to 30% travel

Nice to have

  • PCBA testing experience including flying probe and bed-of-nails testers
  • Tester design, bring-up, and validation

What the JD emphasized

  • close a critical gap in CM oversight
  • board-level failure analysis
  • DFx feedback
  • challenge CM root cause analyses
  • close build readiness actions