Sr. Staff Engineer, Post-silicon Validation

Tenstorrent · Semiconductors · Bangalore, India · RISC V

This role focuses on post-silicon validation of RISC-V based SoCs, involving bring-up, validation, and debug. It requires hands-on lab experience and understanding of SoC architectures, working closely with design, firmware, and software teams.

What you'd actually do

  1. Lead first-silicon bring-up of RISC-V CPU–based SoCs and execute post-silicon validation plans.
  2. Debug silicon issues across CPU cores, interconnects, memory subsystems, peripherals, and high-speed interfaces.
  3. Develop and debug bare-metal tests, boot flows, and collaborate on Linux bring-up and driver validation.
  4. Provide actionable feedback, support ECO validation, and drive fixes for future silicon revisions.

Skills

Required

  • Post-silicon validation
  • SoC bring-up
  • Silicon debug
  • CPU and SoC architectures
  • RISC-V
  • Bare-metal testing
  • Linux bring-up
  • Hardware/software interaction debugging

Nice to have

  • Firmware development
  • Driver validation
  • High-speed interfaces

What the JD emphasized

  • 10+ years of experience in SoC bring-up, validation, and silicon debug
  • strong grasp of CPU and SoC architectures
  • debugging complex hardware/software interaction issues
  • eligibility to access U.S. export-controlled technology