System Ip Rtl Design Lead

Tenstorrent Tenstorrent · Semiconductors · Bangalore, India · RISC V

Tenstorrent is seeking an experienced System IP RTL Design Lead to drive the definition and implementation of complex datacenter class IP for their next-generation semiconductor products. The role involves leading a design team, defining system-level requirements, and ensuring IP design sign-off. The company is focused on AI technology and developing high-performance RISC-V CPUs and AI platforms.

What you'd actually do

  1. Lead the technical definition, selection, and integration of internally and third party developed IPs including MMUs, Interrupt controllers, Interconnects, Memory controllers, and peripherals within advanced SoCs.
  2. Define system-level requirements, IP specifications, interfaces, and integration methodologies to achieve performance, power, and area (PPA) goals.
  3. Drive IP design through sign-off activities while ensuring compliance with functional, security, and quality requirements.

Skills

Required

  • RTL design and debug (Verilog/SystemVerilog)
  • simulation, synthesis, lint, CDC, and power analysis
  • microarchitecture decisions
  • authoring design specifications
  • PPA trade-off optimizations
  • debugging complex logic
  • pre-silicon simulation, emulation, and post-silicon bring-up
  • AXI/AHB/APB, PCIe, DDR, and USB protocols
  • Python, Tcl, UVM, and formal verification

Nice to have

  • System IP and SoC architecture
  • IP integration challenges
  • scripting and verification methodologies

What the JD emphasized

  • 18+ yrs of strong expertise in complex SoC architectures
  • proven track record in the successful delivery of silicon IP
  • strong hands-on technical leadership
  • deep expertise in protocols and interfaces such as AXI/AHB/APB, PCIe, DDR, and USB