Google has 584 active AI-related job listings. The majority of these roles are focused on agents, representing 40% of the total, and serving infrastructure, at 26%. The most frequent technical tags include model_serving, agent_orchestration, and evals. Over the last 30 days, Google has added 413 new AI roles, a 105% increase compared to the preceding 30-day period.
Currently tracking 498 active AI roles, down 12% versus the prior 4 weeks. Primary focus: Agent · Engineering. Salary range $98k–$1030k (avg $233k).
Google currently has 586 active AI-related roles in our index. The most common open titles are: Software Engineer (5), AI Adoption Customer Engineer, Google Cloud (3), Conversational AI Consultant (2), Engineering Manager, Egregious Abuse Protection (2), Forward Deployed Engineer III, Generative AI, Google Cloud (2). Most positions are in Engineering and Product.
Google's active AI hiring is concentrated in: agents (43%), serving infrastructure (25%), application (19%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
Google is hiring AI talent in: United States (376 roles), India (53 roles), Singapore (40 roles), Switzerland (20 roles).
Job postings at Google most frequently mention: Software Engineering, Algorithms & Data Structures, System Design, Computer Architecture, Machine Learning.
In the past 30 days, Google has posted 571 new AI-related roles. That is a +22% change versus the prior 30 days (469 → 571).
| Title | Stage | AI score |
|---|---|---|
| Machine Learning Hardware Architect, Hardware, Software Co-Design, Google Cloud This role focuses on architecting and defining the roadmap for AI/ML hardware acceleration, specifically TPUs, for Google Cloud. It involves co-design between model architecture and next-generation hardware, optimizing for ML serving and training capabilities, and integrating large-scale foundation models with advanced silicon architectures. The role requires defining technical roadmaps, architecting simulation frameworks, guiding system-level performance analysis, and managing cross-functional partnerships across hardware, compiler, and ML teams. | ServePost-train | 9 |
| Technical lead, Google Cloud Security Technical lead for Google Cloud Security, focusing on transitioning to an AI-native Security Operations Center (SOC). The role involves architecting an Agent Engine and universal APIs to enable enterprise security teams to orchestrate defense at machine speed, shifting from static workflows to multi-agent ecosystems. |
| Agent |
| 8 |
| Research Data Scientist II, Waze This role focuses on developing and owning Machine-Learning models for Waze's personalized navigation experience. Responsibilities include feature engineering, model evaluation, tuning, monitoring, and working with product and backend teams to integrate models into production. The role requires experience in data engineering, ML, and cloud platforms. | Post-train | 7 |
| Software Engineer II, Engineering Productivity Software Engineer II, Engineering Productivity at Google, focusing on developing and maintaining classifiers for trust policies in search products, supporting trust and safety teams, and integrating with various services. The role requires experience with software development, data structures, algorithms, building developer tools, and using AutoML for NLP tasks, with a preference for familiarity with data pipelines and LLM development. | Ship | 5 |
| Electrostatic Discharge Engineer Electrostatic Discharge (ESD) Engineer responsible for designing, implementing, and maintaining measures to prevent and control electrostatic discharge from electronic components and devices, with a focus on TPU architecture for AI/ML applications. | — | 5 |
| Staff Software Engineer, Google Cloud Storage, AI/ML Staff Software Engineer on the Google Cloud Storage AI/ML Solutions team, focusing on building storage solutions for AI/ML workloads, from training to inference. The role involves designing, implementing, and optimizing high-complexity features for scalable and performant storage systems that cater to the specific demands of AI/ML. | Serve | 5 |
| Senior Staff DSP Design Engineer, Google Cloud This role focuses on designing custom silicon solutions for Google's direct-to-consumer products and Google Cloud, specifically for high-speed data paths and interconnects. The engineer will define roadmaps, evaluate technologies like CPO and advanced FEC, and contribute to the ML, Systems, & Cloud AI organization. Responsibilities include identifying limits of DSP architectures, defining requirements for test chips, driving power-reduction roadmaps, and representing Google in industry standards bodies. | — | 2 |
| Software Engineer III, Infrastructure, Chronicle SOAR Software Engineer III, Infrastructure, Chronicle SOAR at Google. This role focuses on enhancing the reliability, performance, and security of Chronicle SOAR by building, automating, and maintaining systems and tools that operate at Google scale. Responsibilities include designing and building software for reliability and performance, creating automation for operational workflows, developing infrastructure configurations in Go, implementing monitoring/logging/tracing, and analyzing incidents to build preventative software solutions. | — | 0 |
| Silicon Validation Engineer, Google Cloud This role focuses on validating custom silicon solutions for Google's direct-to-consumer products and Google Cloud, specifically within the ML, Systems, & Cloud AI (MSCA) organization. The engineer will define, develop, and execute post-silicon validation content, debug issues across cross-functional teams, and drive silicon from chip to product. The role requires significant experience in silicon validation, firmware development, and embedded software, with a focus on ensuring quality functional coverage for Google designs. | — | 0 |
| Senior Silicon Validation Engineer, Google Cloud Senior Silicon Validation Engineer responsible for defining, developing, and executing post-silicon validation content for custom silicon solutions powering Google's direct-to-consumer products and Google Cloud AI platform. This role involves debugging issues across cross-functional teams and driving silicon from chip to product, ensuring quality functional coverage. | — | 0 |
| Firmware Engineer, Google Cloud Firmware Engineer for Google Cloud, focusing on developing C/C++ firmware for embedded processors on SoCs, including tools for updates, debugging, emulation, and chip bringup. The role involves working within the ML, Systems, & Cloud AI organization, contributing to the data center software stack for SoC deployment. | — | 0 |
| CPU Design Integration Engineer, Google Cloud This role is for a CPU Design Integration Engineer at Google Cloud, focusing on developing custom silicon solutions for Google's direct-to-consumer products and Google Cloud services. The role involves design, integration, and verification of hardware, working with RTL, physical design, and IPs. While the organization works with AI platforms like Vertex AI and designs TPUs, the core responsibilities of this specific engineering role are in traditional CPU/silicon design and integration, not direct AI/ML model development or deployment. | — | 0 |
| Senior Software Engineer, Google Cloud Storage Senior Software Engineer role at Google Cloud Storage focusing on building scalable and reliable features for Filestore, a managed NFS service. The role involves full-stack development, design, testing, and launching features, with a focus on engineering excellence and compliance with regulated requirements. Experience in distributed systems, storage, or networking is preferred. | — | 0 |
| Staff Architect, Digital Signal Processing, Google Cloud Staff Architect, Digital Signal Processing, Google Cloud, responsible for architecting and developing core algorithms for next-generation data center interconnects, leveraging expertise in communication theory, forward error correction, and modulation. This role involves technical leadership, mentorship, and collaboration across hardware and software teams for custom silicon solutions. | — | 0 |
| Software Engineer III, Infrastructure Software Engineer III, Infrastructure role at Google, focusing on developing large-scale infrastructure, distributed systems, or networks. Responsibilities include writing code, participating in design reviews, code reviews, contributing to documentation, and triaging/debugging system issues. Requires a Bachelor's degree or equivalent experience in software development or advanced degree, with specific experience in infrastructure, distributed systems, or compute/storage/hardware architecture. Preferred qualifications include a Master's/PhD, data structures/algorithms experience, accessible technologies, EDA/chip design, and applying AI/ML techniques. | — | 0 |
| Software Engineer III, Full Stack, Chronicle Software Engineer III, Full Stack for Google Cloud's Chronicle platform, focusing on developing and maintaining enterprise-grade solutions that help organizations digitally transform. The role involves writing product/system code, participating in design reviews, code reviews, debugging, and contributing to documentation. | — | 0 |
| Software Engineer III, Database Migration Service, Cloud Software Engineer III for Google Cloud's Database Migration Service, focusing on building and extending SQL services and engines. The role involves managing project priorities, designing, developing, testing, deploying, maintaining, and enhancing software solutions. While the team is involved in generative AI efforts, the core responsibility is in database migration service development and architecture guidance. | — | 0 |
| Software Engineer III, Waze, Mobile (Android) Software Engineer III at Google working on the Waze mobile (Android) application, focusing on product and system development, code reviews, and issue triaging. Requires a Bachelor's degree and experience in software development and Android development. | — | 0 |
| Senior Silicon DFT Engineer, Google Cloud Senior Silicon DFT Engineer responsible for Design for Testing (DFT) Architecture and DFT design for complex ASICs, leading DFT activities, developing flows, automation, and methodology, and ensuring DFT quality throughout the project lifecycle. | — | 0 |
| Senior Post-Silicon Validation Engineer, Networking This role focuses on the post-silicon validation of custom networking silicon for Google's direct-to-consumer products and cloud infrastructure. The engineer will develop test plans, write and execute tests in Python or C/C++, and lead bring-up, troubleshooting, and debug efforts on silicon to ensure quality and functionality. | — | 0 |
| Software Engineer III, Search Console Configuration Software Engineer III at Google working on Search Console, focusing on developing scalable services and pipelines, writing product/system development code, managing project priorities, and debugging issues. The role involves working on technologies that impact billions of users globally, with opportunities to contribute to various aspects of Google's search and information access products. | — | 0 |
| Silicon Validation and Debug Engineer This role involves developing and improving post-silicon test content for custom silicon solutions that power Google's direct-to-consumer products. The engineer will collaborate with various teams to define validation plans, optimize SoC power efficiency and performance, develop automated test scripts, and participate in silicon and platform bring-up activities. The role requires experience in functional tests for silicon validation, bring-up, characterization, qualification, and debugging. | — | 0 |
| Staff Design Engineer, Networking, Google Cloud This role focuses on designing and implementing custom silicon solutions (ASICs) for accelerating networking in Google's data centers. The engineer will lead ASIC subsystems, define hardware/software interfaces, and collaborate with cross-functional teams throughout the design process. While the role is within an organization that supports AI services, the core responsibilities are in hardware engineering for networking infrastructure, not direct AI/ML model development or deployment. | — | 0 |
| Senior SOC DFT Engineer, Google Cloud This role is for a Senior SOC DFT Engineer focused on designing and implementing Design for Testing (DFT) solutions for large-scale ASICs. The responsibilities include leading DFT architecture, developing flows and automation, managing team workload, and ensuring DFT quality throughout the ASIC development lifecycle. The role requires extensive experience in ATPG, DFT design and verification, and leading DFT activities. | — | 0 |
| Senior Digital Signal Processing Engineer, Google Cloud Senior Digital Signal Processing Engineer role focused on designing and implementing DSP algorithms for high-speed PHYs, turning communication theory into silicon logic. Responsibilities include fixed-point analysis and developing bit-exact models for verification. The role is within the ML, Systems, & Cloud AI (MSCA) organization, but the core function is DSP engineering for hardware, not direct AI model development. | — | 0 |
| Silicon Validation and Automation Engineer This role focuses on silicon validation and automation engineering for Google's hardware products. Responsibilities include running and analyzing CI regression results, designing and implementing new regression methods and infrastructure, debugging issues, and developing/maintaining tools for silicon validation and debug. The role requires experience in post-silicon validation, SoC debug, CI systems, lab equipment, and scripting languages like Python. | — | 0 |
| ChipDev CAD Engineer, Hardware, Google Cloud Software Engineer role focused on developing tools to improve the hardware design process within Google Cloud. The role involves creating automation for ASIC and SoC EDA flows, working with hardware teams, and ensuring software quality and efficiency. It requires experience in software development, data structures, algorithms, and building developer tools. | — | 0 |
| Software Engineer, CPU Performance Modeling, Google Cloud Software Engineer role focused on CPU performance modeling for Google Cloud, collaborating with System and CPU Architecture teams to define methods for modeling CPU performance and correlating projections with post-silicon data. The role involves writing product/system development code, designing, developing, testing, deploying, maintaining, and improving CPU software modeling tools, and managing project priorities. | — | 0 |
| Senior Design Engineer, Google Cloud Networking This role is for a Senior Design Engineer on the Google Cloud Networking team, focusing on developing custom silicon solutions for Google's direct-to-consumer products and AI/Infrastructure. The engineer will be involved in the full ASIC design cycle, from RTL development to synthesis, timing closure, and silicon bring-up, with a focus on networking ASICs. | — | 0 |
| RTL Design Engineer, Google Cloud This role is for an RTL Design Engineer focused on developing custom silicon solutions for Google's direct-to-consumer products. The engineer will be involved in the entire ASIC SoC IP lifecycle, from microarchitecture definition and RTL coding to quality checks, design flow, and collaboration with various engineering teams. While the role is within an organization that supports AI infrastructure (MSCA), the core responsibilities are in hardware design, not direct AI/ML model development. | — | 0 |
| Power and Signal Integrity Engineer, PhD Graduate This role focuses on the design, simulation, and characterization of power and signal integrity for custom silicon solutions within Google's direct-to-consumer products. The engineer will work with various cross-functional teams to ensure IC designs meet system requirements and achieve high performance, utilizing both simulation tools and lab measurements. | — | 0 |
| RTL Design Technical Lead, Servers, Google Cloud This role is for an RTL Design Technical Lead focused on developing custom silicon solutions for Google's server infrastructure, including hardware for AI/ML systems. The role involves leading design activities from IP to SoC level, planning and executing projects, and collaborating with design and verification engineers. While the role is within an organization that supports AI/ML infrastructure, the core responsibilities are in hardware design (RTL) rather than direct AI/ML model development or deployment. | — | 0 |