Currently tracking 56 active AI roles, down 34% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $122k–$414k (avg $253k).
Intel currently has 84 active job listings related to artificial intelligence. The majority of these roles, 51%, are focused on serving infrastructure, with agents representing another significant portion at 24%. Engineering is the most frequent function for these positions. The company is actively hiring in the United States, China, and Mexico. Frequent technical tags include model serving, inference infrastructure, and agent orchestration. In the last 30 days, Intel has added 73 new AI roles, representing a 52% increase compared to the previous 30-day period.
Intel currently has 59 active AI-related roles in our index. The most common open titles are: AI Software Engineering Intern (3), AI Software Engineer Intern (2), GenAI Software Solutions Engineer (2), Graduate Talent (GenAI Software Solutions Engineer) (2), AI Algorithm Engineer. Most positions are in Engineering and Research.
Intel's active AI hiring is concentrated in: serving infrastructure (49%), agents (29%), application (8%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
Intel is hiring AI talent in: United States (28 roles), China (7 roles), Mexico (6 roles), Malaysia (6 roles).
Job postings at Intel most frequently reference: model serving, inference infra, agent orchestration, rag, tool use.
In the past 30 days, Intel has posted 28 new AI-related roles. That is a -63% change versus the prior 30 days (75 → 28).
| Title | Stage | AI score |
|---|---|---|
| Neuromorphic Applications Researcher- Temporary Position Research role focused on developing and benchmarking AI algorithms and robotics applications for Intel's next-generation neuromorphic architecture, aiming to enable physical AI systems with groundbreaking performance and efficiency. The role involves evaluating applications on neuromorphic hardware, validating the SDK, and publishing results. | ShipServe | 9 |
| AI Algorithm Research Intern – Neuromorphic Computing AI Algorithm Research Intern focused on developing, implementing, and benchmarking algorithms for Intel's next-generation neuromorphic architecture to enable applications in edge computing, signal processing, and autonomous systems. The role involves contributing to Intel's neuromorphic SDK and publishing research findings. |
| Data |
| 9 |
| Robotics Research Intern Robotics Research Intern at Intel focusing on advanced algorithmic development and robotics research for next-generation robotic technologies. The role involves researching, designing, and optimizing robotics algorithms, control systems, and AI/ML models, with a focus on enabling intelligent autonomous systems and innovative robotic applications. Collaboration with cross-functional teams to translate research into practical implementations is key. | Agent | 7 |
| AI Tools Development Intern Intern role focused on the development, validation, and deployment of AI tools such as GenAI assistants, RAG-based knowledge tools, and workflow automation agents within an enterprise AI context. Requires basic knowledge of ML/GenAI concepts and Python programming. | Agent | 7 |
| Software Enabling and Optimization Engineer Software Enabling and Optimization Engineer at Intel, focusing on optimizing software solutions for Intel's products across AI, Cloud, HPC, Graphics, and Edge. Responsibilities include collaborating with customers and vendors, debugging complex issues, conducting code reviews, researching innovative solutions, and providing technical consulting. | Serve | 5 |
| Hardware Design – AI Ecosystem Enabling Intern This intern role focuses on the hardware engineering aspects of AI ecosystem solutions, involving algorithm and framework design, AI software architecture, and optimizing AI solutions for hardware performance. It combines hardware engineering with AI/ML techniques for design efficiency and analysis, including implementing and tuning models, applied research, and system-level deployment. The role emphasizes AI augmenting engineering judgment. | Serve | 5 |
| SoC Functional Validation Intern Internship role supporting the functional validation of System on Chip (SoC) devices and systems, involving test content development, data analysis, and validation infrastructure. Requires programming experience in Python, C, or C++ and advanced English. | — | 0 |
| Senior CPU Pre-Si Verification Engineer Senior Pre-Si Verification Engineer for Intel's E-Core CPU team, responsible for verifying new and existing features for next-generation CPU IP using simulation-based environments and formal verification. Requires expertise in hardware description languages, test bench development (System Verilog UVM/OVM), programming languages, and functional coverage analysis. | — | 0 |
| Electrical Validation Engineering Intern- Client IO Electrical Validation Engineering Intern for Client IO team at Intel, focusing on validating high-speed and low-speed silicon interfaces. Responsibilities include hardware bring-up, lab testing, data analysis, and supporting automation framework development. Requires final-year Bachelor's or Master's in Electrical Engineering with Python/C++ experience. | — | 0 |
| Atom CPU Layout Design Engineer Job posting for an Atom CPU Layout Design Engineer at Intel in Guadalajara, Mexico. Responsibilities include physical implementation of memory compilers, custom IP blocks, and layout partitions for future-generation Intel Atom microprocessors. Requires a Bachelor's degree in a related field, 6+ months of layout design experience, and advanced English. Preferred qualifications include a Master's degree, VLSI/CMOS experience, and Unix/Linux knowledge. | — | 0 |
| Atom CPU Layout Design Engineer Job posting for an Atom CPU Layout Design Engineer at Intel in Guadalajara, Mexico. Responsibilities include physical implementation of memory compilers, custom IP blocks, and layout partitions for future-generation Intel Atom microprocessors. Requires a Bachelor's degree in a related field, 6+ months of layout design experience, and advanced English. Preferred qualifications include a Master's degree, VLSI/CMOS experience, and Unix/Linux knowledge. | — | 0 |
| Platform Applications Engineer Platform Applications Engineer at Intel, focusing on hardware technical marketing, customer support, and product lifecycle management. The role involves acting as a liaison between customers and internal teams, identifying market trends, and contributing to new product development and training materials. Requires strong technical expertise in hardware systems, project management, and cross-functional collaboration. | — | 0 |
| Memory Validation Intern Intern position contributing to the functional, power, performance, and memory validation of Intel silicon products. Responsibilities include debugging, data analysis, validation coverage assessment, test automation, and developing validation infrastructure. Requires current pursuit of a relevant Bachelor's or Master's degree and 3+ months of experience in signal integrity electronic circuit analysis and data analysis techniques. | — | 0 |
| Electrical Validation Intern Electrical Validation Intern at Intel, contributing to the functional, power, performance, and electrical validation of silicon products. Responsibilities include debugging, data analysis, coverage assessment, and potentially assisting with test automation and validation infrastructure development. The role requires a Bachelor's degree in Engineering and experience in signal integrity electronic circuit analysis. | — | 0 |
| High-Speed SerDes Simulation & Optimization Intern — I/O Next Generation R&D This internship focuses on developing automated simulation workflows for high-speed I/O technologies like PCIe, evaluating channel and circuit topologies, extracting channel models, and analyzing results to identify optimization opportunities. The role involves collaborating with engineers, executing parametric studies, and contributing to documentation for future server platforms and data center leadership. | — | 0 |
| Optical Component Link Simulation Student Worker Student worker role focused on developing and automating simulation workflows for next-generation electro-optical links, benchmarking link parameters, performing laboratory measurements to validate simulation models, and analyzing performance differences. The role involves synthesizing findings for component architecture recommendations and contributing to I/O specifications. | — | 0 |
| Electromagnetic Modeling Student Worker Intel's IOTS Pathfinding team is seeking an Engineer Intern to support readiness and scalability for next-generation high-speed I/O technologies. The role involves developing and validating 3D electromagnetic (EM) model libraries for interconnects using industry-standard tools to support signal integrity (SI) and power integrity (PI) evaluations. Responsibilities include running parametric studies, correlating simulations to measurements, and contributing to documentation and reusable modeling workflows. | — | 0 |
| Design Verification Student Worker This role is for a Design Verification Student Worker at Intel, focusing on SoC design and implementation for next-generation SoCs. The candidate will explore and implement new design methodologies that utilize AI engines and modern hardware description languages. Responsibilities include IP to SoC integration, developing automation scripts, debugging digital simulations, and collaborating with design engineers. The role requires pursuing a Master's or PhD in a related field with at least one year remaining, and experience in digital design, programming/scripting, hardware description languages, and pre-Si validation. | — | 0 |
| SoC/IP Design Verification Engineer SoC/IP Design Verification Engineer responsible for verification planning, UVM testbench development, test content creation, coverage closure, and debug across block, subsystem, and SoC levels. Collaborates with design, architecture, firmware, and validation teams. | — | 0 |
| CPU Pre-Silicon Verification Engineer Senior CPU Pre-Silicon Verification Engineer responsible for ensuring the functional correctness and robustness of CPU logic designs through pre-silicon verification methodologies. This involves developing and maintaining verification environments, test plans, coverage models, and debugging RTL and testbench failures. The role requires close collaboration with microarchitecture, design, and post-silicon teams to deliver high-performance, power-efficient, and reliable CPU IP. | — | 0 |