Tenstorrent
Semiconductors · RISC-V AI chip (Jim Keller)
- HQ
- Toronto, CA
- Founded
- 2016
- Website
- tenstorrent.com
Tenstorrent currently has 27 active AI-related job listings, with a significant majority, 81%, focused on serving infrastructure. Engineering roles comprise all of their AI hiring. The company is primarily hiring in the United States and Canada. Frequent technical tags include model_serving, inference_infra, and agent_orchestration, suggesting a focus on AI model deployment and management. In the last 30 days, Tenstorrent has not posted any new AI roles, representing a 100% decrease compared to the previous 30-day period.
Currently tracking 22 active AI roles, down 42% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $100k–$500k (avg $300k).
Semiconductors · RISC-V AI chip (Jim Keller)
Tenstorrent currently has 25 active AI-related roles in our index. The most common open titles are: Sr. Engineer, Software - AI Compiler (2), AI/ML Physical Design Flow Engineer, C++ Machine Learning Engineer, Models Training, Design Verification Lead, AI Hardware , Infrastructure and Platform Development Engineer. Most positions are in Engineering and Research.
Tenstorrent's active AI hiring is concentrated in: serving infrastructure (80%), agents (8%), application (4%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
Tenstorrent is hiring AI talent in: United States (10 roles), Canada (8 roles), Serbia (4 roles), Poland (2 roles).
Job postings at Tenstorrent most frequently reference: inference infra, model serving, fine tuning, agent orchestration, vision.
In the past 30 days, Tenstorrent has posted 1 new AI-related role.
| Title | Stage | AI score |
|---|---|---|
| Physical Design Engineer - STA Tenstorrent is seeking a Timing Engineer to drive static timing analysis and closure for complex, high-performance designs, collaborating with logic, DFT, and physical design teams to ensure chips meet performance targets. | — | 0 |
| CPU Architect, Load-Store CPU Architect role focusing on the load-store unit for high-performance out-of-order RISC-V CPUs, involving design, analysis, and optimization of memory hierarchy and data prefetchers. Collaboration with hardware and software teams is key. | — | 0 |
| Sr Staff Engineer, SoC RTL Design Tenstorrent is seeking a Sr Staff Engineer, SoC RTL Design to define, build, and optimize high-performance IP and SoC architectures for next-gen AI and compute workloads. This role involves RTL development, performance optimization, and collaboration with cross-functional teams in the design of cutting-edge AI semiconductors. | — |
| 0 |
| Staff Engineer, Physical Design Tenstorrent is seeking a Staff Engineer for Physical Design to implement high-performance CPU and AI/ML architectures. The role involves owning the complete physical design flow from synthesis to tapeout, optimizing for performance, power, and area on advanced process nodes. This is a hybrid role based in Austin, TX, Santa Clara, CA, or Fort Collins, CO. | — | 0 |
| CPU Core Design Verification Test Generator Lead | — | — |
| Technical Program Manager, Architecture | — | — |