Semiconductors · RISC-V AI chip (Jim Keller)
| Title | Stage | AI score |
|---|---|---|
| Performance Architect, AI HW Role focuses on analyzing and optimizing AI workloads on hardware architecture (Tensix) to improve performance, power, and area. Involves developing performance models, simulators, and collaborating with RTL, Compiler, and Runtime teams. Connects architecture, software, and RTL for next-gen AI systems. | Serve | 8 |
| Software Engineer, Metal Runtime (Core Systems) Software Engineer on the Metal Runtime team working on low-level software for AI accelerators, focusing on scheduling, memory movement, and efficient execution across parallel processors. The role involves building and optimizing high-performance runtime systems close to the hardware. | Serve | 7 |
| Design Verification Lead, AI Hardware |
| Serve |
| 7 |
| Sr. Software Engineer, AI Compiler Software Engineer role focused on developing and optimizing Tenstorrent's MLIR-based AI compiler (TT-Forge) to run AI models efficiently on Tenstorrent hardware. Responsibilities include optimizing computational graphs, creating custom dialects and transformation passes, and potentially developing human-in-the-loop tuning tools. | Serve | 7 |