AMD currently has 35 active AI-related job listings. The majority of these roles, 66%, are focused on serving infrastructure. Engineering is the dominant function, with 32 positions. Frequent technical tags include model_serving, inference_infra, and evals, suggesting a focus on the deployment and evaluation of AI models. In the last 30 days, AMD posted 37 new AI roles.
AMD currently has 62 active AI-related roles in our index. The most common open titles are: DC-GPU Performance Modeling Engineer (3), Data Center Engineer (2), Lead Packaging Automation Engineer (2), 3D IC and ADVANCED PACKAGING CAD ENGINEER , AI Framework Engineer. Most positions are in Engineering and Research.
AMD's active AI hiring is concentrated in: serving infrastructure (73%), agents (13%), application (6%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
AMD is hiring AI talent in: United States (27 roles), India (13 roles), China (7 roles), Canada (6 roles).
Job postings at AMD most frequently mention: GPU Computing, Computer Architecture, Compiler Design, Python, Performance Profiling.
In the past 30 days, AMD has posted 50 new AI-related roles. That is a -28% change versus the prior 30 days (69 → 50).
| Title | Stage | AI score |
|---|---|---|
| Senior Lead Verification Engineer (Leadership role) Senior Lead Verification Engineer at AMD in Bangalore, India, focusing on pre-silicon verification of Infinity Fabric transport layer, configurable switches, and die-to-die interconnects for client, server, graphics, and semi-custom markets. Responsibilities include developing and enhancing System Verilog/UVM testbenches, mentoring junior engineers, and collaborating with design and validation teams. | — | 0 |
| DIRECTOR, External Manufacturing Operations (Backend Engineering) This role is for a Director of External Manufacturing Operations (Backend Engineering) at AMD, focusing on Substrates & PCB manufacturing and advanced packaging. The position is based in Hsinchu, Taiwan, and requires strong technical knowledge, leadership experience, and project management skills to drive key performance metrics related to NPI projects, HVM sustaining, supplier readiness, and process optimization. The role involves managing supplier performance, yield attainment, issue resolution, and continuous improvement projects, with a focus on building and developing a high-performance team. | — |
| 0 |
| Strategic Sourcing Manager This role is for a Strategic Sourcing Manager at AMD, responsible for developing and managing global procurement strategies for Datacenter GPU test capabilities, including functional testers and CDU equipment. The role involves strategic supplier relationship management, negotiation, and providing analytical support for sourcing strategies. While the company mentions AI and the role requires understanding of AI tools, the core responsibilities are in sourcing and procurement, not direct AI/ML development. | — | 0 |
| Strategic Sourcing Manager (PCBA/Server/Rack BOM) This role is for a Strategic Sourcing Manager focused on PCBA/Server/Rack BOMs within AMD's Datacenter Platform Engineering Group. The responsibilities include NPI management, material readiness, risk mitigation, cost management, and supply chain enablement, collaborating closely with engineering teams. The role requires strong supply chain principles, BOM structure knowledge, and analytical skills. | — | 0 |
| Manager, System Level Performance Attainment This role is for a Manager of Silicon Design Engineering at AMD, focusing on end-to-end silicon performance and design execution for SoCs and accelerators. The role involves technical and organizational leadership in system-level performance attainment, hardware/software optimizations, silicon debug, and sustained performance delivery. It requires driving cross-functional alignment and leading a team of engineers to meet performance, power, and efficiency targets for current and future products. | — | 0 |
| Microprocessor VLSI Physical Design Engineer This role is for a VLSI physical design engineer at AMD, focusing on CPU and cache design for next-generation products. The engineer will be a technical lead, responsible for optimizing power, performance, and area, solving design and tool problems, and mentoring junior engineers. Experience in deep submicron processes, computer architecture, and various VLSI design stages is required. | — | 0 |
| Senior Linux Software Engineer Senior Linux Software Engineer at AMD responsible for enabling Linux distributions on AMD EPYC CPUs and Instinct GPUs, resolving functional and performance issues, and contributing to performance, automation, and development. The role involves collaboration with OS partners and internal AMD teams, and providing consultative direction to senior management. | — | 0 |
| Strategic Sourcing Sr. Manager This role is for a Strategic Sourcing Sr. Manager at AMD, focusing on leading global sourcing for board components, including those for AI platforms. The responsibilities involve developing and executing category strategies, managing supplier relationships, negotiating agreements, and ensuring supply continuity for critical semiconductor commodities from NPI through mass production. The role requires strong analytical skills, risk management, and cross-functional collaboration within the semiconductor industry. | — | 0 |
| BIOS/Firmware Development Engineer – Memory Subsystems (DDR/LPDDR) Develop and validate BIOS and firmware features for DDR/LPDDR memory subsystems, collaborating with hardware design, validation, and system teams to ensure robust integration and troubleshoot complex system-level issues. The role involves contributing across the full product lifecycle, from early architecture and simulation through silicon bring-up and production. | — | 0 |
| Fellow Software Development Engineer (Network Technology Group) Software engineer, architect, and technical lead for embedded firmware on AMD networking products, focusing on next-generation networking for cloud, hyperscale data centers, and AMD's AI systems. Involves hardware/software interface, C programming, system-level problem-solving, and collaboration with silicon, driver, and test teams. | — | 0 |
| Design Verification Engineer Design Verification Engineer at AMD working on networking technologies for data centers, including AI and data center applications. Responsibilities include developing UVM-based testbench architectures, execution of verification plans, debugging complex issues, and collaborating with cross-functional teams. Requires expertise in SystemVerilog, UVM, and industry protocols like PCIe and Ethernet. Preferred qualifications include experience with performance verification, networking pipelines, and FPGA/HAPS validation. | — | 0 |
| SOC Debug tools validation Engineer This role is for a SOC Debug tools validation Engineer at AMD, focusing on the validation and debugging of Silicon Debug Tools products. The engineer will be responsible for creating test strategies, executing test plans, coordinating debug efforts, and ensuring product quality across various engineering teams. While AI is mentioned in the company's mission and a general statement about AI use in screening, the core responsibilities of this specific role are not AI/ML-centric. | — | 0 |
| Sr. STAFF Silicon Design Engineer This role is for a Sr. Staff Silicon Design Engineer focused on designing high-performance RF ADCs and DACs for FPGA devices. Responsibilities include developing circuit architectures, simulation, verification, layout collaboration, EMIR and reliability validation, design reviews, and post-silicon validation. Requires at least 5 years of experience in data converters and/or high-speed circuits, with a Bachelor's or Master's degree in Electronic Engineering. | — | 0 |
| Senior Design Verification Engineer – Security IP This role is for a Senior Design Verification Engineer focused on Security IP (SECIP) development at AMD. The engineer will be responsible for block-level functional verification and subsystem-level integration and verification of embedded micro-processor subsystems and hardware accelerators. The role involves developing verification architectures, testbenches, and test plans using SystemVerilog/UVM, C-DPI, and formal verification methodologies. Key responsibilities include debugging simulations, analyzing coverage, collaborating with design teams, and providing technical leadership in verification methodology and problem resolution. While the company mentions AI and its role in computing experiences, this specific position is centered on hardware verification, not AI model development or deployment. | — | 0 |
| Product Engineer - FPGA/Emulation & ACAP Compilation Tools Product Engineer at AMD focusing on FPGA/Emulation & ACAP Compilation Tools. This role involves owning emulation and prototyping product areas, driving customer escalations, triaging issues, exploring innovative methodologies, and developing training materials. Requires MS or equivalent experience with 8+ years in Electrical Engineering or similar, with strong knowledge of RTL design flows, pre-silicon validation, emulation/prototyping, and scripting. | — | 0 |
| Lead DPDK Optimization Engineer Lead DPDK Optimization Engineer at AMD in Bangalore, India. Focuses on performance optimization and benchmarking of DPDK-based data plane applications across CPU/GPU/NPU platforms. Requires mandatory DPDK development experience and strong Linux systems knowledge. | — | 0 |
| Design Verification Engineer Design Verification Engineer for AMD's graphics processor IP. Responsibilities include planning, building, and executing verification tests, debugging failures, and collaborating with architects and engineers. Requires proficiency in IP level ASIC verification, UVM, Verilog, System Verilog, C/C++, and debugging firmware/RTL. | — | 0 |
| Physical Design Lead – Full Chip & Chiplet SoC This role is for a Physical Design Lead at AMD, focusing on the physical design of complex chiplets for advanced technology nodes. The responsibilities include full chip floorplan, PnR closure, timing targets, and signoff functions, while collaborating with various internal and external teams. The role emphasizes PPA (Power, Performance, Area) optimization and schedule adherence. Although the company mentions AI in its mission and for applicant screening, the core of this role is in hardware/silicon design, not AI/ML model development. | — | 0 |
| MTS Silicon Design Engineer This role is for an MTS Silicon Design Engineer at AMD, focusing on architecting and delivering high-performance ASIC solutions for next-generation data center networking. The work involves the full development lifecycle from architecture to RTL implementation, verification, and validation, with a focus on solving system-level challenges for AI training and inference clusters. The role requires strong ASIC design experience and a system-level mindset, with a preference for experience in high-speed networking, data center, or AI infrastructure silicon. | — | 0 |
| Senior Manager - Analog Design Senior Manager for Analog Design at AMD, focusing on Memory I/O design for future LPDDR IPs. Responsibilities include circuit architecture, specification definition, system simulation, and implementation of high-speed analog and digital blocks. The role involves managing a team, collaborating with various disciplines, and developing models for link performance simulation. | — | 0 |
| ABL Memory - Firmware Engineer Firmware Engineer responsible for enabling key memory technologies (DDR4/DDR5/NVDIMM) of different DIMM types across AMD Embedded SoC products. This role involves designing, prototyping, implementing features, and managing firmware releases. | — | 0 |
| Firmware Technical Leader (IC role) This role is for a Firmware Technical Leader at AMD, focusing on BIOS/BMC firmware development for AMD's computing platforms. The role involves coordinating with various engineering teams to design and implement platform firmware, offering technical analysis, and providing consultation. While the company mentions AI and data centers, the core responsibilities are in traditional firmware engineering, not AI/ML model development. | — | 0 |
| RTL Design Engineer AMD is seeking an RTL Design Engineer to join their Adaptive and Embedded Computing Group. The role involves designing and implementing cutting-edge processor designs, working closely with architecture, IP design, Physical Design teams, and product engineers to achieve first-pass silicon success. Responsibilities include owning the design and implementation of blocks, guiding verification, designing logic functions for efficient test and debug, and implementing automation to increase design team efficiency. The ideal candidate has a strong background in front-end RTL engineering, excellent communication and problem-solving skills, and experience with various protocols and design methodologies. | — | 0 |
| Staff Technical Marketing (Applications) Engineer- Embedded x86 This role is for a Staff Technical Marketing Engineer at AMD, focusing on x86-based processing systems for embedded applications. The engineer will be responsible for customer enablement, field engagement, developing reference designs, providing technical support, running benchmarks, and creating technical documentation and training materials. The role requires deep technical expertise in system architecture, hardware, firmware, and low-level software, with strong programming skills in Python, Perl, C/C++, and assembly. While the company is a major player in AI hardware and mentions AI in the JD, this specific role is focused on the underlying x86 systems and customer enablement rather than direct AI/ML model development or research. | — | 0 |
| RAS Lead This role is for a RAS (Reliability, Availability, Serviceability) Lead in AMD's Embedded BU, focusing on defining and developing the RAS charter, planning at the pre-silicon stage, and ensuring feature enablement and validation. The role requires strong leadership, technical depth in hardware and firmware aspects of RAS features for x86 IPs, and experience with cross-functional teams and high-speed I/Os. The lead will drive planning, execution, risk assessment, and documentation for RAS features, ensuring quality and timely delivery. | — | 0 |
| CPU Performance Architect This role focuses on analyzing and optimizing the architectural performance of AMD's PC and Gaming processors, including CPU and AI workloads. Responsibilities include performance modeling, debugging SOC performance issues, and developing performance evaluation tools. The role requires strong analytical skills, experience with computer architecture, system simulation, and performance evaluation, as well as proficiency in C/C++. | — | 0 |