This role is for a Sr Staff Engineer focused on CPU system microarchitecture, specifically combining cores, clusters, and subsystems. The engineer will be responsible for RTL coding, simulation, synthesis, and power analysis, collaborating with various teams to deliver a functional design. The role involves optimizing power, performance, and area, and enhancing the RTL design environment.

Inventory Manager responsible for end-to-end visibility, accuracy, and control of company-owned inventory across global locations, partnering with Supply Chain, Manufacturing, Finance, and Quality teams. Requires strong understanding of semiconductor manufacturing, outsourced operations, and ERP systems (SAP S4 HANA).

Tenstorrent is seeking a Power Architect to drive architectural strategy, modeling, and design decisions for power optimization in their AI compute systems. This role involves predicting and tracking power consumption, proposing architectural changes, building workloads to stress use cases, and correlating pre-silicon estimates to silicon measurements. The position requires extensive experience with power estimation tools and a background in power-optimization of compute datapath and/or interconnects.

This role focuses on the physical design and EMIR (Electromigration and IR-drop) analysis for high-performance ICs, specifically for AI chips and RISC-V CPUs. The engineer will ensure robust power delivery, signal integrity, and long-term reliability, working with RTL and physical design teams on advanced technology nodes.

Tenstorrent is seeking a Timing Engineer to drive static timing analysis and closure for complex, high-performance designs, collaborating with logic, DFT, and physical design teams to ensure chips meet performance targets.

CPU Architect role focusing on the load-store unit for high-performance out-of-order RISC-V CPUs, involving design, analysis, and optimization of memory hierarchy and data prefetchers. Collaboration with hardware and software teams is key.

Tenstorrent is seeking a Staff Design for Test Engineer to work on high-performance AI/ML architectures. The role involves all implementation aspects from RTL to tapeout, focusing on reducing test cost, attaining high coverage, and facilitating debug and yield learnings. Responsibilities include implementing DFT features, owning ATPG and test coverage analysis, planning and verifying MBIST, and developing DFx flows.

This role focuses on validating high-speed interfaces like PCIe for next-generation AI hardware. It involves debugging complex system-level issues across hardware and firmware, collaborating with cross-functional teams, and working with lab equipment. The role is not directly building AI models or systems but is crucial for the underlying hardware infrastructure.

Program Manager for a talent development initiative in the semiconductor industry, in partnership with a government agency. Focuses on project leadership, financial oversight, and cross-functional coordination to train semiconductor design engineers.

Tenstorrent is seeking a Verification Engineer in Tokyo to ensure the functionality and performance of their System-in-package, which integrates multiple chiplets. The role involves verifying digital IP and SoC logic, building verification infrastructure, creating testbenches, and collaborating with global teams. Experience in CPU or SoC verification and knowledge of Verilog/System Verilog are required.

Tenstorrent is seeking a Staff Design for Test (DFT) Engineer for their high-performance AI/ML architectures. The role involves RTL implementation, ATPG, test coverage analysis, JTAG, scan compression, ASST, gate-level simulation, silicon bring-up support, MBIST, and DFx flow development for ASIC designs. Experience with finFET technologies and industry-standard DFx tools is required.

Tenstorrent is seeking a Senior DFT Engineer to design and integrate chiplets into a System-in-package, focusing on DFT implementation for high-speed CPU core design. Responsibilities include building chip-level DFT strategies, inserting test features, collaborating with cross-functional teams, scripting EDA tools, and supporting silicon bring-up.

Tenstorrent is seeking a Sr Staff Engineer, SoC RTL Design to define, build, and optimize high-performance IP and SoC architectures for next-gen AI and compute workloads. This role involves RTL development, performance optimization, and collaboration with cross-functional teams in the design of cutting-edge AI semiconductors.

Tenstorrent is seeking a Staff Engineer for Physical Design to implement high-performance CPU and AI/ML architectures. The role involves owning the complete physical design flow from synthesis to tapeout, optimizing for performance, power, and area on advanced process nodes. This is a hybrid role based in Austin, TX, Santa Clara, CA, or Fort Collins, CO.

Recruiting Coordinator for an AI technology company, focusing on managing interview logistics and candidate experience. This is a contract position with potential for extension or full-time conversion.