AMD currently has 35 active AI-related job listings. The majority of these roles, 66%, are focused on serving infrastructure. Engineering is the dominant function, with 32 positions. Frequent technical tags include model_serving, inference_infra, and evals, suggesting a focus on the deployment and evaluation of AI models. In the last 30 days, AMD posted 37 new AI roles.
AMD currently has 59 active AI-related roles in our index. The most common open titles are: DC-GPU Performance Modeling Engineer (3), Sr. Software Development Engineer (3), Data Center Engineer (2), MTS Software Development Engineer (2), Software Development Engineer (2). Most positions are in Engineering and Research.
AMD's active AI hiring is concentrated in: serving infrastructure (78%), data (10%), agents (5%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
AMD is hiring AI talent in: United States (30 roles), India (13 roles), Poland (5 roles), China (5 roles).
Job postings at AMD most frequently mention: GPU Computing, Computer Architecture, Python, C++, PyTorch.
In the past 30 days, AMD has posted 70 new AI-related roles.
| Title | Stage | AI score |
|---|---|---|
| AI Framework Eng. Software engineer focused on building and optimizing robust, efficient software components for high-performance execution of large language models and multimodal models across multi-GPU systems. The role involves collaborating with internal teams and open-source maintainers to improve throughput, latency, and scalability, with an emphasis on full-stack development within AI inference systems and model behavior. | Serve | 8 |
| Principle AI Software Engineer Seeking a Principal AI Software Engineer to lead the design and development of next-generation AI inference systems, intelligent model routing, and cloud-native deployment technologies for AMD Instinct GPUs. This role involves working with LLM serving, semantic routing, Kubernetes, Envoy, AI gateways, and open-source infrastructure to enable high-performance, production-ready AI software. | ServeAgent |
| 8 |
| Senior Staff AI Software System Design Engineer Senior Staff AI Software System Design Engineer at AMD, focusing on custom development, debugging, optimization, and technical support of machine learning software for AMD server GPUs. The role involves working with AI frameworks, distribution, kernel operators, compilers, and runtimes, with a strong emphasis on performance optimization for inference and training workloads. Responsibilities include supporting customer Proofs of Concept (PoCs), driving custom AI software requirements from POC to release, and collaborating with various teams to optimize training and inference solutions. | ServePost-train | 8 |
| GPU Kernel Development Engineer GPU Kernel Development Engineer at AMD focused on optimizing deep learning frameworks (TensorFlow, PyTorch) for AMD GPUs. The role involves developing and optimizing GPU kernels, deep learning models, and improving training/inference performance across distributed systems, leveraging compiler technologies and low-level programming. Collaboration with internal GPU library teams and open-source maintainers is key. | ServePost-train | 7 |
| Sr. Software Development Engineer Senior Software Development Engineer focused on optimizing AI/ML models (CNN, Transformer, LLM, multimodal) for AMD hardware platforms. Responsibilities include developing quantization, low-precision, and compression features, building production-quality Python tools, and analyzing performance tradeoffs. Collaborates with researchers, framework engineers, and hardware experts. | ServePost-train | 7 |
| Program Manager-Diag AMD is seeking a Program Manager to drive the planning, execution, and delivery of diagnostic, debug, validation, and enablement software for complex silicon programs. This role involves coordinating globally distributed teams, managing program readiness, supporting customer-facing debug activities, and ensuring timely delivery of diagnostics for silicon bring-up, validation, production readiness, and customer enablement. The ideal candidate is a proactive program leader who can navigate ambiguity, align technical teams, and manage multiple priorities in a fast-paced environment. | — | 0 |
| Project/Program Manager Project/Program Manager at AMD in Suzhou, China, responsible for ensuring supply for GPU mass production, including demand/supply alignment, material readiness, engineering information delivery, and schedule management. The role involves integrated financial analysis, supply chain risk management, inventory management, and collaboration with various business functions. | — | 0 |
| Systems Design Engineer This role is for a Systems Design Engineer at AMD, focusing on customer server system development program technical support from concept to end of life. It involves concept design, schematic and layout review, signal integrity and power integrity, electrical validation, system integration, and manufacturing support. The engineer will work with partners to enable successful deployment of AMD server platforms, provide technical collateral, perform design reviews, support bring-up and validation, and engage directly on technical topics with customers and internal teams. | — | 0 |
| Customer Debug Lead Customer Debug Lead at AMD, focusing on enabling successful deployment of AMD server platforms by providing technical collateral, debugging, and solutions to customers. The role involves hardware/software platform design, system architecture, and direct customer engagement for issue resolution. | — | 0 |
| Memory/SSD Engineer This role is part of a highly technical silicon validation team responsible for Memory/SSD sub-system. The focus includes DDR5/DDR4/LPDDR5 memory interfaces, Storage/SSD platform-level validation, and close co-work with ODMs, DIMM vendors, and SSD ecosystem partners to ensure robust end-to-end system enablement. | — | 0 |
| DFT Engineer This role is for a DFT Engineer at AMD, focusing on the definition, implementation, and verification of Design for Test (DFT) for System-on-Chip (SOC) within the Strategic Silicon Solution Business Unit. The engineer will work on cutting-edge DFT technology, participate in SOC DFT architecture definition, implement various DFT functions (SCAN, MBIST, etc.), perform verification, generate timing constraints, and assist with ATE bring-up and DFX logic. | — | 0 |
| Physical Design Engineer This role is for a Physical Design Engineer at AMD, focusing on SOC solution delivery and implementation optimization. The engineer will lead PPA optimization and 3DIC solutions, and develop AI methods to improve FEINT and PD work efficiency. Experience with RTL-to-GDS, advanced process nodes, 3DIC design, and PPA optimization is preferred, especially in combining AI methods. | — | 0 |
| Silicon Design Engineer This role focuses on Silicon Design Engineering at AMD, specifically within the Design Assembling and Qualification (DAQ) team. Responsibilities include defining, designing, and integrating ASIC development, module interfaces, and evaluating the process flow from design to synthesis and place/route. The role requires familiarity with SystemVerilog HDL, ASIC front-end implementation, IP construction, and scripting languages. | — | 0 |
| Physical Design Engineer Seeking a Senior Silicon Design Engineer to join the GPU design team, focusing on the physical design of high-speed microprocessors using advanced CMOS technologies. Responsibilities include driving design implementation, executing PnR, analyzing design results, and collaborating with cross-functional teams. | — | 0 |
| Customer Quality Engineer (CQE) Experienced Customer Quality Engineer (CQE) to manage customer-facing quality, drive resolution of product/field issues, and act as a technical interface between customers and internal teams, ensuring product quality and reliability throughout the product lifecycle. Responsibilities include managing customer communications for nonconformances, leading structured problem-solving (8D), monitoring key metrics, and partnering with engineering teams for root cause analysis. | — | 0 |