Intel

Intel's AI Solutions Group is seeking an MSc/PhD student to work on state-of-the-art AI capabilities for chip development. The role involves solving high-value problems using ML, DL, and LLMs, from ideation and research to preparing solutions for deployment. Requires strong Python, ML/DL knowledge, and familiarity with AI tools like PyTorch or Scikit-learn.

Lead a digital design team developing cutting-edge AI SoCs, focusing on RTL coding, PPA analysis, and cross-functional collaboration for high-end chip design.

Seeking a Verification Team Leader for Intel's AI group in Israel to manage a team, develop verification plans, oversee verification environments, and collaborate with design teams for cutting-edge AI hardware products. Requires 10+ years in VLSI chip verification, 4+ years in leadership, and experience with SoCs and AI applications.

Student/Intern role focused on DevOps and Infrastructure Engineering, with exposure to AI tools and technologies. The role involves hands-on development in Python for various DevOps environments (GitHub, Jenkins, K8s, Azure Cloud) and exploration of other programming languages like JavaScript, TypeScript, and Node.js. While AI is mentioned as a tool to enhance work, the core responsibilities are in DevOps and infrastructure.

Student role focused on tactical planning, cost savings, efficiency, process improvements, analysis, budget control, and procurement management within Intel's Client Validation Engineering organization. Requires economics, finance, or related studies, with AI tool usage and supply chain experience being advantageous.

Student role focused on supporting the adoption of Intel's Design Generative AI tools through communication, community building, training, and feedback collection. The role involves user research, go-to-market execution, community management, and creating enablement assets to drive product adoption and gather user insights.

Student role in a semiconductor manufacturing environment focused on data science and automation. Responsibilities include supporting daily operations, identifying and automating manual bottlenecks, and building AI-driven solutions for data analysis and predictive methodologies. Requires strong Python and SQL skills, analytical abilities, and willingness to learn manufacturing processes.

Student role focused on system-level modeling and specification definition for analog and mixed-signal blocks in Wi-Fi and Bluetooth SoCs. The role involves using AI-assisted tools to accelerate analysis and modeling, conducting research, and defining block-level specifications. It requires an MSc student with strong fundamentals in analog/mixed-signal circuits and experience with modeling environments like MATLAB or Python.

Software Development Student role focused on building tools and capabilities for testing and validating Intel's next-generation products. The role involves working on an IDE-based, mission-critical project using a Domain Specific Language (DSL) developed by Intel, with a focus on quality, fast-paced delivery, and user experience. Experience with building GenAI applications is a plus.

Intel is seeking a Firmware Integrator and Release Manager to manage firmware integration and release activities for their Infrastructure Processing Unit (IPU). The role involves collaborating with various teams, preparing releases, and contributing to firmware/microcode development for Xtensa and ARM microprocessors. Requires 7+ years of embedded software development experience in C, Linux/RTOS environments, and Git.

Student role focused on IT operations and DevOps, involving ticket resolution, scripting (PowerShell), automation tool development, server management, and CI/CD processes within an enterprise environment. The role progresses from operational tasks to development projects.

Intel is seeking a Security Software Development Engineer to validate TDX (Trusted Domain Extensions), a technology for confidential computing and virtualization. The role involves building frameworks and automation for validation across firmware, OS, drivers, middleware, SDKs, and applications. Requires 3-5 years of software/hardware validation experience and C/C++ coding proficiency. Preferred knowledge includes OS/virtualization pre/post-silicon validation and Specman/System Verilog.

Seeking an experienced System Architect to define and develop wireless communication system architectures, focusing on HW/SW partitioning, VLSI hardware architecture, and real-time SW/firmware development for next-generation Wi-Fi technology.

Develop and optimize testability and manufacturability for cutting-edge integrated circuits, from early feasibility to high-volume production. Evaluate and debug new designs on ATE platforms, characterize devices, define specifications, and perform yield analysis to ensure seamless post-silicon ramp and product launch.

Student role focused on developing tools and methodologies for formal verification of future CPU products within Intel's Core HW Design Verification Team. Requires familiarity with Python and Linux.

Student role focused on power and performance post-silicon validation of Intel's client CPU products. Responsibilities include system setup, calibration, and execution of power/performance studies in a lab environment.

Student role in Intel's Validation Engineering lab, assisting with engineering trials, testing, and maintenance of complex systems using test equipment, computers, and automation robots. Requires current Electrical/Computer Engineering studies and ability to work on-site.

Intel is hiring a Post Silicon Validation Engineer in Haifa, Israel. This role involves developing validation architecture, test plans, methodologies, infrastructure, and content. The engineer will also perform deep dive investigations, advanced hardware/firmware/software debug, and bug fix definition for next-generation Intel processors. The position is for a College Grad and requires an on-site presence.

Seeking a Practical Engineering student for a semiconductor manufacturing facility to support advanced equipment, learn maintenance and troubleshooting, and collaborate with engineering teams. Role involves hands-on experience in a high-volume, cutting-edge fabrication environment.

This role is for a Facility Category Manager at Intel, responsible for managing supply chain strategies, supplier relationships, and procurement processes for facilities services, real estate, construction, and maintenance programs. The candidate will develop commodity strategies, manage supplier performance, and ensure cost-effectiveness and sustainability.

This role focuses on the physical design and process technology for Intel's High Performance Processor (P-Core) CPUs. Responsibilities include synthesis, place and route, timing analysis, power optimization, and developing physical design methodologies using industry EDA tools.

CPU Circuit Design Engineer role at Intel, focusing on designing next-generation CPU cores and SoCs. Responsibilities include detailed circuit analysis, design implementation, and optimization at the transistor level, meeting power, performance, and area targets. Requires BSc/MSc in EE/CE and at least 2 years of VLSI/circuit design experience.

Develops and optimizes Intel's oneAPI Collective Communications Library for AI accelerators and GPUs, focusing on performant graph modes and efficient scaling solutions for inference and training. Requires strong C++ and Linux development skills, with experience in multithreaded programming and optimization.

Lead a system integration team for Intel's WiFi products, focusing on delivering best-in-class wireless performance, defining and driving system POCs, and integrating new features and hardware. The role involves leading and mentoring engineers, enhancing integration capabilities, and driving group targets, with an emphasis on using automation and AI-based capabilities to improve efficiency.

Executes functional validation and performance characterization for on-chip power delivery IP, identifies and resolves power delivery issues, and partners with cross-functional engineering teams to drive design optimization.

Power management architect for Intel Architecture group, defining state-of-the-art CPU end-to-end power handling, including active and idle power management solutions, and interaction with OS, driver, and platform components. Focus on defining next-generation CPU power management architecture and delivering architectural specifications, initiating, guiding, and coordinating the design of new ideas and products, and driving implementation post-silicon.

Intel is seeking a Senior Linux Kernel Developer to join their team developing drivers for Intel's AI accelerators. The role involves collaborating with various engineering teams and contributing to the Linux kernel community. Requires 6+ years of Linux kernel development experience and hands-on experience with PCIe accelerator drivers.

Intel is seeking a Static Timing Analysis (STA) Engineer to join their BE Integration team, focusing on the design of future generation high-performance Intel microprocessors. The role involves advanced timing analysis, integration, optimization, and collaboration with cross-functional teams to ensure silicon meets performance requirements, power, frequency, and area targets. The engineer will also contribute to improving physical design methodologies and flow automation.

Student intern role focused on firmware verification for Intel's Core CPU, involving C++ and Python for developing and analyzing verification environments, tests, and tools for power-management firmware. The role covers the entire firmware development cycle from Pre-Si to Post-Si, including hardware component modeling and functional validation.

Student role in Mechanical, Materials, or Chemical Engineering at Intel Kiryat Gat, focusing on supporting day-to-day engineering advanced work, implementing new processes, and automation solutions in manufacturing. Requires strong data analysis abilities and statistical knowledge is an advantage.

Electrical Engineer to drive silicon processes and collaterals for advanced Intel wireless products, working with foundries to deliver next-generation wireless solutions.

Senior VLSI Process Design Engineer role focused on optimizing Intel's process technology for power, performance, and area (PPA) of Intel IPs. Responsibilities include conducting experiments, defining methodologies, building tools, analyzing results, and collaborating with design teams.

Firmware Architect role at Intel focusing on designing and developing embedded software solutions, emphasizing security and performance. Responsibilities include defining architectural frameworks, translating requirements, developing algorithms, leading vulnerability assessments, and collaborating with engineering teams on implementation and new technology adoption. Requires strong C/low-level Linux driver experience and firmware architecture/system-level design.

Experienced Full Stack Cloud Software Developer with a strong backend orientation to design, build, and maintain software components and tools used across the organization. Will work on complex software systems, collaborate with multiple teams, and contribute across the full software development lifecycle.

Develops firmware for Infrastructure Processing Units (IPUs) / Smart-NICs, which offload tasks from host CPUs for cloud data centers. The role involves collaborating with various teams, analyzing code, gathering requirements, developing algorithms, writing and debugging firmware on pre-silicon and silicon platforms, and troubleshooting complex issues. Additionally, the role will leverage AI tools to improve development and validation efficiency.

Experienced Logic Designer to join the Ethernet Silicon Engineering Group, focusing on developing state-of-the-art IPU and NIC products for Data Centers. The role involves leading full development cycles from architecture to tape-out, collaborating with various teams, and working with the latest silicon technologies.

Intel is seeking an IP Design Verification Engineer with 6+ years of experience in Pre-Si verification. The role involves developing IP verification plans, test benches, and simulation models to ensure design specifications are met. Responsibilities include debugging issues, collaborating with cross-functional teams, and maintaining verification infrastructure. Requires strong skills in Specman “e” / System Verilog and understanding of verification methodologies.

Designs, develops, and executes power and performance plans for IPs and SoCs. Identifies, builds, and maintains power, thermal, performance/watt optimizations, and characterizations for IPSoC power and performance goals. Conducts feature analysis from power and performance standpoint and drives to close any gaps between observed behavior and target on platforms in development. Provides recommendations for future architectures. Develops and enhances innovative tools for architectural performance analysis. Develops methodologies and models to drive continuous improvements in optimization of power and performance configurations to meet market requirements. Ensures platform and its components are optimized for performance and power balance. Identifies power activity zones and works with design, architecture, binning/technology, and manufacturing teams on ways to meet power consumption goals. Works cross functionally on analysis, validation, and tuning of architectures and features that advance the state of art in performance and efficiency.

Experienced Facilities Electrical Engineer responsible for the reliability and continuous improvement of Mega plant electrical systems, including electrical distribution, Medium Voltage systems, low voltage Centre, UPSs, Emergency Generator, and VFDs, supporting safe, reliable, and efficient plant operations. Collaborates with local and global teams to ensure consistency with global standards.

Senior CPU Physical Design Engineer responsible for the design and delivery of high-performance CPU blocks from RTL to GDS, including synthesis, floorplanning, place and route, CTS, timing closure, and verification. Requires 10+ years of experience with industry-standard EDA tools.

This role is for a CPU Physical Design Engineer at Intel, focusing on the design and delivery of high-performance CPU blocks from RTL to GDS. Responsibilities include executing the full physical design flow, leading verification and sign-off, and optimizing designs for power, performance, and area using industry-standard EDA tools. The role requires a BSc or MSc degree in Electrical or Computer Engineering and at least 7 years of experience in physical design.

Practical Engineering student role in a semiconductor manufacturing facility, focusing on operating and supporting advanced equipment, learning maintenance, and assisting engineering teams with troubleshooting and process improvement. Requires enrollment in a Mechanical or Mechatronics Practical Engineering program with at least three semesters remaining.

System Validation Engineer at Intel responsible for defining, developing, and performing functional validation for Thunderbolt technology. This involves engaging from early product stages to define HW/FW hooks, developing methodologies and test plans, executing plans, and collaborating with engineers for design optimization, troubleshooting, and failure analysis. The role requires FPGA and Silicon debug, understanding the full stack (HW/FW, driver, OS), and applying various tools and techniques to ensure validation coverage. The engineer will publish validation reports, work with cross-functional teams (architecture, design, verification, etc.) to improve debug and validation strategies, and develop content for IP interactions. The role also involves engaging in all product life cycle phases, developing and validating content and infrastructure, and performing bug hunts in simulation, emulation, and FPGAs to ensure silicon readiness.

Experienced Post Silicon Validation Engineer needed to join Intel's CPU CORE Validation team. Responsibilities include validating product features, debugging functional bugs, and working with architecture and design teams. Requires BSC/MSC in Electrical Engineering, Computer Engineering, Software Engineering, or Computer Science with 2-7 years of expertise in Post Silicon chip functional validation. Python and Assembly programming skills are advantageous.

Software developer for Linux Wifi team at Intel, contributing to open-source code for Intel's wifi devices on Linux. Role involves working on the Linux kernel in C, focusing on networking, PCI, and the wifi stack.

This role focuses on enabling next-generation high-speed I/O technologies by leading PHY and SerDes IP validation and integration for future platforms. Responsibilities include pre-silicon validation of PHY IPs for standards like PCIe Gen7 and Ethernet 1.6T, evaluating internal and third-party IPs, defining IP requirements, developing integration guidelines, and debugging test chips. Requires a Bachelor's degree in Electrical Engineering with 3+ years of experience in electrical validation and debugging, and a solid understanding of SerDes architectures.

Senior DFT Design Engineer focused on post-Silicon product design enabling and optimization for client products. Responsibilities include resolving product quality and performance issues using design and manufacturing problem-solving expertise.

Seeking a Senior Design Engineer with 10+ years of experience in Block Level design and 3+ years in Cache systems to join the AI industry's Habana group at Intel. Responsibilities include designing and implementing IP solutions, collaborating with cross-functional teams, and ensuring the quality and performance of IP designs. Requires B.Sc. in Electrical Engineering or Computer Engineering and strong RTL skills in System Verilog.

Senior Physical Design Technical Lead at Intel, responsible for leading and driving backend implementation of advanced wireless products. This role involves defining and improving design implementation flows, automation, and signoff methodologies, optimizing PPA metrics, and collaborating with other design teams. Requires extensive experience in VLSI physical design, proficiency in Synopsys tools, and scripting skills.

Develop logic design, RTL coding, simulation, and DFT timing closure support. Define and implement SoC main debug Fabrics (TAP and Scan). Develop automatic tools to improve design and integration. Work with Architecture, Silicon, and Manufacturing teams to define new features and improve DFT capabilities (Power, Performance, Test Time, coverage). Define validation activities and work with validation owners to increase coverage and design quality. Define IPs DFT requirements to meet SoC quality, support IPs integration and validation. Develop HVM ready content, enable it on Pre Si ENV and real Silicon. Drive Coverage improvement, DPM reduction and faster Content enabling on Silicon.