Intel currently has 84 active job listings related to artificial intelligence. The majority of these roles, 51%, are focused on serving infrastructure, with agents representing another significant portion at 24%. Engineering is the most frequent function for these positions. The company is actively hiring in the United States, China, and Mexico. Frequent technical tags include model serving, inference infrastructure, and agent orchestration. In the last 30 days, Intel has added 73 new AI roles, representing a 52% increase compared to the previous 30-day period.
Currently tracking 56 active AI roles, down 34% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $122k–$414k (avg $253k).
Intel currently has 59 active AI-related roles in our index. The most common open titles are: AI Software Engineering Intern (3), AI Software Engineer Intern (2), GenAI Software Solutions Engineer (2), Graduate Talent (GenAI Software Solutions Engineer) (2), AI Algorithm Engineer. Most positions are in Engineering and Research.
Intel's active AI hiring is concentrated in: serving infrastructure (49%), agents (29%), application (8%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
Intel is hiring AI talent in: United States (28 roles), China (7 roles), Mexico (6 roles), Malaysia (6 roles).
Job postings at Intel most frequently reference: model serving, inference infra, agent orchestration, rag, tool use.
In the past 30 days, Intel has posted 28 new AI-related roles. That is a -63% change versus the prior 30 days (75 → 28).
| Title | Stage | AI score |
|---|---|---|
| Data Science Student for AI Solutions Group Intel's AI Solutions Group is seeking an MSc/PhD student to work on state-of-the-art AI capabilities for chip development. The role involves solving high-value problems using ML, DL, and LLMs, from ideation and research to preparing solutions for deployment. Requires strong Python, ML/DL knowledge, and familiarity with AI tools like PyTorch or Scikit-learn. | Post-train | 8 |
| Chip Design Team Lead - AI SOC Lead a digital design team developing cutting-edge AI SoCs, focusing on RTL coding, PPA analysis, and cross-functional collaboration for high-end chip design. | Serve | 7 |
| Serve |
| 7 |
| DevOps & Cloud Infrastructure Engineer DevOps & Cloud Infrastructure Engineer to design, implement, and automate cloud-based solutions on the Azure platform. The team builds and provides the infrastructure powering the AI era across all DCG organizations, enabling scalable, secure, and innovative cloud solutions worldwide. Responsibilities include designing and maintaining scalable, secure, and automated cloud infrastructure on Azure, building and optimizing CI/CD pipelines, managing containerized environments, and developing automation scripts. Qualifications include a Bachelor's degree, strong background in IT infrastructure, Azure experience, CI/CD tools, Kubernetes, Docker, Python, and experience with AI tools and technologies. | — | 5 |
| RTL Design & Verification Engineer – AI This role is for an RTL Design & Verification Engineer focused on developing hardware for AI acceleration. The engineer will be involved in microarchitecture definition, RTL design, and verification using SystemVerilog/UVM, with a focus on AI-focused IPs. The role also involves adopting AI tools within the chip development flow. | — | 5 |
| Embedded WiFi/Network DevOps Developer Student Student/Intern role focused on DevOps and CI/CD for embedded systems, with a secondary focus on developing AI-based tools and gaining experience with AI infrastructures. The role involves Jenkins, Groovy, Linux, Bash, Docker, QEMU, Grafana, Prometheus, Ansible, ELK stack, and Kubernetes. | — | 5 |
| Deep Learning System Validation Engineer This role focuses on validating and developing hardware structures and interfaces to accelerate deep learning hardware and software performance for AI systems. It involves developing test plans, leading pre- and post-silicon activities, and collaborating with product and design teams to define next-generation requirements and influence the AI product roadmap. The work impacts AI solutions in both on-device and data center deployments. | Serve | 5 |
| Infrastructure and DevOps Engineer Student Student/Intern role focused on DevOps and Infrastructure Engineering, with exposure to AI tools and technologies. The role involves hands-on development in Python for various DevOps environments (GitHub, Jenkins, K8s, Azure Cloud) and exploration of other programming languages like JavaScript, TypeScript, and Node.js. While AI is mentioned as a tool to enhance work, the core responsibilities are in DevOps and infrastructure. | — | 5 |
| Tactical Planner Student Student role focused on tactical planning, cost savings, efficiency, process improvements, analysis, budget control, and procurement management within Intel's Client Validation Engineering organization. Requires economics, finance, or related studies, with AI tool usage and supply chain experience being advantageous. | — | 5 |
| User Engagement for Design GenAI Tools Student Student role focused on supporting the adoption of Intel's Design Generative AI tools through communication, community building, training, and feedback collection. The role involves user research, go-to-market execution, community management, and creating enablement assets to drive product adoption and gather user insights. | — | 5 |
| Engineering Student for Intel Kiryat Gat (System Operations & AI Automation) Student role in a semiconductor manufacturing environment focused on data science and automation. Responsibilities include supporting daily operations, identifying and automating manual bottlenecks, and building AI-driven solutions for data analysis and predictive methodologies. Requires strong Python and SQL skills, analytical abilities, and willingness to learn manufacturing processes. | Data | 5 |
| System Modeling and Specification Definition Student Student role focused on system-level modeling and specification definition for analog and mixed-signal blocks in Wi-Fi and Bluetooth SoCs. The role involves using AI-assisted tools to accelerate analysis and modeling, conducting research, and defining block-level specifications. It requires an MSc student with strong fundamentals in analog/mixed-signal circuits and experience with modeling environments like MATLAB or Python. | — | 2 |
| Post Silicon Validation Engineer Intel is seeking a Post Silicon Validation Engineer to ensure the quality and performance of their cutting-edge System-on-Chip (SoC) products. This role involves developing and executing innovative validation methodologies, conducting silicon debug to resolve functional issues, and testing interactions between various SoC features. The engineer will also develop post-silicon validation infrastructure, collaborate with multidisciplinary teams, and create comprehensive validation reports. The position requires experience in post-silicon validation, proficiency with FPGA/emulation tools, and technical expertise in SoC domains like Graphics, PCIe, and Memory. | — | 0 |
| Bluetooth Phy System Student Student role focused on Bluetooth PHY systems, involving pre- and post-silicon system design, RFIC architecture, calibration algorithms, system performance, and multidisciplinary problem-solving across HW, SW, RF, and Modem domains. Requires knowledge of communication systems, modulation, RFIC impairments, and link budgets. | — | 0 |
| Package and PCB Layout Eng Seeking an RF Design Engineer with 6+ years of experience to design, develop, and verify RF integrated circuits and systems, including PCB and Package Layout, for wireless communication products like WLAN and Bluetooth. Responsibilities include defining floorplans, layouts, and physical designs, collaborating with cross-disciplinary teams, and ensuring compliance with design rules and manufacturing constraints. | — | 0 |
| Senior RF Integration Engineer Senior RF Integration Engineer at Intel, responsible for leading integration activities for advanced wireless connectivity silicon, working with RF circuits, developing automation tools in C#, and performing post-silicon validation. Requires B.Sc. in Electrical/Electronic Engineering and 8-12 years of experience in wireless communication systems and RF engineering. | — | 0 |
| Post Silicon Validation Student Student/Intern position in Intel's Silicon and Platform Engineering Group (SPE) in Haifa, Israel. The role involves learning and applying knowledge, building skills, and exploring future career opportunities through hands-on experience and projects. Requires a Bachelor's degree in Electrical/Computer Engineering, strong analytical and problem-solving skills, and the ability to work in unstructured environments and drive new model path finding. | — | 0 |
| PM Validation - student position Student position in Front End Validation Team at Intel, focusing on validating Intel CORE's Power Management flows and key interfaces. The role involves planning and implementing validation strategies, defining and writing test environments for RTL implementation, debugging, and driving features to tape-in quality. Requires a BSc student in Electrical or Computer Engineering with 3-4 semesters until graduation. Basic usage of GenAI tools is a plus. | — | 0 |
| Experienced Security Software development Engineer Experienced Security Software Development Engineer at Intel to validate TDX (Trusted Domain Extensions), a confidential computing technology. The role involves validating across firmware, OS, drivers, middleware, SDKs, and applications, building frameworks, automation, and reference implementations. Requires 5+ years of experience in software/hardware validation or verification and coding in C, C++, or Java. | — | 0 |
| RF Hardware Design Engineer Designs and develops RF hardware systems for WiFi and Bluetooth technologies, involving simulation, board-level design, and lab validation. The role also includes an interest in leveraging AI-based solutions to enhance engineering productivity. | — | 0 |
| DFT Automation and Validation Engineer This role focuses on developing and maintaining validation testing environments and tooling for CPU core DFT (Design for Test) validation. Key responsibilities include automation, scripting, debug tools, and improving team AI skills to support validation engineers. The role requires strong programming skills in TCL, Python, and/or Perl, and experience in pre-silicon validation or CAD/tool automation. | — | 0 |
| System Engineering student Student Intern role focused on the integration of hardware and software systems, including robotics and control systems, for validation activities at Intel Labs. Responsibilities include system-level development, troubleshooting, and root cause analysis, requiring proficiency in CAD tools and coding skills for system-oriented solutions. | — | 0 |
| Senior Post Silicon CPU Debug Engineer Seeking a Senior CPU Debug Engineer to lead logical debugging of Core CPU designs, collaborate with Architecture and Design teams, and provide customer debug support. Responsibilities include analyzing and resolving complex logic issues, developing debugging tools, and improving debug processes. | — | 0 |
| WiFi Firmware PHY Engineering Student Student role in WiFi Firmware PHY Engineering focusing on developing cutting-edge WiFi and Bluetooth technologies for various platforms. Responsibilities include C programming for real-time embedded systems and driver development on OS environments like Linux and Windows. | — | 0 |
| Post Silicon Validation Student Student role focused on developing and managing a CI/CD pipeline for custom Linux OS variants to support post-silicon validation teams. Requires strong OS (Linux) and CI/CD process knowledge. | — | 0 |
| DFT Engineer Junior Design-for-Test (DFT) Engineer role focused on developing, integrating, and validating DFT solutions for CPU core designs, including ATPG generation, fault coverage analysis, and pattern debug. Responsibilities involve RTL-level DFT implementation, script development for automation, and collaboration with cross-functional teams for silicon bring-up and test flows. | — | 0 |
| Firmware Development Engineer Firmware Development Engineer for Intel's Infrastructure Processing Unit (IPU), also known as Smart-NIC. Responsibilities include developing operational firmware, collaborating with cross-functional teams, analyzing code, gathering requirements, writing and debugging code on pre-silicon and silicon platforms, and developing/integrating firmware for IPU systems. The role will leverage AI tools to accelerate development and validation. | — | 0 |
| Formal Verification Student Student role focused on formal verification of Intel Core Intellectual Property (IP) using vendor tools, requiring learning HW microarchitecture and RTL, and developing/debugging FV proofs for hardware implementations to ensure zero bugs in silicon and products. | — | 0 |
| Finance Student Student role in Finance Planning and Analysis (FPnA) at Intel, supporting financial forecasts, variance analysis, and business performance metrics. Involves collaboration with finance professionals and operational teams. | — | 0 |
| Practical Engineering Student - Kiryat Gat Student position in the UPW group focusing on system verification, maintenance, and monitoring of equipment in a semiconductor manufacturing facility. Requires a Practical Engineer degree and proficiency in Excel and Microsoft Office. | — | 0 |
| Software student for validation tools team Student role focused on developing validation tools for CPUs, with an opportunity to utilize and develop generative AI technologies. Requires C/C++ and Python programming experience. | — | 0 |
| IT Network Operation Engineer IT Network Operation Engineer responsible for sustaining and operating mission-critical complex manufacturing network infrastructure supporting Intel Foundry environments. Focuses on operational execution, network stability, incident response, and problem analysis for Cisco networks (including ACI) in a 24x7 production environment. | — | 0 |
| Firmware Development Engineer Develops firmware for Infrastructure Processing Units (IPUs), also known as Smart-NICs, which offload tasks from host CPUs for cloud data centers. The role involves collaborating with various teams, analyzing code, gathering requirements, developing algorithms, writing and debugging firmware on pre-silicon and silicon platforms, and troubleshooting complex issues. The role will also leverage AI tools to improve development and validation efficiency. | — | 0 |
| Failure analysis and TEM Engineer Seeking a Transmission Electron Microscopy (TEM) Engineer to support technology development and yield improvement in semiconductor failure analysis laboratories. Responsibilities include operating laboratory equipment, interpreting complex TEM results, and developing new workstreams. | — | 0 |
| Pre-Silicon Validation Engineer Pre-Silicon Validation Engineer for Intel Core Level Validation (CLV) Team, responsible for verifying Core IP features, power management, and interfaces for Intel CPUs. The role involves implementing validation plans, developing test environments, and collaborating with cross-functional teams. | — | 0 |
| Analytical Chemistry Lab Technician Seeking an Analytical Chemistry Lab Technician with Mass Spectrometry experience for trace metal analysis in a clean room laboratory. Responsibilities include sample preparation, analysis using ICPMS, titration, and chromatography, equipment maintenance, data collection, and reporting. The role supports manufacturing operations and requires strong organizational and troubleshooting skills. Experience with ICPMS, titration, GCMS, Ion Chromatography, and Liquid Chromatography is highly preferred. | — | 0 |
| Software Development Student Software Development Student role focused on building tools and capabilities for testing and validating Intel's next-generation products. The role involves working on an IDE-based, mission-critical project using a Domain Specific Language (DSL) developed by Intel, with a focus on quality, fast-paced delivery, and user experience. Experience with building GenAI applications is a plus. | — | 0 |
| Firmware Integrator and Release Manager Intel is seeking a Firmware Integrator and Release Manager to manage firmware integration and release activities for their Infrastructure Processing Unit (IPU). The role involves collaborating with various teams, preparing releases, and contributing to firmware/microcode development for Xtensa and ARM microprocessors. Requires 7+ years of embedded software development experience in C, Linux/RTOS environments, and Git. | — | 0 |
| Window infrastructure & DevOps Student Student role focused on IT operations and DevOps, involving ticket resolution, scripting (PowerShell), automation tool development, server management, and CI/CD processes within an enterprise environment. The role progresses from operational tasks to development projects. | — | 0 |
| Security Software development Engineer Intel is seeking a Security Software Development Engineer to validate TDX (Trusted Domain Extensions), a technology for confidential computing and virtualization. The role involves building frameworks and automation for validation across firmware, OS, drivers, middleware, SDKs, and applications. Requires 3-5 years of software/hardware validation experience and C/C++ coding proficiency. Preferred knowledge includes OS/virtualization pre/post-silicon validation and Specman/System Verilog. | — | 0 |
| Wi-Fi System Architect Seeking an experienced System Architect to define and develop wireless communication system architectures, focusing on HW/SW partitioning, VLSI hardware architecture, and real-time SW/firmware development for next-generation Wi-Fi technology. | — | 0 |
| Product Development Engineer Develop and optimize testability and manufacturability for cutting-edge integrated circuits, from early feasibility to high-volume production. Evaluate and debug new designs on ATE platforms, characterize devices, define specifications, and perform yield analysis to ensure seamless post-silicon ramp and product launch. | — | 0 |
| Formal Verification Student Student role focused on developing tools and methodologies for formal verification of future CPU products within Intel's Core HW Design Verification Team. Requires familiarity with Python and Linux. | — | 0 |
| Power and Performance Lab Engineering Student Student role focused on power and performance post-silicon validation of Intel's client CPU products. Responsibilities include system setup, calibration, and execution of power/performance studies in a lab environment. | — | 0 |
| EV Lab Student Student role in Intel's Validation Engineering lab, assisting with engineering trials, testing, and maintenance of complex systems using test equipment, computers, and automation robots. Requires current Electrical/Computer Engineering studies and ability to work on-site. | — | 0 |
| Post Silicon Validation Engineer Intel is hiring a Post Silicon Validation Engineer in Haifa, Israel. This role involves developing validation architecture, test plans, methodologies, infrastructure, and content. The engineer will also perform deep dive investigations, advanced hardware/firmware/software debug, and bug fix definition for next-generation Intel processors. The position is for a College Grad and requires an on-site presence. | — | 0 |
| Practical Engineering Student for Intel Kiryat Gat Seeking a Practical Engineering student for a semiconductor manufacturing facility to support advanced equipment, learn maintenance and troubleshooting, and collaborate with engineering teams. Role involves hands-on experience in a high-volume, cutting-edge fabrication environment. | — | 0 |
| Facility Category Manager This role is for a Facility Category Manager at Intel, responsible for managing supply chain strategies, supplier relationships, and procurement processes for facilities services, real estate, construction, and maintenance programs. The candidate will develop commodity strategies, manage supplier performance, and ensure cost-effectiveness and sustainability. | — | 0 |
| CPU Structural Design – Technology and Path finding This role focuses on the physical design and process technology for Intel's High Performance Processor (P-Core) CPUs. Responsibilities include synthesis, place and route, timing analysis, power optimization, and developing physical design methodologies using industry EDA tools. | — | 0 |
| CPU Circuit Design Engineer CPU Circuit Design Engineer role at Intel, focusing on designing next-generation CPU cores and SoCs. Responsibilities include detailed circuit analysis, design implementation, and optimization at the transistor level, meeting power, performance, and area targets. Requires BSc/MSc in EE/CE and at least 2 years of VLSI/circuit design experience. | — | 0 |