Cerebras

The AI Silicon Physical Design Engineer role at Cerebras focuses on the physical design and implementation of AI chips, specifically optimizing for power, performance, and area in high-speed designs. This involves synthesizing, placing, and routing, collaborating with RTL teams, and ensuring seamless integration into the full-chip architecture. The role requires extensive experience in physical design methodologies, timing closure, and verification tools, with a strong emphasis on scripting for flow enhancements.

Cerebras is seeking an Engineering Lead for Distributed Systems Cluster Security. This role will be responsible for the security of Cerebras's large-scale AI clusters, which include AI chips, servers, networking, and storage. The lead will develop security engineering solutions, ensure end-to-end security and privacy, and build an engineering team to deliver world-class security solutions. Experience in distributed systems security, multi-tenancy, and cluster networks is necessary, with a preference for Kubernetes and bare-metal cluster management software.

Cerebras is seeking a Senior WAN Network Engineer to design, implement, manage, and optimize global connectivity for their AI chip company. The role involves ensuring high availability, performance, and reliability of global network services, collaborating with telecom providers, configuring routing and security protocols, monitoring performance, and supporting network modernization and cloud connectivity projects. Experience with network automation tools and major network vendors is required.

This role is for a Head of Data Center Acquisition at Cerebras, a company that builds large AI chips. The primary focus is on securing data center capacity to meet the demand for Cerebras' AI inference solutions. The role involves sourcing, evaluating, and leading commercial negotiations for data center providers, developers, and colocation sites across North America and Europe. Key responsibilities include diligence on power, site, permits, security, and schedule, ensuring compliance with regulations, and building a team to execute these acquisitions. The goal is to build a repeatable system for data center acquisition that ensures credible supply and drives high-velocity decision-making.

The Sourcing Manager – Critical Components is responsible for developing and executing global sourcing strategies to secure high-quality, cost-effective critical components and materials for Cerebras, a company that builds large AI chips and provides AI compute power. The role ensures supply chain continuity, minimizes risk, and drives innovation by leveraging market analysis, supplier relationship management, and advanced negotiation tactics. The manager collaborates with cross-functional teams to align procurement activities with organizational goals, optimize procurement processes, and enhance supplier relationships.

Cerebras Systems is seeking an experienced Manufacturing Linux Network Engineer to design, implement, and maintain robust IT and network infrastructure across their manufacturing facilities. This role requires deep expertise in Linux systems administration (Red Hat / Rocky Linux), network security (Palo Alto firewalls), storage infrastructure, CI/CD pipelines (Jenkins), and infrastructure automation (Ansible). The position is critical for delivering high availability, security, and performance in modern manufacturing environments, supporting the company's AI chip production.

The Senior Quality Engineer will drive Manufacturing Quality across contract manufacturers and suppliers, ensuring Cerebras systems meet rigorous quality standards and scale reliably. This role is critical for New Product Introduction (NPI), establishing control plans, quality gates, and risk mitigation strategies. The engineer will lead day-to-day quality activities at the factory floor, coordinate issue containment and corrective actions, and own the quality alert process. Responsibilities also include leading NPI quality readiness, translating product requirements into quality controls, and de-risking potential failure modes. The role requires strong problem-solving skills using 8D, 5 Whys, and PFMEA, and experience integrating manufacturing and field data. The engineer will also engage with suppliers and CMs to ensure incoming material quality and build strong working relationships.

This role is for a Data Center Commissioning Lead at Cerebras, a company that builds large AI chips. The lead will oversee the end-to-end commissioning and readiness of AI data center infrastructure in colocation environments, ensuring all systems are tested, validated, and operational. Responsibilities include developing commissioning plans, coordinating with various stakeholders, overseeing testing of electrical and mechanical systems, and driving issue resolution. The role requires extensive experience in mission-critical facility commissioning and a strong understanding of data center operations.

This role is for a Network & Fiber Engineer responsible for designing, deploying, and validating high-performance network and fiber infrastructure in colocation data centers. The role is critical for enabling AI-scale compute clusters by ensuring low-latency, high-throughput connectivity. It involves owning end-to-end fiber and network infrastructure deployment, designing pathways, overseeing installation, validating fiber, supporting network hardware deployment, and troubleshooting network and fiber issues. The company builds large AI chips and provides AI compute power, but this specific role focuses on the underlying network infrastructure rather than AI model development or deployment.

This role is for a Director of Procurement responsible for sourcing, contracting, and supply chain execution for data center infrastructure and critical equipment to support AI infrastructure deployment. The company builds a large AI chip and provides AI compute power.

Manager responsible for tracking and accounting of data center infrastructure and assets globally through their lifecycle. This role involves process optimization, asset management, lease accounting, compliance, and supporting IPO readiness. Requires strong GAAP knowledge, experience with fixed assets, and automation skills.

The company builds AI chips and provides AI compute power, focusing on training and inference speeds for large-scale ML applications. The role is for a Senior GL Accountant responsible for general ledger accounting operations and financial reporting.

Head of IT to build and run the internal technology backbone of a company that is scaling quickly and operating at the edge of AI hardware and software. This is a build-and-scale role for someone who thrives when the ground is moving. Owns systems that Cerebras employees, contractors, and executives rely on every day: laptops, identity, SaaS, networking, collaboration, endpoint security, internal support, and the IT controls that a company of our maturity needs to have in place. Will keep a highly technical, impatient engineering population unblocked while hardening the environment to standards expected of a company at our stage, including SOX-grade ITGCs and SOC 2.

Seeking an experienced System Signal Integrity and Power Integrity Engineer to solve complex integrity challenges in next-generation AI compute systems, focusing on high-speed interfaces, power delivery networks, and advanced packaging.

This role is for a Design Validation Test (DVT) Technical Lead/Principal Engineer responsible for the end-to-end validation of complex electrical engineering boards and full systems for Cerebras, a company that builds large AI chips. The role involves defining validation strategy, building test plans and infrastructure, leading debug and root-cause analysis, and driving closure. The domain includes power delivery, high-speed I/O, and electro-mechanical systems. While the company builds AI chips and supports AI workloads, this specific role focuses on the hardware validation of the underlying infrastructure, not the AI models or software themselves.

Cerebras is seeking a Manufacturing Bring-up Engineer to support system level bring-up, configuration, testing, and validation in their manufacturing pipeline. The role involves cross-functional collaboration, troubleshooting, process automation, and tracking critical metrics to ensure efficient product delivery from manufacturing to the customer. While the company builds AI hardware and supports AI workloads, this specific role focuses on the manufacturing and operational aspects of the system, not direct AI model development or deployment.

Cerebras Systems is seeking a Manufacturing Bring-up Engineer to support system-level bring-up, configuration, testing, and validation in the manufacturing pipeline for their large AI chip. The role involves cross-functional collaboration, troubleshooting, process design, and automation to ensure efficient and scalable manufacturing, ultimately delivering AI compute solutions to customers.

The role is for an Advanced Packaging Technologist & Lead responsible for developing and deploying next-generation semiconductor packaging technologies for AI chips. This includes designing 2.5D/3D stacking, heterogeneous integration, and optimizing bonding approaches like Chip-on-Wafer and Wafer-to-Wafer. The role also involves material selection, process technology development, and ensuring reliability for high-performance compute and AI applications.

Electrical Engineer to lead printed circuit board design for Cerebras' AI chip, focusing on specification, schematic design, component selection, layout, and lab bring-up. Requires experience in digital circuits, power delivery, and high-speed signal integrity, with proficiency in Python for test scripting.

This role focuses on the post-silicon bring-up and optimization of Cerebras's Wafer Scale Engine (WSE), a large AI chip. The engineer will develop and debug production processes, refine AI systems across hardware/software constraints, enhance infrastructure for workload testing, and work with cross-functional teams to optimize performance. The role involves significant hardware and software co-design, testing, and automation.

Senior Mechanical Engineer to lead the design of mechanical systems for Cerebras' next-generation wafer-scale AI chip, ensuring compliance with specifications, validating manufacturability, and delivering a high-quality product. Responsibilities include developing mechanical infrastructure, iterating on designs, providing testing support, conducting inspections, and collaborating with cross-functional teams.

This role focuses on developing test automation software and scripts for Cerebras' AI hardware products, from PCBA to system level. It involves working with manufacturing and quality teams, contract manufacturers, and developing GUIs and web interfaces for test data reporting and traceability. The role requires strong programming skills in C/C++, Python, and knowledge of databases and scripting languages.

The Design Verification Engineer will work on Cerebras' AI chip, ensuring the quality of the silicon design. This involves developing verification strategies, creating testbenches, managing regressions, and debugging complex issues across simulation and silicon bring-up. The role requires strong debugging, SystemVerilog, UVM, and scripting skills, with a focus on ensuring the hardware meets the demands of AI workloads.

Cerebras is seeking an experienced Manufacturing Test Engineering Lead to oversee the development, implementation, and maintenance of test strategies, processes, and systems for their AI chip products. This role involves leading a team of engineers, collaborating with cross-functional teams, and ensuring product quality and reliability in a manufacturing environment.

The role is for a 3D Physical Design Engineer focused on designing and analyzing 3D integrated AI chips. Responsibilities include traditional ASIC/SoC physical design, packaging, power, clock, and cooling analysis, working with architecture and RTL teams on novel 3D integration concepts. Requires extensive experience in physical design, verification, and 3D physical design specifics.

This role focuses on the physical design and signal integrity of custom IO interfaces for Cerebras' AI chip, which is designed to accelerate AI training and inference. The engineer will be responsible for ensuring the performance, power, and reliability of these interfaces across various levels of integration (die, package, system).