Cerebras
Semiconductors · Wafer-scale AI chip
- HQ
- Sunnyvale, US
- Founded
- 2016
- Website
- cerebras.net
Currently tracking 36 active AI roles, up 46% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $170k–$250k (avg $206k).
Cerebras currently has 38 active AI-related job listings. The majority of these roles, 79%, are focused on serving infrastructure. The top hiring function is Engineering, with 32 roles. The company is actively hiring in the United States and Canada. Frequent tech tags include model_serving and inference_infra. In the last 30 days, Cerebras posted 4 new AI roles, representing a 20% decrease compared to the previous 30-day period.
Semiconductors · Wafer-scale AI chip
Cerebras currently has 39 active AI-related roles in our index. The most common open titles are: Kernel Engineer (2), ML Systems Performance Engineer (2), LLM Inference Performance & Evals Engineer, AI Infrastructure Operations Engineer, AI Models, Product Manager. Most positions are in Engineering and Research.
Cerebras's active AI hiring is concentrated in: serving infrastructure (85%), post-training (8%), pre-training (5%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
Cerebras is hiring AI talent in: United States (23 roles), Canada (20 roles), India (6 roles), United Arab Emirates (3 roles).
Job postings at Cerebras most frequently reference: model serving, inference infra, fine tuning, llm observability, frontier research.
In the past 30 days, Cerebras has posted 4 new AI-related roles.
| Title | Stage | AI score |
|---|---|---|
| Applied Machine Learning Research Scientist This role focuses on applying and scaling modern machine learning techniques, particularly LLM post-training (RLHF, GRPO), on Cerebras' wafer-scale AI chip. The scientist will build and maintain training pipelines, evaluation frameworks, and optimize ML workflows across pretraining, fine-tuning, and alignment stages, working with large datasets and contributing to shared ML infrastructure. | Post-trainData | 9 |
| Kernel Engineer The Kernel Engineer will develop high-performance software solutions for AI and HPC workloads, focusing on implementing, optimizing, and scaling deep learning operations on Cerebras' custom hardware. This involves designing, developing, and debugging low-level kernels and algorithms to maximize compute utilization and training efficiency, while also studying emerging ML trends and interacting with hardware architects. |
| ServePost-train |
| 9 |
| Staff Inference ML Runtime Engineer Staff Inference ML Runtime Engineer at Cerebras Systems, focusing on optimizing and scaling their wafer-scale AI chip for high-throughput, low-latency generative AI inference. The role involves designing and implementing ML features, APIs, and distributed runtime solutions, working with state-of-the-art generative AI models and multimodal data. | Serve | 9 |
| Senior Runtime Engineer Senior Runtime Engineer role at Cerebras, focusing on designing and developing high-performance distributed software for large-scale AI training and inference workloads on their wafer-scale architecture. The role involves optimizing compute and data pipelines, ensuring scalability, and collaborating with ML and compiler teams. Requires strong C++ and distributed systems experience, with familiarity in ML pipelines preferred. | ServeAgent | 9 |
| Senior Performance Engineer, Inference Senior Performance Engineer focused on benchmarking Cerebras' AI inference performance against competitors and analyzing pricing models. Requires deep expertise in open-source inference stacks, GPU optimization, and LLM inference economics. | Serve | 8 |
| Engineering Manager, Inference ML Runtime Engineering Manager for Inference ML Runtime at Cerebras, leading a team to design and scale systems for executing state-of-the-art AI models on Cerebras hardware. The role focuses on ML, distributed systems, and high-performance runtime engineering, with a goal of delivering the fastest Generative AI inference solution. | Serve | 8 |
| ML Systems Performance Engineer ML Systems Performance Engineer at Cerebras, focusing on optimizing end-to-end model inference speed and throughput on their wafer-scale AI chip. Responsibilities include kernel optimization, system performance analysis, and developing performance modeling and diagnostic tools. | Serve | 8 |
| Performance & Reliability Engineer The Performance & Reliability Engineer will characterize and optimize the performance and reliability of advanced ML hardware/software systems, focusing on reducing power and thermal fluctuations. This role involves analyzing ML workloads, software kernels, and hardware architecture, developing software solutions for reliability and performance, and influencing next-generation AI architecture design. | Serve | 8 |
| Software Engineer, Inference Platform Software Engineer for Cerebras' Inference Platform team, focusing on the orchestration layer for inference on datacenter clusters. Responsibilities include shaping platform direction, ensuring reliability and performance of active-active systems, writing production code, leading production issues, and partnering with ML/Product/Infra teams. Requires 3+ years of experience in distributed systems, Kubernetes, and building highly available, latency-sensitive systems. Experience with ML inference infrastructure is a plus. | ServeAgent | 7 |
| Staff Software Engineer, Inference Platform Staff Software Engineer for Cerebras' Inference Platform team, focusing on the orchestration layer for datacenter clusters. Responsibilities include platform direction, reliability, performance, execution on critical paths, production leadership, and technical influence. Requires 8+ years of experience in distributed systems, Kubernetes, and backend languages, with a plus for ML inference infrastructure experience. | ServeAgent | 7 |
| Member of Technical Staff (Software Engineer) Software Engineer to implement and optimize high-performance, low-latency inference services on Cerebras' wafer-scale AI chip, focusing on Kubernetes deployment, resource management, and reliability. This role involves collaborating with ML engineers, debugging complex issues, and ensuring the scalability and fault tolerance of AI inference workloads. | Serve | 7 |
| Sr. Member of Technical Staff This role focuses on developing and maintaining cloud-based deployment workflows for AI inference software, utilizing containerization and orchestration technologies like Docker and Kubernetes. The responsibilities include ensuring system resiliency, high availability, and optimizing performance for low-latency inference tasks. The role also involves debugging, monitoring, and documenting inference services, with a strong emphasis on infrastructure-as-code and CI/CD practices. | Serve | 7 |
| Advanced Technology: Compiler Engineer Cerebras is seeking a Compiler Engineer to work on their Tungsten language compiler, which is purpose-built for their wafer-scale AI hardware. The role involves designing and implementing compiler passes, co-designing language constructs, and developing code generation strategies for AI and scientific workloads. The engineer will collaborate with ASIC, kernel, and AI teams, and contribute to the broader toolchain including runtime and debuggers. Experience with novel architectures and ML compiler frameworks is valuable. | Serve | 7 |
| Senior ML Software Engineer - Integration & Quality Senior ML Software Engineer focused on integrating and validating the software stack for the Cerebras AI platform, ensuring reliable and efficient execution of large-scale ML workloads. This role involves debugging complex distributed systems, improving automation, and enhancing the reliability of AI infrastructure, working closely with runtime, compiler, kernel, and hardware teams. | Serve | 7 |
| Site Reliability Engineer - Ops & Automation Cerebras is seeking a Site Reliability Engineer to support their high-performance AI inference services powered by the Wafer-Scale Engine. The role involves operational execution, developing self-service CD pipelines, building automation tools, and enhancing observability for large-scale AI infrastructure. The position requires production Kubernetes experience and proficiency in Python or Go. | Serve | 7 |
| Staff Site Reliability Engineer – Automation and Platform Staff Site Reliability Engineer focused on building and scaling high-performance SRE functions for Cerebras' AI inference services, powered by their Wafer-Scale Engine. The role involves leading engineering efforts to implement self-service delivery pipelines, shared observability tooling, and GitOps-driven CD for model releases and cluster management. The goal is to enable core teams, product managers, and external customers to operate in a fully self-service model with strong reliability guarantees, while also mentoring early-career SREs. The role emphasizes turning complexity into reliability at scale for frontier AI inference. | Serve | 7 |
| Principal Engineer, Inference Cloud Principal Engineer for Cerebras' Inference Cloud Platform, focusing on availability, latency, reliability, and multi-region scale for their AI chip-based inference solution. This senior IC role involves defining long-term architecture, driving execution on critical paths, and contributing production code for large-scale distributed systems. | Serve | 7 |
| Staff Software Engineer, Inference Cloud Staff Software Engineer role focused on building and operating the Inference Cloud Platform, responsible for availability, latency, reliability, and global scale of AI inference workloads. Requires deep expertise in distributed systems, high-QPS optimization, and experience with ML inference infrastructure. | Serve | 7 |
| AI Infrastructure Operations Engineer The AI Infrastructure Operations Engineer will manage and operate Cerebras' advanced AI compute clusters, ensuring their health, performance, and availability. This role focuses on maximizing compute capacity, deploying container-based services, and providing 24/7 monitoring and support for large-scale machine learning infrastructure. | Serve | 7 |
| Physical Design Engineer Cerebras Systems is seeking a Physical Design Engineer to work on the design and analysis of 3D integrated products, focusing on ASIC/SoC physical design, packaging, power, clock, and cooling analysis. The role involves R&D on novel concepts for 3D integration and requires extensive experience in physical design flows, verification methodologies, and optimization for power/performance/area. The company builds large AI chips and provides AI compute power for training and inference. | — | 5 |
| Sr. Staff/Staff Design Verification Engineer The Sr. Staff/Staff Design Verification Engineer at Cerebras will be responsible for ensuring the high-quality design of Cerebras' AI chips, which are designed for AI training and inference. This role involves developing verification strategies, creating reusable verification environments, implementing tests, managing regressions, and debugging complex issues across simulation, emulation, and silicon bring-up. The engineer will collaborate with cross-functional teams including architecture, RTL design, physical design, firmware, and validation to ensure first-time silicon success. The role requires deep knowledge of SystemVerilog testbench, UVM, and scripting languages like Python, with a strong emphasis on debugging and problem-solving skills. | — | 5 |
| ASIC Architect This role is for an ASIC Architect at Cerebras, a company that builds large AI chips. The architect will translate high-level architecture specifications into micro-architecture requirements, perform performance and power trade-offs, and identify hardware acceleration opportunities for AI workloads. While the company's product is AI-focused and used for AI training and inference, the role itself is in hardware architecture and performance modeling, not direct AI/ML model development. | — | 5 |
| Network Architect The Network Architect will design and architect front-end datacenter and interconnect fabrics for AI clusters, optimizing for high resource utilization, low latency, and high-throughput communication. This role involves building proof-of-concept implementations, automating deployment and configuration, and establishing SRE-grade telemetry and observability for network reliability. Responsibilities include leading network debugging in distributed systems, collaborating with vendors, and representing the company in industry forums. | — | 5 |
| Senior / Staff Technical Program Manager - Datacenter Capacity Delivery (E2E) This role is for a Senior/Staff Technical Program Manager responsible for the end-to-end delivery of data center capacity for AI workloads. The role involves managing the entire lifecycle from planning to operational readiness, orchestrating cross-functional teams, and ensuring alignment with AI infrastructure and hardware deployment schedules. While the company builds AI hardware and the role supports AI workloads, the core function is data center capacity delivery, not direct AI/ML model development or research. | — | 5 |
| Sr. Technical Staff This role focuses on post-silicon validation, testing, and debugging of Cerebras' AI chips, specifically their Wafer Scale Engines. Responsibilities include characterizing high-speed interfaces, supporting manufacturing operations, developing automated regression test scripts, and creating debug tools. The role requires a Master's degree and experience in hardware bring-up, debug, and high-speed interfaces. | — | 5 |
| IT SRE Team Lead This role is for an IT SRE Team Lead responsible for the reliability, availability, and performance of Cerebras' internal IT systems. The lead will build and manage a team focused on automation, observability, and incident response, treating infrastructure as code with measurable SLOs. While the company builds AI hardware and has AI customers, this specific role focuses on internal IT operations, though it mentions using AI coding tools for triage and bug fixes. | — | 5 |
| Senior Hardware Technical Program Manager This role is for a Senior Hardware Technical Program Manager at Cerebras, a company that builds large AI chips. The role focuses on managing the end-to-end hardware schedule for AI compute systems and data centers, including design, engineering improvements, software integration, and collaboration with various engineering and operational teams. The goal is to ensure the efficient creation and deployment of supercomputer systems for AI workloads. | — | 5 |
| Security SWE The role is for a Security SWE on the AI cloud team, responsible for customer-facing inference, training, and admin consoles and API experiences. The focus is on building responsive, user-friendly frontend interfaces for developers using Cerebras' AI hardware. | — | 5 |
| Software Engineer, Kernel Reliability Software engineer to join the Kernel Reliability team, focusing on improving the reliability of Cerebras' AI compute clusters and underlying inference, training, and internal production services. The role involves working closely with code, designing scalable solutions, and debugging complex issues. | — | 5 |
| System Software Engineer (Embedded) Cerebras Systems is seeking a System Software Engineer (Embedded) to build the critical software foundation for their AI chip. This role involves developing administrative software, providing Linux BSP support, collaborating with hardware teams, and improving system reliability and observability. The position is focused on the embedded systems and platform engineering aspects that enable the AI hardware to function at scale. | — | 5 |
| Senior Yield Enhancement Engineer Senior Yield Enhancement Engineer role at Cerebras, focusing on semiconductor testing, failure analysis, and yield improvement for their AI chip. The role involves analyzing ATE data, developing failure analysis tools, and collaborating with various engineering teams to enhance testability and yield. While the company builds AI chips and the role touches AI applications, the core craft is semiconductor engineering and testing, not direct AI/ML model development. | — | 5 |
| AI Infrastructure Operations Engineer Entry-level AI Infrastructure Operations Engineer responsible for deploying, monitoring, and troubleshooting Cerebras AI infrastructure in data center environments. Supports CS systems, cluster server hardware, networking hardware, and telemetry tools. | — | 5 |
| Engineering Manager, Kernel Reliability Cerebras Systems is seeking an Engineering Manager for their Kernel Reliability team. This role focuses on improving the reliability of their AI compute clusters, inference, training, and internal production services. The manager will provide technical leadership, own the roadmap, and work on tooling for failure analysis and diagnostics. The position requires expertise in software/hardware reliability, parallel/distributed programming, and debugging tools, with experience leading engineering teams. | — | 5 |
| CoDesign & NextGen - New College Grad Cerebras Systems is seeking a New College Grad Engineer for their CoDesign & NextGen organization. This role involves working at the intersection of software and hardware, focusing on kernel development, ASIC performance modeling, system bring-up, software tuning, and validation. The position requires a strong background in computer architecture, analytical skills, and experience with C++ and Python. Exposure to machine learning is desired. The role contributes to Cerebras' AI chip development, which aims to provide high-performance training and inference for large-scale ML applications. | — | 5 |
| Senior Technical Program Manager – AI Infrastructure, Site Operations This role is for a Senior Technical Program Manager focused on site and data center operations programs that support Cerebras' AI Cloud and customer deployments. The position requires strong technical and execution skills in managing infrastructure programs, with an emphasis on operational readiness, cross-functional coordination, and metrics/KPIs. | — | 5 |
| Network Architect Cerebras is building the world's largest AI chip and offers industry-leading training and inference speeds. This role is for a Network Architect responsible for the front-end datacenter and interconnect architecture of Cerebras AI clusters, focusing on designing, developing proof-of-concept for, and ensuring the reliability of network designs for AI workloads. The role involves cross-functional collaboration with hardware and software teams, vendor management, and understanding network monitoring and debugging. | — | 5 |
| Lead RTL Design Engineer Cerebras Systems is seeking a Lead RTL Design Engineer to design and develop the next generations of their Wafer Scale Engine (WSE), a large AI chip designed for high-performance training and inference. The role involves RTL design, integration, vendor management, and collaboration with various engineering teams to bring semiconductor architectures from concept to production. | — | 5 |
| AI Silicon Physical Design Engineer The AI Silicon Physical Design Engineer role at Cerebras focuses on the physical design and implementation of AI chips, specifically optimizing for power, performance, and area in high-speed designs. This involves synthesizing, placing, and routing, collaborating with RTL teams, and ensuring seamless integration into the full-chip architecture. The role requires extensive experience in physical design methodologies, timing closure, and verification tools, with a strong emphasis on scripting for flow enhancements. | — | 5 |
| Distributed Systems Cluster Security Software – Engineering Lead Cerebras is seeking an Engineering Lead for Distributed Systems Cluster Security. This role will be responsible for the security of Cerebras's large-scale AI clusters, which include AI chips, servers, networking, and storage. The lead will develop security engineering solutions, ensure end-to-end security and privacy, and build an engineering team to deliver world-class security solutions. Experience in distributed systems security, multi-tenancy, and cluster networks is necessary, with a preference for Kubernetes and bare-metal cluster management software. | — | 5 |
| Senior WAN Network Engineer Cerebras is seeking a Senior WAN Network Engineer to design, implement, manage, and optimize global connectivity for their AI chip company. The role involves ensuring high availability, performance, and reliability of global network services, collaborating with telecom providers, configuring routing and security protocols, monitoring performance, and supporting network modernization and cloud connectivity projects. Experience with network automation tools and major network vendors is required. | — | 1 |
| Senior Front End Design Engineer (Microarchitecture) This role is for a Senior Front End Design Engineer focused on the microarchitecture of Cerebras' AI chips. While the company builds hardware for AI, the role itself is in semiconductor design (RTL, synthesis, PPA, etc.) and not directly involved in building AI models or systems. The responsibilities are centered on chip design and integration, with a focus on performance and power efficiency for AI compute. | — | 0 |
| Design Verification Engineer Cerebras Systems is seeking a Design Verification Engineer to work on their AI chip, focusing on ensuring a high-quality design through verification strategies, test development, and debugging across simulation, emulation, and silicon bring-up. The role involves collaborating with cross-functional teams and enhancing verification infrastructure. | — | 0 |
| Director / Senior Director, Critical Facility Operations The Director / Sr. Director of Critical Facility Operations will lead the environments that enable next-generation AI workloads. This leader will own availability, operational integrity, and performance across a colocation-driven data center footprint, ensuring infrastructure operates with precision and predictability. The role involves mission-critical engineering, vendor orchestration, and operational excellence, building systems and teams that can scale with demanding compute environments. | — | 0 |
| Mechanical Engineer Mechanical Engineer to lead the design of mechanical systems for Cerebras' next-generation wafer-scale AI chip, ensuring compliance with specifications, validating manufacturability, and delivering a high-quality product. Responsibilities include developing mechanical infrastructure, iterating on designs, supporting testing, and collaborating with cross-functional teams. | — | 0 |
| Software Architect – Manufacturing Test Software Architect for Cerebras' manufacturing test platform, leading a team to design and deliver end-to-end software systems for manufacturing test across the product lifecycle. The role involves owning the technical vision, architecture, and roadmap for cloud and physical infrastructure, collaborating with various engineering and operations teams. | — | 0 |
| Sourcing Manager – Critical Components The Sourcing Manager – Critical Components is responsible for developing and executing global sourcing strategies to secure high-quality, cost-effective critical components and materials for Cerebras, a company that builds large AI chips and provides AI compute power. The role ensures supply chain continuity, minimizes risk, and drives innovation by leveraging market analysis, supplier relationship management, and advanced negotiation tactics. The manager collaborates with cross-functional teams to align procurement activities with organizational goals, optimize procurement processes, and enhance supplier relationships. | — | 0 |
| Manufacturing Linux Network Engineer Cerebras Systems is seeking an experienced Manufacturing Linux Network Engineer to design, implement, and maintain robust IT and network infrastructure across their manufacturing facilities. This role requires deep expertise in Linux systems administration (Red Hat / Rocky Linux), network security (Palo Alto firewalls), storage infrastructure, CI/CD pipelines (Jenkins), and infrastructure automation (Ansible). The position is critical for delivering high availability, security, and performance in modern manufacturing environments, supporting the company's AI chip production. | — | 0 |
| Senior Quality Engineer The Senior Quality Engineer will drive Manufacturing Quality across contract manufacturers and suppliers, ensuring Cerebras systems meet rigorous quality standards and scale reliably. This role is critical for New Product Introduction (NPI), establishing control plans, quality gates, and risk mitigation strategies. The engineer will lead day-to-day quality activities at the factory floor, coordinate issue containment and corrective actions, and own the quality alert process. Responsibilities also include leading NPI quality readiness, translating product requirements into quality controls, and de-risking potential failure modes. The role requires strong problem-solving skills using 8D, 5 Whys, and PFMEA, and experience integrating manufacturing and field data. The engineer will also engage with suppliers and CMs to ensure incoming material quality and build strong working relationships. | — | 0 |
| Manager - Data Center Asset tracking and Accounting Manager responsible for tracking and accounting of data center infrastructure and assets globally through their lifecycle. This role involves process optimization, asset management, lease accounting, compliance, and supporting IPO readiness. Requires strong GAAP knowledge, experience with fixed assets, and automation skills. | — | 0 |
| Senior GL Accountant The company builds AI chips and provides AI compute power, focusing on training and inference speeds for large-scale ML applications. The role is for a Senior GL Accountant responsible for general ledger accounting operations and financial reporting. | — | 0 |