NVIDIA currently has 496 active AI-related job listings. The majority of these roles, 52%, are focused on serving infrastructure, with agents representing another significant segment at 23%. Engineering is the dominant function, with 441 positions. The United States leads hiring geographies with 287 roles, followed by China with 64. Frequent tech tags include model_serving, inference_infra, and agent_orchestration, suggesting a focus on deployment and management of AI models. Over the last 30 days, NVIDIA posted 214 new AI roles, a 27% decrease compared to the previous 30-day period.
Currently tracking 440 active AI roles, down 53% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $100k–$575k (avg $262k).
NVIDIA currently has 487 active AI-related roles in our index. The most common open titles are: Deep Learning Performance Architect (4), Senior Deep Learning Performance Architect (4), AI Research Scientist (3), Developer Technology Engineer - AI (3), Manager, Deep Learning Algorithms (3). Most positions are in Engineering and Research.
NVIDIA's active AI hiring is concentrated in: serving infrastructure (54%), agents (21%), application (8%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
NVIDIA is hiring AI talent in: United States (286 roles), China (59 roles), Israel (50 roles), Germany (21 roles).
Job postings at NVIDIA most frequently reference: model serving, inference infra, agent orchestration, llm observability, multimodal.
In the past 30 days, NVIDIA has posted 110 new AI-related roles. That is a -50% change versus the prior 30 days (218 → 110).
| Title | Stage | AI score |
|---|---|---|
| Senior Pre-Silicon Switch Technical Lead NVIDIA is seeking a Senior Pre-Silicon Switch Technical Lead in Israel to lead complex pre-silicon programs for networking hardware and software development. The role involves managing multi-functional teams, driving technical issue resolution, improving processes, and ensuring software and firmware readiness for new Switch ASICs. Requires 8+ years of design experience, understanding of software development lifecycles, and knowledge of L1, L2, L3 networking. | — | 0 |
| Senior Firmware ETH Core Micro Architect NVIDIA is seeking a Senior Firmware ETH Core Micro Architect with 5+ years of experience in firmware development, preferably with C/C++ on embedded systems. The role involves defining FW architecture, diagnosing performance issues, and improving FW performance, scalability, and working methodologies. Knowledge in Networking and Ethernet protocol stack is required. The position is in Tel Aviv, Israel. | — | 0 |
| Manager, Mechanical Engineering |
| — |
| 0 |
| Senior FC Verification Engineer NVIDIA is seeking a Senior Full-Chip Verification Engineer to join their Networking Silicon team. The role involves developing and verifying next-generation NICs at the system level, contributing to the architecture of high-speed communication devices, and driving full-chip verification execution. The engineer will also be responsible for system-level debug and analysis, and cross-team collaboration. The role mentions leveraging AI coding tools and frameworks to accelerate development. | — | 0 |
| Senior Physical Design Backend Engineer NVIDIA is seeking a Senior Physical Design Engineer for their Networking Silicon Engineering team. The role involves the physical design of high-speed communication devices, focusing on power, area, and performance. Responsibilities include RTL2GDS flows, synthesis, place and route, timing closure, power/noise analysis, and physical verification. Requires 5+ years of experience in physical design, knowledge of PNR, STA, physical verification, and familiarity with EDA tools. | — | 0 |
| Software Verification Team Manager, Networking NVIDIA is seeking an experienced Software Manager to lead the Cumulus Linux Software Verification Team. This role involves managing, mentoring, and guiding a team of software developers, overseeing the design and implementation of automation frameworks, and driving timely, high-quality feature delivery within the context of the AI Factory, which powers AI model training, fine-tuning, and deployment. | — | 0 |
| Senior Integration Engineer NVIDIA is seeking a Senior Integration Engineer to drive front-end integration of major blocks in a pioneering Ethernet switch ASIC. This role involves building, maintaining, and improving EDA flows and methodologies, working closely with various teams to ensure robust implementation. The engineer will also develop automation and infrastructure to enhance productivity and debug complex issues. | — | 0 |
| Senior DFT ATPG Engineer NVIDIA is seeking a Senior DFT ATPG Engineer to work on groundbreaking innovations in DFT architecture, verification, and post-silicon validation for sophisticated semiconductor chips. The role involves developing next-generation DFT technologies and collaborating with chip design, backend, verification, and production testing teams. Responsibilities include managing state-of-the-art DFT/ATPG flows, owning ATPG end-to-end, and inventing automation flows for short test times. | — | 0 |
| Senior Software Engineer - Cloud and Kubernetes Senior Software Engineer to design and build next-generation cloud platforms, focusing on scalable cloud infrastructure powered by Kubernetes, ConnectX, BlueField NICs, and GPUs for HPC and AI workloads. | — | 0 |
| Physical Design Backend Engineer Physical Design Backend Engineer for high-speed communication devices, focusing on chip development from RTL to GDS, including synthesis, place and route, timing closure, and verification. | — | 0 |
| Senior STA Engineer, Sub-Chip NVIDIA is seeking a Senior STA Engineer to perform advanced Static Timing Analysis (STA) at chiplet and FC level, run Prime Time, debug timing paths, and ensure convergence throughout various project stages. The role requires B.SC./M.SC. in Electrical Engineering and 5+ years of hands-on STA experience. | — | 0 |
| Physical Design Backend Engineer NVIDIA is seeking a Physical Design Backend Engineer to join their Networking Silicon engineering team. The role involves the physical design of high-speed communication devices, focusing on power, area, and performance. Responsibilities include synthesis, place and route, timing closure, power analysis, and physical verification, covering the full RTL2GDS flow. | — | 0 |
| Senior Hardware Time Synchronization Architect NVIDIA is seeking a Senior System and Hardware TimeSync Architect to define and develop next-generation TimeSync solutions for GPUs, CPUs, and networking devices. The role involves working across hardware and software stacks to support AI acceleration and drive industry standardization. | — | 0 |
| Senior VLSI Integration Engineer Senior VLSI Integration Engineer at NVIDIA focusing on SOC design automation, RTL integration, chip build and assembly, and padring design and verification. Requires 7+ years of RTL design experience in System-Verilog and scripting skills. | — | 0 |
| Senior Firmware Design Engineer, Optics Senior Firmware Design Engineer with a focus on Optics for NVIDIA's network technologies, specifically 1600GbE Data Centers and Networks. The role involves developing firmware for transceivers and optical devices, collaborating with industry leaders in AI/ML platforms, Data Centers, and HPC. Responsibilities include firmware development for next-generation network products, cutting-edge optical engine technology, and sophisticated networking firmware features with a focus on physical link-up processes and optimizations. | — | 0 |
| Senior System Design Automation, Hardware Engineer Senior CAD - Hardware Engineer role focused on supporting MCAD, ECAD, and LE design teams and developing software to enhance design efficiency within the NVIDIA Networking division. Requires extensive experience in EDA platforms and software development within that environment. | — | 0 |
| Chip Design Engineer NVIDIA is looking for a Chip Design Engineer to join their Switch Silicon team for Verification/Design roles. The engineer will design, implement, and verify state-of-the-art Switch Silicon chips, focusing on high-speed communication devices with high throughput and low latency. Responsibilities include micro-architecture, RTL design/verification, building reference models, synthesis, timing, and supporting silicon post-silicon activities. Requires 3+ years of experience in RTL design and/or dynamic verification, and a degree in Electrical or Computer Engineering. | — | 0 |
| Senior Chip Design Verification Engineer NVIDIA is seeking a Senior Chip Design Verification Engineer for their Switch Silicon group. The role involves designing and implementing state-of-the-art Switch Silicon chips, focusing on high-speed communication devices with high throughput and low latency. Responsibilities include working in a combined design and verification team, building reference models, and verifying chip blocks according to specifications. Requires 5+ years of RTL verification experience and a B.Sc. in Electrical Engineering or Computer Engineering. | — | 0 |
| Senior Chip Design Hardware Emulation Engineer NVIDIA is seeking a Senior Chip Design Hardware Emulation Engineer to join their Networking Silicon engineering team in Israel. The role involves emulating complex chip designs, defining methodologies, and crafting infrastructure for hardware emulation platforms. Responsibilities include collaborating with design, verification, and software engineers, connecting emulator/FPGA solutions to external targets, and hands-on RTL design, verification, FPGA partitioning, scripting, and lab bring-up. Requires 4+ years in the semiconductor industry, pre-silicon verification or design experience, and scripting skills. | — | 0 |
| Senior Networking FW Application Engineer Senior Networking FW Application Engineer role at NVIDIA, focusing on supporting supercomputers and AI fabrics. Requires 8+ years of FW Phy or Serdes development experience, strong communication, and customer-facing skills. Responsibilities include customer support, feature development collaboration, and issue resolution. | — | 0 |
| Senior PCB Design Layout Engineer NVIDIA is seeking a Senior PCB Design Layout Engineer to perform PCB layout for various business units including GPU, Automotive, Data Center, and AI. The role involves complete CAD layout development, constraint management, and design release documentation, adhering to various regulations and specifications. | — | 0 |
| Senior Manager, Firmware and Tools Verification Senior Manager for Firmware and Tools Verification at NVIDIA, leading a PHY layer verification team, responsible for regression and continuous integration, developing methodologies, and debugging HW/FW/SW issues. Requires BS/MS in EE/CE, 4+ years of managerial experience, and 10+ years in silicon/system/FW integration. | — | 0 |
| System Validation Engineer NVIDIA Networking division is seeking a System Validation Engineer to test and validate hardware and software products, maintain product quality, execute various tests, troubleshoot, and support production. Requires a BSc in electrical/computer Engineering, 3+ years of experience in hardware/software validation, and programming skills in languages like Perl, Python, C, or C++. | — | 0 |
| Senior Firmware Verification Engineer NVIDIA is seeking a Senior Firmware Verification Engineer to develop and maintain verification for their Ethernet switches. The role involves working closely with R&D and QA to define and implement test plans, ensure the delivery of networking features, and automate verification procedures. Requires a Bachelor's degree in Engineering or equivalent experience, 5+ years in automation and verification, and proficiency in Python and C/C++. | — | 0 |
| Software Manager, ITPE Software Manager for NVIDIA's Interconnect Product Engineering team, focusing on manufacturing test solutions for optical transceivers and next-generation networking solutions. The role involves leading a team, coordinating product lifecycle, defining roadmaps, and ensuring high product quality. | — | 0 |
| Physical Design Power Integrity Engineer NVIDIA is seeking a Physical Design Power Integrity Engineer to join their team in Israel. The role involves ensuring robust power integrity in physical design for Ethernet switch system product lines, collaborating with global teams, and utilizing industry-standard PI tools. The ideal candidate will have a B.Sc. or higher in Electrical Engineering, 3+ years of experience in power integrity engineering, and proficiency with PI tools like Cadence or Ansys. | — | 0 |
| SOC Verification Engineer NVIDIA is seeking an SOC Verification Engineer to verify the design and implementation of networking SoCs. Responsibilities include verification of clock design elements, architecture, and micro-architecture using sophisticated verification methodologies. The role requires collaboration with architects, designers, emulation, production testing, and silicon verification teams. Candidates need a BSc. in Electrical Engineering or Computer Engineering with 2+ years of experience, understanding of RTL design (Verilog), and UVM methodology. | — | 0 |
| Senior SOC Verification Engineer NVIDIA is seeking a Senior SOC Verification Engineer to verify the design and implementation of networking SoCs. The role involves technically leading a team, defining verification scope, developing verification infrastructure for SOC clock networks, and verifying firmware code, with a focus on hardware/firmware interactions. | — | 0 |
| Software QA Engineer, Network Systems Software QA Engineer with a focus on Networking and Automation for NVIDIA's InfiniBand and NVLINK Switch systems. Responsibilities include designing, developing, and executing manual and automated tests, defining testbed topologies, analyzing requirements, debugging failures, and collaborating with engineering teams. | — | 0 |
| Senior Electro-Optical Packaging Lab Practical Engineer NVIDIA is seeking a Senior Electro-Optical Packaging Lab Practical Engineer in Israel to support the development of new products, specifically industry-leading transceivers. The role involves collaborating with engineers, running sophisticated assembly platforms, and ensuring quality for GPU server products. Responsibilities include participating in new packaging technology development, preparing and conducting experiments, operating and maintaining packaging equipment, and handling laboratory materials. | — | 0 |
| Physical Design Power Optimization Engineer NVIDIA is seeking a Physical Design Power Optimization Engineer to join their Networking Silicon Power engineering team. The role involves optimizing power for high-speed communication devices and chips, covering aspects from RTL to GDS, including synthesis, power distribution, place and route, timing closure, and power/noise fixes. Responsibilities also include power estimation and modeling. | — | 0 |
| Senior Chip Design Verification Engineer NVIDIA is seeking a Senior Chip Design Verification Engineer to join their Switch Silicon team. The role involves designing and implementing next-generation Switch Silicon chips, focusing on micro-architecture of dynamic verification environments for units and modules. The engineer will work closely with multiple teams to ensure high performance, low power, and low latency in the design. | — | 0 |
| Senior Power U-arch Engineer Senior Power U-arch Engineer at NVIDIA to develop state-of-the-art DPU products, focusing on hyper-efficient SOC architectures and energy-efficient high-performance products. Responsibilities include leading micro-architecture of power features and understanding workload characteristics for Perf@Watt improvements. | — | 0 |
| Chip Solution Architect NVIDIA is seeking a Solution Architect with a strong background in chip design and system-level understanding to help customers maximize performance from NVIDIA Network products. The role involves debugging complex issues, developing solutions, and collaborating with global teams and customers. | — | 0 |
| Senior Design-for-Test Engineer, ATPG NVIDIA is seeking a Senior Design-for-Test Engineer to join their ATPG team in Israel. The role involves working on groundbreaking innovations in DFT architecture, verification, and post-silicon validation for sophisticated semiconductor chips. Responsibilities include managing state-of-the-art Design for Test/ATPG flows, end-to-end ATPG ownership, and inventing automation flows for short test times. Requires 5+ years of DFT/ATPG experience, strong scripting skills, and a BSc in Electrical Engineering or Computer Engineering. | — | 0 |
| Test Product Engineer NVIDIA is seeking a Test Product Engineer to design and develop automated tests for networking switches and DPU adapters. This role involves collaborating with HW, ASIC, and SW engineering teams to ensure product quality and high availability. Responsibilities include defining and developing tests from early development to mass production, working with overseas manufacturing teams to improve yields and reduce costs, and leading test solution innovations. The ideal candidate will have a BSc in Computer Science or Electrical Engineering, 3+ years of experience in software development and Python, and experience with UNIX/Linux, version control, and hardware/software integration. | — | 0 |
| Senior System Architect, High-Speed Interconnects NVIDIA is seeking a Senior System Architect to define high-speed interconnect systems for next-generation AI platforms, focusing on terabit-per-second speeds and industry-leading power efficiency and reliability. The role involves architectural definition, technology roadmap evaluation, system co-design, and standardization leadership for NVLink and InfiniBand/Ethernet fabrics. | — | 0 |
| Senior Signal and Power Integrity Engineer NVIDIA is seeking a Senior Signal and Power Integrity Engineer to design high-frequency channels for PCBs, packages, connectors, and cables, simulate passive and active elements, and perform lab measurements. The role requires expertise in electromagnetics, high-speed I/O design, and familiarity with InfiniBand, Ethernet, and PCI-Ex Layer 1 specifications. | — | 0 |
| Senior Physical Design Engineer Senior Physical Design Engineer for NVIDIA's Networking Silicon engineering team, focusing on high-speed communication devices. Responsibilities include physical design from RTL to GDSII, synthesis, power/clock distribution, place and route, timing closure, power/noise analysis, and physical verification, as well as contributing to flow development. Requires B.SC./M.SC. in Electrical/Computer Engineering or equivalent, knowledge of physical design flows (PNR, STA, physical verification), understanding of physical construction and integration, familiarity with EDA tools, and 5+ years of experience. | — | 0 |
| Senior Manager, Hardware Engineering NVIDIA is seeking a Senior Manager for its Hardware Engineering team, focusing on networking infrastructure for data centers. The role involves leading a team of hardware engineers through the entire design lifecycle, from concept to mass production, with a strong emphasis on accelerated performance and GPU connectivity. Responsibilities include team management, project planning, technical guidance on board design, RTL, and production processes, and ensuring timely delivery of high-volume manufactured products. | — | 0 |
| Senior AI Networking Application Engineer NVIDIA is seeking a Senior AI Networking Application Engineer with extensive networking experience, particularly in physical layers and AI fabrics, to support supercomputers and work closely with customers and R&D teams. | — | 0 |
| Senior Hardware Manager, Co Package Optics Switch Design NVIDIA is seeking a Senior Hardware Manager to lead the development of networking infrastructure for next-generation data centers, focusing on accelerated performance and optimized GPU connectivity for AI workloads. The role involves guiding a team of hardware engineers through the entire development flow, from concept to mass production, including specification definition, design, testing, and qualification. | — | 0 |
| Mechanical Team Manager NVIDIA Networking is seeking a Mechanical Team Manager to lead a team of 10+ mechanical design engineers. The role involves defining priorities, creating project plans, allocating resources, and driving electro-mechanical and thermal design aspects for switches. Responsibilities include developing design concepts, resolving production issues, and performing risk assessments. Requires a B.Sc. in Mechanical Engineering, 8+ years of experience (4+ in management), and expertise in liquid-cooled, sheetmetal, and electro-mechanical systems design, with strong CAD skills and high-volume manufacturing knowledge. | — | 0 |
| Senior Hardware Architect NVIDIA is seeking a Senior Hardware Architect for their Networking Silicon group, focusing on the design of BlueField DPU SOC and ConnectX NICs. The role involves micro-architectural design, system requirement analysis, RTL design, performance analysis, and debugging for high-speed communication devices used in AI data centers. | — | 0 |
| Senior Physical Design Backend Engineer NVIDIA is seeking a Senior Physical Design Backend Engineer to join their Networking Silicon Engineering team. The role involves the physical design of high-speed communication devices, focusing on power, area, and performance. Responsibilities include RTL2GDS flows, synthesis, place and route, timing closure, power analysis, and physical verification. The ideal candidate will have 5+ years of experience in physical design, a strong understanding of RTL2GDS flows, and familiarity with EDA tools. | — | 0 |
| Senior DFT Engineer NVIDIA is seeking an experienced DFT Engineer to develop next-generation DFT technologies for their networking group, impacting Switches, NIC, and SoC product lines. The role involves defining, coding, and integrating DFT components, collaborating with various teams, and seeing designs through silicon tape-out and testing. | — | 0 |
| Physical Design Backend Engineer NVIDIA is seeking a Physical Design Backend Engineer to join their Networking Silicon engineering team. The role involves the physical design of high-speed communication devices, focusing on power, area, and performance. Responsibilities include RTL2GDS flows, synthesis, place and route, timing closure, and physical verification. | — | 0 |
| Senior Test Design Architect NVIDIA is looking for a Senior Test Design Architect to define, develop, and drive validation strategies for next-generation hardware platforms across AI, graphics, data center, and automotive domains. The role involves architecting end-to-end system validation, defining test coverage, collaborating with cross-functional teams, leading automation framework development, analyzing test data, and providing technical leadership. Requires 8+ years of experience in hardware/system test engineering, deep understanding of system architecture, and proficiency in scripting/automation. | — | 0 |
| Physical Design CAD Engineer NVIDIA is seeking a Physical Design CAD Engineer to join their Networking Silicon engineering team. The role involves developing methodologies for physical design, synthesis, STA, and logic equivalence for networking chips and SOCs. Responsibilities include working with block owners, ensuring quality and timely convergence, and developing flows for chip floorplan, power distribution, P&R, timing analysis, power/noise analysis, and back-end verification. | — | 0 |
| Senior Software Architect, GPU Networking Senior Software Architect role focused on defining Software Defined Networking (SDN) architectural solutions for AI networks, involving innovative software and hardware. The role involves setting use-cases and metrics for monitoring complex high-speed networks control-plane and collaborating with various NVIDIA teams including GPU and Switch HW/SW, Product, and fellow architects. | — | 0 |