NVIDIA
- HQ
- California, US
- Founded
- 1993
- Size
- 35,000+
- Website
- nvidia.com
Currently tracking 440 active AI roles, down 50% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $100k–$575k (avg $262k).
NVIDIA currently has 496 active AI-related job listings. The majority of these roles, 52%, are focused on serving infrastructure, with agents representing another significant segment at 23%. Engineering is the dominant function, with 441 positions. The United States leads hiring geographies with 287 roles, followed by China with 64. Frequent tech tags include model_serving, inference_infra, and agent_orchestration, suggesting a focus on deployment and management of AI models. Over the last 30 days, NVIDIA posted 214 new AI roles, a 27% decrease compared to the previous 30-day period.
NVIDIA currently has 487 active AI-related roles in our index. The most common open titles are: Deep Learning Performance Architect (4), Senior Deep Learning Performance Architect (4), AI Research Scientist (3), Developer Technology Engineer - AI (3), Manager, Deep Learning Algorithms (3). Most positions are in Engineering and Research.
NVIDIA's active AI hiring is concentrated in: serving infrastructure (54%), agents (21%), application (8%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
NVIDIA is hiring AI talent in: United States (286 roles), China (59 roles), Israel (50 roles), Germany (21 roles).
Job postings at NVIDIA most frequently reference: model serving, inference infra, agent orchestration, llm observability, multimodal.
In the past 30 days, NVIDIA has posted 107 new AI-related roles. That is a -49% change versus the prior 30 days (211 → 107).
| Title | Stage | AI score |
|---|---|---|
| Principal Software Development Engineer, Solid State Drives NVIDIA is seeking a Principal Software Development Engineer to architect new persistent data storage platforms for AI/HPC workloads, own SSD selection and optimization, and lead system integration for SSD-based storage platforms. The role involves influencing the storage-class memory industry roadmap. | — | 0 |
| Senior Manager, Software Development - GPU Accelerated Storage This role is for a Senior Manager, Software Development focused on GPU Accelerated Storage within NVIDIA's data center systems. The primary responsibility is to optimize storage access by enabling direct data paths between GPU memory and storage, bypassing the CPU. The role involves collaborating on reference storage platform designs and leading a global team to drive the storage acceleration roadmap across next-generation systems, frameworks, and applications. It requires deep knowledge of data storage platforms, databases, vector databases, NVMe, RDMA, and system-level architecture, along with significant experience in leading software development teams. | — |
| 0 |
| Chip Design Verification Engineer NVIDIA is seeking experienced Chip Verification Engineers for their Networking Silicon Engineering team. The role involves verifying chip blocks and models according to specifications, with interaction across organization-wide groups. Requirements include a relevant degree or equivalent experience, 2+ years in verification, and strong English skills. Preferred qualifications include experience with Specman, UVM/SV, and HDL. | — | 0 |
| Physical Design Backend Engineer NVIDIA is seeking a Physical Design Engineer to join their Networking Silicon engineering team. The role involves the physical design of high-speed communication devices, focusing on power, area, and performance. Responsibilities include RTL2GDS flows, synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification. | — | 0 |
| Senior Software Engineer, DPU - Networking Senior Software Engineer for NVIDIA DPU Platform team, focusing on developing system software components, firmware, kernel drivers, and user space applications for advanced data centers. Requires deep knowledge of embedded platforms, operating systems, and software distribution technologies, with experience in pre-silicon development, optimization, and full product life-cycle participation. | — | 0 |
| GPU System and Scheduling Architect - New College Grad 2026 NVIDIA is seeking a New College Grad GPU System and Scheduling Architect to design the next generation of their GPU system interface. Responsibilities include understanding GPU sub-system interoperation, architecting features with global teams, creating functional and performance models in C++, and supporting post-silicon validation. Requires a BS/MS/PhD in a related field and strong C/C++ proficiency, with exposure to post-silicon validation and computer architecture coursework. | — | 0 |
| Technical Project Lead, SPE NVIDIA is seeking a Technical Project Lead for their System Product Engineering organization. The role involves developing and deploying automatic testers for network business units, analyzing manufacturing data using ML/AI and statistical tools to identify quality issues, leading production and failure analysis, and validating test performance. The TPL will manage projects from requirements to end-of-life, acting as an engineering manager and technical authority. | — | 0 |
| Verification Engineer - Compilers C++ NVIDIA is seeking a Verification Engineer to ensure the quality of their compiler technology. The role involves designing C++ test suites, automating compiler testing, and identifying gaps in current procedures. The engineer will leverage LLM technologies to enhance C++ testing quality and work within existing iterative planning and test development processes. | — | 0 |
| Senior Architect, Simulation Kernel Modelling Develops and improves modeling infrastructure for GPU and SOC models, supporting architecture and engineering teams in building models for next-generation chip architectures using SystemC, C++, and related tools. | — | 0 |
| Senior Bring up Methodology Lead Senior engineer to lead end-to-end planning and execution of NVIDIA's new chip bringup efforts, coordinating multi-functional teams, developing methodologies, and serving as a central point of contact for leadership. | — | 0 |
| Chip Lead, Silicon Co-Design Group NVIDIA is seeking a Chip Lead for their Silicon Co-Design Group. This role serves as the technical lead for silicon programs, focusing on end-to-end technical integrity, feature integration, bug resolution, and shaping the technical narrative. The position requires deep understanding of SoC and ASIC architecture, with expertise in subsystems like HBM, SerDes, power/thermal, or packaging. The role involves guiding technical decisions across functional boundaries without direct authority and translating complex issues for executive leadership. Experience with post-silicon bring-up, validation, or system integration leadership is essential, along with a track record of shipped silicon products. | — | 0 |
| Senior System Software Engineer - GPU Power Management Senior System Software Engineer at NVIDIA focusing on GPU power management and performance optimization. The role involves defining, designing, and developing system software components, driving features from idea to productization, and resolving complex technical issues. Requires strong C programming, low-level firmware concepts, and operating system fundamentals. Experience with Datacenter Power Management and real-time controllers is a plus. | — | 0 |
| Senior Chip Design Verification Engineer Senior Chip Design Verification Engineer at NVIDIA, focusing on developing and verifying next-generation chip controllers for networking and GPU systems. Requires 5+ years of ASIC verification experience and strong teamwork skills. | — | 0 |
| Senior ASIC Design Engineer - XBAR IP Senior ASIC Design Engineer role at NVIDIA, focusing on the design of memory subsystem components for Graphics Processors. The role involves micro-architecture, RTL development, verification, and collaboration with various engineering teams. Requires 4+ years of design experience and expertise in Verilog. | — | 0 |
| Senior High Speed SerDes Validation Engineer NVIDIA is seeking a Senior High Speed SerDes Validation Engineer to develop and implement complex automated test plans for their GPU accelerated computing products. The role involves owning validation from start to finish, collaborating with internal and external teams, and developing system-level stress and performance testing strategies using Deep Learning/AI applications. | — | 0 |
| ASIC Physical Design Engineer, Netlisting - New College Grad 2026 NVIDIA is seeking a motivated ASIC Physical Design Engineer, Netlisting for their Santa Clara or Austin office. The role involves driving the physical design of high-frequency and low-power CPUs, GPUs, and SoCs, with a focus on netlist-related aspects like equivalence checking, asynchronous checking, and logic synthesis. The ideal candidate will have a Master's or PhD in Electrical or Computer Engineering, knowledge in logic equivalence checking, understanding of hardware architecture, and experience with RTL/logic design for timing closure. Experience with clock-domain-crossing checks, MTBF analysis, logic synthesis, and scripting languages like Python is also required. Experience with AI utilization in workflows is a plus. | — | 0 |
| Manager, System Design Tools and Methodology Manager for System Design Tools and Methodology at NVIDIA, focusing on architecting the engineering pipeline for complex AI systems. The role involves leading a team to evolve CAD/PLM ecosystems, develop data-driven workflows, and streamline the product lifecycle from prototyping to mass production. | — | 0 |
| GPU Development Tools System Software Engineer Software Engineer at NVIDIA focused on developing core verification infrastructure for GPU and SoC chips, using C++ and Python. The role involves programming and testing next-generation features throughout the chip development lifecycle. | — | 0 |
| Senior Platform Software Engineer – Factory NVIDIA is seeking a Senior Platform Software Engineer for their Factory team. This role involves leading factory validation projects for software, firmware, and diagnostics, integrating and handing over these components, and providing strategic direction to engineering teams. The engineer will also analyze and optimize factory processes, develop documentation, perform system testing, and monitor data for improvements. The role requires experience in integration engineering, server manageability, and programming skills in Python, C/C++, and shell scripting, with a focus on GPU platforms. | — | 0 |
| Senior Validation Engineer Senior Validation Engineer at NVIDIA, focusing on leading project validation efforts, interacting with multidisciplinary teams, reporting progress to leadership, setting up debug meetings, and anticipating/solving project issues. Requires 10+ years of experience in validation engineering, strong leadership, communication, and problem-solving skills, with a deep understanding of experimental design, debugging complex technical issues, and various signal/power/EMI/thermal testing methodologies. | — | 0 |
| Senior C++ Software Engineer - Chip Design Tools Senior Software Engineer role focused on developing and supporting infrastructure tools for chip design and verification processes, using C++/Golang to analyze and construct chip designs. Responsibilities include building scalable software, researching solutions for efficiency, and optimizing workflows for chip modelers and designers. | — | 0 |
| SONiC Verification Engineer Software Verification Engineer for NVIDIA's Ethernet Switch SONiC Network OS, focusing on designing and implementing automation test suites, working with CI/CD systems, and contributing to the SONiC community. | — | 0 |
| ASIC Physical Design Engineer NVIDIA is hiring ASIC Physical Design Engineers (junior and senior) to work on physical design from RTL to GSDII, including design quality check, synthesis, formal check, partitioning, constraint management, timing analysis, and signoff. The role involves working with advanced processes and large chips, collaborating with various teams, and developing/enhancing the timing closure flow. Experience with EDA software and scripting languages is preferred. | — | 0 |
| Senior System Software Engineer - Automotive Senior Software Engineer role focused on supporting NVIDIA's DRIVE OS software stack for automotive customers, involving system integration, BSP porting, and device driver development. Requires strong C/C++/Python, QNX/Linux OS knowledge, and experience with automotive systems. | — | 0 |
| Systems Infrastructure Software Engineer NVIDIA is seeking experienced Systems Infrastructure Software Engineers to design, implement, and debug the next generation of large-scale, general-purpose graphics and computing chips. The role involves building core verification infrastructure for GPU and Tegra chips using object-oriented C++ and Python, focusing on developing environments for programming and testing next-generation features, collaborating with cross-functional teams, and participating in the full chip development lifecycle. | — | 0 |
| Senior Physical Design Verification Layout Engineer Senior Physical Design Verification Layout Engineer role at NVIDIA, focusing on the design and verification of high-speed communication chips. Responsibilities include chip floorplan, pin placement, physical verification flows, and physical layout implementation. Requires 5+ years of layout experience, strong background in Physical Verification (ERC, LVS, DRC), knowledge of advanced silicon process technologies, and familiarity with EDA tools (Synopsys, Cadence). Experience with Linux, scripting (TCL, Python), data collection, and chip/die verification is a plus. Mentions AI tools orientation as a way to stand out. | — | 0 |
| Senior Physical Design Engineer Senior Physical Design Engineer role at NVIDIA, focusing on the design, integration, and verification of high-speed communication chips. Responsibilities include complex physical design unit designs, running and debugging PnR and verification flows, and performing physical design implementation, planning, and optimization. Requires 5+ years of hands-on Physical Design 'Place and Route' experience, strong background in Physical Design methodology (Synthesis, Floorplan, CTS, Routing), sign-off stages (STA, PV, LEC, EMIR), knowledge of advanced silicon process technologies, and familiarity with EDA tools. | — | 0 |
| Senior Software Engineer - Python & C++ Senior Software Engineer to join the Video/Multimedia Architecture & Algorithms (A&A) team, focusing on building and optimizing core components for NVENC and NVDEC (video encode/decode engines). The role involves C++ and Python development, mentoring engineers, guiding research code to production, profiling and optimizing critical paths, and building team tools. Experience with video codecs, CUDA, and Python embedding is a plus. | — | 0 |
| Senior System Hardware Engineer Senior System Hardware Engineer role focused on the development of networking infrastructure for NVIDIA's next-generation data centers, emphasizing accelerated performance and GPU connectivity. Responsibilities include hands-on testing, problem-solving during production and qualification, and collaboration across various hardware and software project fields. | — | 0 |
| Senior Mixed Signal Design Engineer Senior Mixed-Signal/Analog/IO Circuit Design Engineer with expertise in high-speed memory interface designs and deep submicron CMOS FinFET processes. Responsibilities include circuit design, productization, and collaboration with multi-functional teams. Requires advanced high-speed design expertise, FinFET circuit mastery, knowledge of reliability and physical integrity, proficiency in design tools, a silicon-to-system perspective, and collaborative leadership skills. | — | 0 |
| Senior Compiler Engineer Infrastructure Senior Compiler Engineer Infrastructure role focused on aligning NVIDIA's compiler codebases with open-source ecosystems and improving developer productivity at scale. This role involves reconciling downstream compiler repositories with upstream open-source projects like LLVM, Clang, and MLIR, and building tooling and infrastructure for compiler engineers. | — | 0 |
| Senior LLVM Compiler Engineer Senior Compiler Engineer focused on upstream engagement with the LLVM ecosystem and advancing NVIDIA’s compiler technology through sustained participation in open-source communities. This role involves working directly with LLVM, Clang, MLIR, and related open-source projects to upstream compiler functionality. | — | 0 |
| Engineering Manager - OpenBMC Platform Engineering Manager for OpenBMC Platform at NVIDIA, responsible for owning and delivering an end-to-end manageability stack for Data Center Systems. This role involves managing a team of software engineers, designing and building OpenBMC based firmware, and ensuring quality, reliability, and performance of the delivered firmware. | — | 0 |
| Senior Software Verification Engineer Senior Software Verification Engineer role focused on verifying the design and implementation of NVIDIA's Data Processing Unit (DPU) Software, with a focus on cybersecurity and embedded systems. Responsibilities include test plan development, automation, system integration validation, defect analysis, and test environment management within Linux-based systems. | — | 0 |
| Senior Formal Verification Engineer - LPU Senior Formal Verification Engineer to verify AI-related sophisticated ASIC designs and features using formal verification methods. Role involves defining verification scope, ensuring correctness, employing sophisticated formal techniques, and improving methodologies. Requires 12+ years in ASIC verification with 8+ years in formal verification, mastery of SVA, and proficiency in formal tools. | — | 0 |
| Senior Formal Verification Engineer - LPU Senior Formal Verification Engineer at NVIDIA focusing on verifying AI-related ASIC designs using formal verification methods. Requires extensive experience in ASIC verification, formal techniques, SystemVerilog Assertions (SVA), and formal verification tools. The role involves collaboration with design teams, methodology leadership, and mentorship. | — | 0 |
| ASIC Design Engineer - New College Grad 2026 NVIDIA is seeking an ASIC Design Engineer for their Memory Subsystem Team, focusing on micro-architecture, RTL design, synthesis, and timing analysis for sophisticated SOC Interconnects. The role involves collaboration with various engineering teams and requires proficiency in Verilog/VHDL and scripting languages, with exposure to high-speed interconnects and industry specifications. | — | 0 |
| Verification Engineer - New College Grad 2026 NVIDIA is seeking a Verification Engineer to verify the design and implementation of memory subsystems for their SoCs and GPUs, which are used in AI and other computing applications. The role involves developing verification infrastructure, executing test plans, and collaborating with design teams. | — | 0 |
| Senior ASIC Timing Engineer, DFT NVIDIA is seeking a Senior ASIC Timing Engineer, DFT to drive timing analysis and closure for DFT logic on all Nvidia chips. The role involves working with various teams to develop timing constraints, drive convergence, and implement ECOs, while also improving workflows through automation. Requires a BS/MS in Electrical or Computer Engineering with significant experience in Static Timing Analysis (STA) and timing convergence, including expertise in ECOs and timing constraint development. | — | 0 |
| Senior Packaging Technical Engineer - Hardware NVIDIA is seeking a Senior Packaging Technical Engineer to define and implement silicon pad rings, substrate interconnect schemes, and lead the package layout design process. This role involves collaborating with various engineering teams and requires expertise in chip floor planning and package design. | — | 0 |
| Senior SONiC Software Engineer - Python Senior Software Engineer focused on automation and testing for NVIDIA's SONiC Network OS, requiring Python programming and Linux knowledge. | — | 0 |
| Senior Software Engineer - Python, Spectrum-X NVIDIA is seeking a Senior Software Engineer to join their Spectrum-X team, focusing on creating and testing automation for Ethernet networking solutions that support AI factories. The role involves designing and implementing test automation suites, debugging complex networking problems, and collaborating with customers and an international team. Requires 5+ years of experience in networking product delivery, strong Python skills, and Linux familiarity. | — | 0 |
| Senior System Software Engineer, Networking - DGX Cloud Senior System Software Engineer focused on networking for block storage solutions, involving C language coding in kernel and userspace, research, design, implementation, and testing of advanced networking services. The role requires strong proficiency in C/C++, networking fundamentals, Linux environments, and RDMA technologies, with experience in distributed systems and cloud computing concepts. | — | 0 |
| Principal System Software Engineer, Networking Linux Kernel - DGX Cloud NVIDIA is seeking a Principal System Software Engineer for their DGX Cloud networking team. This role involves hands-on coding in C for the Linux kernel and userspace, focusing on storage services and networking features for distributed storage solutions. The engineer will research, design, implement, and test new features, analyze and solve complex bugs in large-scale production systems, and work with various teams and architects. The role requires strong C/C++ proficiency, knowledge of networking fundamentals, experience with RDMA technologies, and understanding of distributed systems and cloud computing concepts. | — | 0 |
| Principal Storage Kernel Software Engineer, Linux - DGX Cloud NVIDIA is seeking a Principal Storage Kernel Software Engineer to join their block storage group. The role involves hands-on coding in C for both kernel and userspace, focusing on designing, implementing, and testing distributed storage services for NVIDIA's block storage solution. The engineer will work on advanced AI tools and a token budget for code development, research new features, analyze and solve complex bugs, and collaborate with various teams and external customers to meet extreme performance and scalability demands. | — | 0 |
| Senior ASIC Verification Engineer, Coherent High Speed Interconnect NVIDIA is seeking a Senior ASIC Verification Engineer to verify high-speed coherent interconnects for their SoCs and GPUs. This role involves architecting test benches, developing verification infrastructure, and collaborating with design teams using methodologies like System Verilog and UVM. Experience with industry standard protocols like PCIe and CXL is beneficial. | — | 0 |
| Lead Performance Modeling Architect, CPU Fabric and LLC Lead Performance Modeling Architect for CPU Fabric and LLC at NVIDIA, focusing on next-generation cache hierarchies and I/O coherent interconnects for Automotive and Data Center platforms. The role involves guiding a team, defining modeling infrastructure vision, and driving advanced modeling methodologies. | — | 0 |
| Senior Performance Modeling Architect, CPU Fabric and LLC Senior Performance Modeling Architect role at NVIDIA focusing on CPU Cache Hierarchies and interconnects for Automotive and Data Center systems. Responsibilities include developing high-fidelity performance models, analyzing bottlenecks, evaluating coherency protocols, and collaborating with other teams. Requires a Master's or Ph.D. in a relevant field with strong computer architecture, C++/SystemC modeling, and Python scripting skills. | — | 0 |
| Memory Mask Design Engineer NVIDIA is seeking a Memory Mask Design Engineer to implement IC layout of high-performance, high-speed CMOS integrated circuits in advanced process nodes. The role involves delivering layouts for digital memory circuits, adopting best layout practices, and following company procedures. Requires B.E/B Tech. / M Tech with 2+ years of experience in memory layout, knowledge of EDA tools, and experience with various memory types and layout verification. | — | 0 |
| CPU Verification Engineer NVIDIA is seeking a CPU Verification Tools Engineer to work on ARM architecture-based CPUs for AI execution. The role involves developing and using Random Instruction Sequence (RIS) tools for CPU verification, collaborating with design teams, and analyzing verification strategies. Experience with AI accelerated workflows is mentioned as a way to enhance efficiency. | — | 0 |