Currently tracking 56 active AI roles, down 34% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $122k–$414k (avg $253k).
Intel currently has 84 active job listings related to artificial intelligence. The majority of these roles, 51%, are focused on serving infrastructure, with agents representing another significant portion at 24%. Engineering is the most frequent function for these positions. The company is actively hiring in the United States, China, and Mexico. Frequent technical tags include model serving, inference infrastructure, and agent orchestration. In the last 30 days, Intel has added 73 new AI roles, representing a 52% increase compared to the previous 30-day period.
Intel currently has 59 active AI-related roles in our index. The most common open titles are: AI Software Engineering Intern (3), AI Software Engineer Intern (2), GenAI Software Solutions Engineer (2), Graduate Talent (GenAI Software Solutions Engineer) (2), AI Algorithm Engineer. Most positions are in Engineering and Research.
Intel's active AI hiring is concentrated in: serving infrastructure (49%), agents (29%), application (8%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
Intel is hiring AI talent in: United States (28 roles), China (7 roles), Mexico (6 roles), Malaysia (6 roles).
Job postings at Intel most frequently reference: model serving, inference infra, agent orchestration, rag, tool use.
In the past 30 days, Intel has posted 28 new AI-related roles. That is a -63% change versus the prior 30 days (75 → 28).
| Title | Stage | AI score |
|---|---|---|
| Neuromorphic Applications Researcher- Temporary Position Research role focused on developing and benchmarking AI algorithms and robotics applications for Intel's next-generation neuromorphic architecture, aiming to enable physical AI systems with groundbreaking performance and efficiency. The role involves evaluating applications on neuromorphic hardware, validating the SDK, and publishing results. | ShipServe | 9 |
| AI Algorithm Research Intern – Neuromorphic Computing AI Algorithm Research Intern focused on developing, implementing, and benchmarking algorithms for Intel's next-generation neuromorphic architecture to enable applications in edge computing, signal processing, and autonomous systems. The role involves contributing to Intel's neuromorphic SDK and publishing research findings. |
| Data |
| 9 |
| AI Algorithm Research Intern – Neuromorphic Computing Intern position at Intel's Neuromorphic Computing Lab focused on developing, implementing, and benchmarking algorithms for next-generation neuromorphic architectures. The role involves supporting application development, publishing research, and contributing to the neuromorphic SDK, with a focus on edge computing, signal processing, and autonomous systems. | Data | 9 |
| Neuromorphic Applications Engineer- (Temporary Position) This role focuses on demonstrating the value of Intel's neuromorphic technologies by developing, implementing, and benchmarking algorithms for next-generation neuromorphic architectures. The goal is to enable applications in edge computing, signal processing, and autonomous systems for physical AI, with a focus on robotics applications like VLA models for drones and humanoids. The role involves validating the neuromorphic SDK, gathering metrics, proposing software enhancements, and presenting findings. It's a fixed-term position within Intel's CTO Office, aiming to commercialize neuromorphic technology. | ShipServe | 8 |
| AI Robotics Engineer- (Temporary Position) Develop, implement, and benchmark advanced robotics algorithms optimized for modern heterogeneous Intel compute architectures, enabling high performance and efficient solutions for real-world applications in autonomous systems, edge robotics, and intelligent physical systems. This role involves integrating and simulating large-scale robotics systems and bringing real robotic platforms to life, with a focus on commercializing these technologies for future Intel and partner products. | ShipAgent | 8 |
| SoC PTP Val and Opt Engineer (Temporary position) This role focuses on building an internal AI-driven automation platform (GenIA) that enables LLM-based workflows, intelligent agents, and GenAI integrations. The engineer will develop and maintain automation frameworks, orchestration services, and AI-driven workflows for validation and engineering operations, integrating internal tools, APIs, and data pipelines with LLM/GenAI services. The goal is to create intelligent agents and reusable workflows to automate tasks and improve engineering productivity and validation efficiency. | AgentData | 7 |
| SoC PTP Val and Opt Engineer (Temporary position) This role focuses on developing and maintaining an internal AI-driven automation platform (GenIA) for Intel, enabling LLM-based workflows, intelligent agents, and GenAI integrations. The engineer will build integrations, create intelligent agents, and design scalable automation solutions to improve engineering productivity and streamline validation/operational workflows. | AgentData | 7 |
| SoC PTP Val and Opt Engineer (Temporary position) The role involves developing and maintaining an internal AI-driven automation platform (GenIA) that enables LLM-based workflows, intelligent agents, and GenAI integrations. Responsibilities include building integrations, creating intelligent agents, designing scalable automation solutions, and enhancing reliability and observability. The role requires experience with Python, automation frameworks, LLMs/GenAI, and Linux environments. | AgentData | 7 |
| Robotics Research Intern Robotics Research Intern at Intel focusing on advanced algorithmic development and robotics research for next-generation robotic technologies. The role involves researching, designing, and optimizing robotics algorithms, control systems, and AI/ML models, with a focus on enabling intelligent autonomous systems and innovative robotic applications. Collaboration with cross-functional teams to translate research into practical implementations is key. | Agent | 7 |
| AI Tools Development Intern Intern role focused on the development, validation, and deployment of AI tools such as GenAI assistants, RAG-based knowledge tools, and workflow automation agents within an enterprise AI context. Requires basic knowledge of ML/GenAI concepts and Python programming. | Agent | 7 |
| Software Enabling and Optimization Engineer Software Enabling and Optimization Engineer at Intel, focusing on optimizing software solutions for Intel's products across AI, Cloud, HPC, Graphics, and Edge. Responsibilities include collaborating with customers and vendors, debugging complex issues, conducting code reviews, researching innovative solutions, and providing technical consulting. | Serve | 5 |
| AI Systems and Solutions Engineering Intern Internship role supporting the design and development of integrated AI solutions combining software, hardware awareness, and system-level concepts. Focus on learning AI systems development across the tech stack, from models to platform considerations, and contributing to prototyping and testing. | Serve | 5 |
| Hardware Design – AI Ecosystem Enabling Intern This intern role focuses on the hardware engineering aspects of AI ecosystem solutions, involving algorithm and framework design, AI software architecture, and optimizing AI solutions for hardware performance. It combines hardware engineering with AI/ML techniques for design efficiency and analysis, including implementing and tuning models, applied research, and system-level deployment. The role emphasizes AI augmenting engineering judgment. | Serve | 5 |
| Software Development Intern Software Development Intern role focused on AI-enhanced requirements engineering within Intel's Data Center Requirements team. The intern will contribute to intelligent automation, ML-driven data analysis, and AI-powered tool creation, leveraging web development, scripting, database, and data structure skills. The role emphasizes learning software development methodologies, debugging, automation, and data analysis. | — | 5 |
| AI Tools Development Intern Seeking an AI Tools Development Intern to support the design, development, and validation of AI tools, working closely with experienced engineers. This role involves hardware design activities, documentation, and collaboration with cross-functional teams. The intern will gain practical experience in hardware design processes and engineering tools. | — | 5 |
| Cloud Software Developer Engineer Software Development Engineer focused on optimizing full-stack software for cloud deployment models, enabling Intel hardware features, with opportunities to specialize in AI/ML domains. The role involves designing, developing, validating, and debugging software solutions, collaborating with partners, and engaging in DevOps practices. | — | 5 |
| Software Simulation Intern Software simulation intern role focused on developing and simulating platform simulators in a cloud environment to enable early firmware and software development for Intel's products. Requires programming skills in Python, C/C++ and knowledge of computer architecture. Experience with AI solutions is a plus. | — | 5 |
| Cloud Software Developer Engineer Cloud Software Development Engineer at Intel, focused on enabling Intel hardware features and optimizing full-stack software for cloud, hybrid cloud, and on-premises deployments. Opportunities to specialize in AI/ML. | — | 2 |
| IP Design Verification Engineer This role is for an IP Design Verification Engineer focused on memory controllers and associated IPs within Intel's Data Center Group. The engineer will develop and execute verification plans, test benches, and simulation models, debug design issues, and improve verification infrastructure and methodologies. The role requires experience with System Verilog, Python, and IP validation tools, with a focus on ensuring the quality and reliability of Intel's memory ecosystem. | — | 0 |
| SoC Functional Validation Intern Internship role supporting the functional validation of System on Chip (SoC) devices and systems, involving test content development, data analysis, and validation infrastructure. Requires programming experience in Python, C, or C++ and advanced English. | — | 0 |
| Senior CPU Pre-Si Verification Engineer Senior Pre-Si Verification Engineer for Intel's E-Core CPU team, responsible for verifying new and existing features for next-generation CPU IP using simulation-based environments and formal verification. Requires expertise in hardware description languages, test bench development (System Verilog UVM/OVM), programming languages, and functional coverage analysis. | — | 0 |
| FPGA/Emu Engineer FPGA/Emulation Engineer role focused on optimizing RTL development, FPGA/emulation models, and solutions for pre-silicon verification, post-silicon validation, and software development. Responsibilities include building and optimizing emulation/FPGA models, developing and debugging hardware/software collateral, defining new capabilities, collaborating with verification teams, interfacing with cross-functional teams for SoC bring-up, and developing automation scripts. Requires proficiency in System Verilog, experience with emulation tools/FPGA prototyping, debugging skills, and knowledge of microarchitecture and SoC integration. | — | 0 |
| Electrical Validation Engineering Intern- Client IO Electrical Validation Engineering Intern for Client IO team at Intel, focusing on validating high-speed and low-speed silicon interfaces. Responsibilities include hardware bring-up, lab testing, data analysis, and supporting automation framework development. Requires final-year Bachelor's or Master's in Electrical Engineering with Python/C++ experience. | — | 0 |
| Atom CPU Layout Design Engineer Job posting for an Atom CPU Layout Design Engineer at Intel in Guadalajara, Mexico. Responsibilities include physical implementation of memory compilers, custom IP blocks, and layout partitions for future-generation Intel Atom microprocessors. Requires a Bachelor's degree in a related field, 6+ months of layout design experience, and advanced English. Preferred qualifications include a Master's degree, VLSI/CMOS experience, and Unix/Linux knowledge. | — | 0 |
| Atom CPU Layout Design Engineer Job posting for an Atom CPU Layout Design Engineer at Intel in Guadalajara, Mexico. Responsibilities include physical implementation of memory compilers, custom IP blocks, and layout partitions for future-generation Intel Atom microprocessors. Requires a Bachelor's degree in a related field, 6+ months of layout design experience, and advanced English. Preferred qualifications include a Master's degree, VLSI/CMOS experience, and Unix/Linux knowledge. | — | 0 |
| Platform Applications Engineer Platform Applications Engineer at Intel, focusing on hardware technical marketing, customer support, and product lifecycle management. The role involves acting as a liaison between customers and internal teams, identifying market trends, and contributing to new product development and training materials. Requires strong technical expertise in hardware systems, project management, and cross-functional collaboration. | — | 0 |
| Senior SoC Pre-Silicon Verification Engineer Senior Pre-Silicon Verification Engineer responsible for functional logic verification of an integrated SoC, defining and developing verification plans, test benches, and environments. The role involves executing verification plans, running emulation and simulation models, debugging issues, and collaborating with cross-functional teams. It also includes incorporating security activities and maintaining verification infrastructure. | — | 0 |
| SoC Pre-Silicon Verification Engineer This role focuses on the functional logic verification of an integrated SoC (System on Chip) to ensure it meets specifications. Responsibilities include defining and developing verification plans, test benches, and environments, executing these plans using emulation and simulation, debugging issues, and collaborating with various design teams. The role also involves incorporating security verification and improving the verification infrastructure. It requires experience with industry-standard verification methodologies like UVM and System Verilog. | — | 0 |
| SoC Functional Validation Engineer SoC Functional Validation Engineer responsible for ensuring Intel's System-on-Chip (SoC) solutions meet quality, functionality, and performance standards. This involves validating IP integration, system-level features, and debugging post-silicon issues. | — | 0 |
| Senior Layout Design Engineer Senior Layout Design Engineer at Intel in Guadalajara, Mexico, focusing on semiconductor physical design. | — | 0 |
| Electrical Validation Engineering Grad Intern Electrical Validation Engineering Graduate Intern at Intel, focusing on pre-silicon and post-silicon validation of server datacenter products, specifically memory I/O technologies. Responsibilities include developing test content, performing silicon debug and characterization, and collaborating with cross-functional teams. Requires a Bachelor's or Master's in Electrical/Computer Engineering and experience with hardware architecture, programming languages (Python, C, C++), and high-speed circuit testing. | — | 0 |
| Electrical Validation Intern for Client IO Electrical Validation Intern for Client IO at Intel, focusing on validating high-speed and low-speed silicon interfaces. Responsibilities include hardware bring-up, lab testing with professional equipment, data analysis, and developing automation frameworks for electrical validation. Requires coursework in Electrical Engineering and programming skills in Python or C++. | — | 0 |
| SoC Debug Engineer Early-career FPGA Developer role focused on RTL design and verification (VHDL/Verilog/System Verilog) for a proprietary JTAG-based debug tool used in microprocessor and SoC bring-up and validation. Responsibilities include implementing FPGA RTL, assisting with integration, writing simulations, debugging RTL and hardware issues, and contributing to FPGA build flows. The role involves collaboration with software, validation, and hardware teams. | — | 0 |
| Design Verification Student Worker Student worker role focused on pre-silicon verification of hardware designs for Intel's next-generation IPs, ensuring bug-free final designs through RTL validation, test plan development, and debugging. | — | 0 |
| Software Development Intern Seeking a Software Applications Engineering Undergraduate Intern to work on innovative projects, collaborate with professionals, and contribute to software development. Responsibilities include assisting in design, development, and testing of software applications, participating in code reviews, contributing to desktop application development using C#, .Net, C++, Python, and scripting for automation. The role involves problem-solving, communication, and learning practical software design and development processes. | — | 0 |
| Strategic Account Executive – Telecommunications Strategic Account Executive for Intel's Telecommunications sector in Latin America, focusing on driving Intel's edge-to-cloud strategy and building partnerships with a major telecommunications company. Responsibilities include developing strategic plans, leading sales teams, building C-suite relationships, and exceeding revenue goals. | — | 0 |
| Firmware Developer Engineering Intern Internship role focused on firmware development for memory sub-systems in Intel silicon products, involving design, implementation, testing, and documentation of memory reference code and platform BIOS. | — | 0 |
| CPU Design and Verification Student Worker Student worker role focused on pre-silicon verification of CPU IP for Intel's next-generation CPU cores. Responsibilities include developing test plans, creating simulation components, debugging digital simulations, and ensuring functional coverage. Requires a Bachelor's or Master's degree in a related field with at least one year remaining, and experience in digital design, ASIC flow, computer architecture, programming languages, and hardware description languages. | — | 0 |
| Layout Design Intern Internship role focused on physical layout design of next-generation semiconductors, supporting custom IP blocks and APR partitions. Responsibilities include executing layout tasks, assessing and driving complex assignments, and collaborating with senior engineers on methodologies and automation scripts. The role offers learning opportunities in advanced VLSI layout, physical implementation flows, EDA tools, microprocessor architecture, and cross-functional collaboration. | — | 0 |
| Layout Design Intern Internship role focused on physical layout design for next-generation semiconductors, supporting custom IP blocks and APR partitions. Responsibilities include executing layout tasks, assessing and driving complex assignments, and collaborating with senior engineers on methodologies and automation scripts. The role involves learning advanced VLSI layout techniques, physical implementation flows, EDA tools, and microprocessor architecture fundamentals. | — | 0 |
| Platform Validation Intern This is an internship role for an Engineering Intern to support validation activities for Telecommunications products. Responsibilities include setting up platforms, executing test cases, performing triage, scripting manual test cases, and automating test plans. The candidate should be pursuing a bachelor's degree in a related STEM field and have experience with scripting languages like Python, Linux OS, system validation, and computer assembly. | — | 0 |
| Software Simulation Intern This role is for a Software Simulation Intern at Intel, focusing on developing and improving system simulators for Intel's product firmware and software. The intern will be involved in coding, testing, debugging, analyzing specifications, and collaborating with hardware and software engineers to deliver next-generation simulation platforms. The role requires programming skills in Python, C/C++, and potentially other languages, with a background in computer architecture being a plus. While AI solutions are mentioned as a helpful tool, the core of the role is in software simulation and system development, not direct AI/ML model development. | — | 0 |
| Power Delivery Validation Intern Intern position for an Electronics or Electrical Engineering student to work on power delivery and integrity validation of Intel's next-generation CPUs. Responsibilities include validation, characterization, optimization of integrated voltage regulators and power delivery networks, developing automation software, and using lab equipment. Requires Python or C++ programming skills and knowledge of power electronics and control systems. | — | 0 |
| Memory Validation Intern Intern position contributing to the functional, power, performance, and memory validation of Intel silicon products. Responsibilities include debugging, data analysis, validation coverage assessment, test automation, and developing validation infrastructure. Requires current pursuit of a relevant Bachelor's or Master's degree and 3+ months of experience in signal integrity electronic circuit analysis and data analysis techniques. | — | 0 |
| ECE Firmware Engineering Intern Internship role focused on firmware engineering for Intel Client architecture, contributing to the design, development, validation, and debugging of embedded software for Edge reference platforms. Involves system-level modeling, algorithm development, and hardware-software integration. | — | 0 |
| Security Research Intern Internship role focused on security research for hardware development teams, involving review of designs, threat and vulnerability assessments, and creating proof-of-concepts for security risks in SoCs. | — | 0 |
| Electrical Validation Intern Electrical Validation Intern at Intel, contributing to the functional, power, performance, and electrical validation of silicon products. Responsibilities include debugging, data analysis, coverage assessment, and potentially assisting with test automation and validation infrastructure development. The role requires a Bachelor's degree in Engineering and experience in signal integrity electronic circuit analysis. | — | 0 |
| High-Speed SerDes Simulation & Optimization Intern — I/O Next Generation R&D This internship focuses on developing automated simulation workflows for high-speed I/O technologies like PCIe, evaluating channel and circuit topologies, extracting channel models, and analyzing results to identify optimization opportunities. The role involves collaborating with engineers, executing parametric studies, and contributing to documentation for future server platforms and data center leadership. | — | 0 |
| Optical Component Link Simulation Student Worker Student worker role focused on developing and automating simulation workflows for next-generation electro-optical links, benchmarking link parameters, performing laboratory measurements to validate simulation models, and analyzing performance differences. The role involves synthesizing findings for component architecture recommendations and contributing to I/O specifications. | — | 0 |
| Electromagnetic Modeling Student Worker Intel's IOTS Pathfinding team is seeking an Engineer Intern to support readiness and scalability for next-generation high-speed I/O technologies. The role involves developing and validating 3D electromagnetic (EM) model libraries for interconnects using industry-standard tools to support signal integrity (SI) and power integrity (PI) evaluations. Responsibilities include running parametric studies, correlating simulations to measurements, and contributing to documentation and reusable modeling workflows. | — | 0 |