NVIDIA currently has 496 active AI-related job listings. The majority of these roles, 52%, are focused on serving infrastructure, with agents representing another significant segment at 23%. Engineering is the dominant function, with 441 positions. The United States leads hiring geographies with 287 roles, followed by China with 64. Frequent tech tags include model_serving, inference_infra, and agent_orchestration, suggesting a focus on deployment and management of AI models. Over the last 30 days, NVIDIA posted 214 new AI roles, a 27% decrease compared to the previous 30-day period.
Currently tracking 440 active AI roles, down 50% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $100k–$575k (avg $262k).
NVIDIA currently has 487 active AI-related roles in our index. The most common open titles are: Deep Learning Performance Architect (4), Senior Deep Learning Performance Architect (4), AI Research Scientist (3), Developer Technology Engineer - AI (3), Manager, Deep Learning Algorithms (3). Most positions are in Engineering and Research.
NVIDIA's active AI hiring is concentrated in: serving infrastructure (54%), agents (21%), application (8%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
NVIDIA is hiring AI talent in: United States (286 roles), China (59 roles), Israel (50 roles), Germany (21 roles).
Job postings at NVIDIA most frequently reference: model serving, inference infra, agent orchestration, llm observability, multimodal.
In the past 30 days, NVIDIA has posted 107 new AI-related roles. That is a -49% change versus the prior 30 days (211 → 107).
| Title | Stage | AI score |
|---|---|---|
| Senior Firmware Engineer - NVLink Switch Senior Firmware Engineer for NVLink Switch at NVIDIA, focusing on designing and implementing firmware features for next-generation data center products that support the AI revolution. The role involves collaboration with architecture and software teams, pre and post-silicon development, and understanding system debugging and networking technology. | — | 0 |
| Firmware Engineer NVIDIA is seeking a Firmware Engineer to join their NVLink FW group, focusing on designing and implementing firmware features for next-generation networking and GPU products. The role involves collaboration with architecture and software design teams, working in pre and post-silicon environments, and gaining deep understanding of system debugging and networking technologies. The team develops cutting-edge networking features for AI, Cloud & HPC. | — | 0 |
| Manager, Networking Firmware Engineering Manager for a Networking Firmware Engineering team at NVIDIA, focusing on developing cutting-edge networking features for AI, cloud, HPC, and storage. The role involves leading a team, providing technical guidance, and hands-on development of NVIDIA NIC firmware. |
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| Firmware Design Engineer - NVLink GPU Networking NVIDIA is hiring a Firmware Design Engineer to join their GPU networking (NVLink) FW group. The role involves designing, implementing, and driving firmware features for next-generation GPU networking products. Responsibilities include working in pre & post-silicon development environments, debugging system issues, and understanding HW/FW/SW relationships. Requires 2+ years of experience, BS/MS in CS/CE/EE, proficiency in C and Python, and strong embedded/real-time programming skills. | — | 0 |
| Senior Software Engineer, DOCA SDK Senior Software Engineer to develop core libraries for the NVIDIA DOCA SDK, focusing on network acceleration for SmartNIC products. The role involves architecting, designing, and developing next-generation technology, collaborating with various engineering teams, and engaging with customers. Experience with C/C++, Linux, networking protocols, virtualization, and performance optimization is required. Knowledge of DPDK and SDK design is a plus. | — | 0 |
| BSP and BMC Verification Software Engineer Software Verification Engineer for NVIDIA's Networking OS Software Verification Group, focusing on Board Support Package (BSP) and Board Management Controller (BMC) Switch Software Development. Responsibilities include designing, developing, and maintaining APIs, tools, and libraries for HW-management drivers and BMC software verification infrastructure, as well as designing, developing, and executing test automation for release features. Requires 3+ years of experience as a Software Engineer, strong object-oriented programming skills, and experience with Linux. | — | 0 |
| Senior Software Engineer Senior Software Engineer role focused on firmware verification for NVIDIA's InfiniBand Switch and NVLink products. Responsibilities include developing verification processes, designing and implementing features in C++ and Python, and collaborating with cross-functional teams in pre and post-silicon environments. Requires strong analytical and debugging skills, with experience in embedded software development. | — | 0 |
| Senior Firmware Micro-Architect Senior Firmware Micro-Architect role at NVIDIA focusing on defining Firmware architecture for next-generation Switch products, working closely with chip design teams. Requires 8+ years of experience, C/C++/Python programming, and L2 Networking knowledge. | — | 0 |
| Software Engineer, Cloud Platforms Software Engineer role focused on designing, building, and deploying high-performance, scalable open-source cloud platforms using technologies like Kubernetes, with a focus on network and storage acceleration. Requires strong software development skills in C/Python/Golang, deep understanding of network protocols, virtualization, and containers. | — | 0 |
| Senior Process Engineer NVIDIA is seeking a Senior SoIC Assembly Engineer to lead the development and deployment of SoIC assembly tools and processes for their next-generation products. This role involves defining tool architecture, developing stable processes, ensuring quality and reliability, and collaborating with internal and external teams to scale up manufacturing. The ideal candidate will have extensive experience in SoIC and CoWoS, strong statistical analysis skills, and a background in relevant engineering or science fields. | — | 0 |
| Server Factory Planner NVIDIA is seeking a Server Factory Planner in Taiwan to manage supplier delivery, production execution, and logistics for server products. The role involves coordinating cross-functional teams, monitoring supply availability, and resolving production or material issues to meet demand planning requirements. | — | 0 |
| Senior Physical Design Engineer Senior Physical Design Engineer responsible for the physical design and implementation of GPUs and other ASICs, including floorplan, power/clock distribution, assembly, P&R, and timing closure. Requires extensive experience with VLSI physical design on advanced process nodes and proficiency with relevant CAD tools. | — | 0 |
| Senior Physical Design Engineer NVIDIA is seeking a Senior Physical Design Engineer to be responsible for the physical design and implementation of GPUs and other ASICs. This role involves establishing design methodologies, chip floorplan, power/clock distribution, assembly, P&R, and timing closure. The engineer will also craft designs for static timing analysis, power/noise analysis, and back-end verification, working with advanced process nodes (5nm, 4nm, 3nm) and various CAD tools. | — | 0 |
| CPU Design Engineer - New College Grad 2026 NVIDIA is seeking CPU Design Engineers to design world-leading CPUs for product lines including consumer graphics, self-driving cars, and artificial intelligence. The role involves micro-architecture, design, and implementation of high-performance, low-power CPUs, working closely with cross-functional teams. Responsibilities include RTL implementation, logic design optimization, and supporting hardware engineering activities. | — | 0 |
| Physical Design Backend STA Engineer NVIDIA is seeking an experienced Static Timing Analysis (STA) Physical Design Engineer for their Networking team in Israel. The role involves performing advanced STA, running Prime Time, debugging timing paths, and collaborating with cross-functional teams to ensure chip convergence and quality approval from pre-layout to signoff. The ideal candidate will have 2-3 years of STA experience and a B.Sc. in Electrical or Computer Engineering. | — | 0 |
| Chip Design Engineer NVIDIA is seeking a verification engineer for their FC Switch Silicon team to design and implement next-generation Switch Silicon chips, focusing on high-speed communication devices with high throughput and low latency. | — | 0 |
| Senior ASIC Design Engineer - XBAR IP Senior ASIC Design Engineer role focused on designing memory subsystem components for NVIDIA's Graphics Processors, impacting various product lines including AI. Responsibilities include micro-architecture, RTL development, verification, and collaboration with cross-functional teams. | — | 0 |
| Senior HPC Performance Engineer Senior HPC Performance Engineer at NVIDIA to analyze HPC applications on various systems (CPUs, GPUs) and identify optimization opportunities for compiler and application engineering teams. Requires strong programming, parallel architecture, and performance analysis skills. | — | 0 |
| System Software Engineer - GPU and SOC System Software Engineer focused on GPU and SOC kernel drivers, platform performance, power savings, and robustness for NVIDIA's production hardware. Requires strong C/C++ and OS fundamentals, with experience in system-level debugging and computer architecture. | — | 0 |
| PCB Layout Engineer - New College Graduate 2026 NVIDIA is seeking a PCB Design Engineer (New College Graduate) to perform PCB layout for various business units including GPU Desktop, Notebook, Automotive, Professional, Data Center, Deep Learning, and AI. The role involves the complete development of CAD layout, from symbol creation to detailed component placement and constraints management, with a focus on topology and signal/power integrity. Responsibilities include design releases, generating artwork files, ODB++, test reports, and documentation, while adhering to various design, regulatory, and specification requirements. | — | 0 |
| Senior HPC Performance Engineer Senior HPC Performance Engineer at NVIDIA to analyze and optimize High Performance Computing (HPC) applications on HPC servers and systems, focusing on performance characteristics and identifying optimization opportunities for compiler and application engineering teams. This involves working with applications ranging from benchmarks to large-scale distributed systems with heterogeneous compute nodes (CPUs, GPUs, many-core processors). | — | 0 |
| Senior Software Engineer, AVOS, DRIVE OS and BSP - Automotive Senior Software Engineer role focused on supporting NVIDIA's autonomous driving software stack (AVOS, DRIVE OS) for automotive customers. Requires deep understanding of BSP, operating systems, device drivers, and strong software development skills for ECU bring-up, profiling, and debugging. Involves close customer interaction and adaptation of software to customer hardware platforms. | — | 0 |
| Manager, Tegra Software Chip Manager for Tegra Software Chip at NVIDIA, responsible for leading and executing the entire silicon life cycle for various products. This role involves technical project management, coordinating software planning and execution, managing schedules, and interfacing with multiple teams and product groups. | — | 0 |
| Global Trade Compliance Systems Analyst NVIDIA is seeking a Global Trade Compliance Systems Analyst in Pune, India, to manage and automate global trade regulations using SAP GTS. The role involves daily operations, data maintenance, legal regulation updates, system audits, and reporting, with a focus on US export regulations (EAR) and product classification (ECCN/HTS). | — | 0 |
| Senior System Software Engineer, Drive AV Architect - Automotive Senior Software Engineer for NVIDIA's DRIVE OS & NDAS software stack, focusing on OEM alignment, SW architecture for driving functions (L2++), and customer support in the automotive domain. Requires strong C/C++ skills, embedded systems experience, and knowledge of ADAS/functional safety. | — | 0 |
| Customer Program Manager - Auto NVIDIA is seeking a Customer Program Manager for the Japan market to lead autonomous driving and centralized car computer programs with Tier-1 system providers and car OEMs. This role requires program management expertise with a solid engineering background to manage program execution and customer relations. | — | 0 |
| Senior Embedded Software Engineer - AV Platform Senior Embedded Software Engineer for NVIDIA's Autonomous Vehicles Platform Team. Focuses on hardware platform and sensor integration (cameras, radars, lidars), software design, development, and bring-up for next-generation autonomous vehicles. Involves debugging complex issues across software and hardware domains within environments like Hypervisor, Linux, and QNX RTOS. | — | 0 |
| Senior SRAM Circuit Design Engineer Senior SRAM Circuit Design Engineer at NVIDIA, focusing on the design, verification, and characterization of next-generation SRAM for advanced processor designs in cutting-edge technologies. Responsibilities include transistor-level circuit design, optimization for power/timing/area/yield, layout floorplanning, timing characterization, and verification using Verilog/VHDL. Requires MS in Electrical/Computer Engineering or equivalent, 6+ years of experience, and strong background in deep submicron processes, SRAM design, and ASIC flows. | — | 0 |
| Senior ASIC Physical Design Engineer, Netlisting This role is for a Senior ASIC Physical Design Engineer focused on netlisting aspects of high-frequency and low-power CPUs, GPUs, and SoCs. Responsibilities include equivalence checking, asynchronous checking, logic synthesis, and timing convergence. The role requires significant experience in ASIC design flows and EDA tools, with proficiency in scripting languages. While NVIDIA is a leader in AI, this specific role is in hardware design for computing infrastructure, not direct AI model development or deployment. | — | 0 |
| Senior Hypervisor and RTOS Engineer - Performance Senior Engineer role focused on developing and optimizing hypervisor and RTOS software for NVIDIA DRIVE platforms, emphasizing system performance, real-time capabilities, safety, and security. Requires strong C/C++ skills, OS/architecture understanding, and experience with virtualization. | — | 0 |
| Software Embedded Engineer, DOCA Seeking an embedded Software Engineer with C/C++ and Linux experience to design and develop high-performance networking solutions based on NVIDIA's Bluefield DPU hardware. The role involves close collaboration with global HW, FW, and SW teams, customer engagement, and taking ownership of key DPU software components. | — | 0 |
| STA Engineer NVIDIA is seeking an STA Engineer with 2-3 years of experience to join their Networking DFT team. The role involves executing Static Timing Analysis (STA) for high-speed communication devices, from RTL driven constraints to STA sign-off. Responsibilities include daily work on constraints, environment, model generation, and timing ECO generation. Experience with physical design flows, DFT flows, and EDA tools is preferred. | — | 0 |
| Senior Global Procurement Manager NVIDIA is seeking a Senior Global Procurement Manager to optimize their supply chain operations, focusing on materials planning for new product introductions and ensuring material readiness from concept to production. The role involves coordinating end-to-end planning, mitigating supply chain risks, developing strategies, and utilizing digital dashboards and AI solutions for analytics and decision-making. Requires a B.Sc. in Industrial Engineering or equivalent, 5+ years of experience in materials management/procurement within a semiconductor OEM environment, and strong knowledge of supply chain processes, ERP/MRP systems, and AI-driven tools. | — | 0 |
| Senior High Speed Electro Optics Engineer NVIDIA is seeking a Senior High Speed Electro Optics Engineer to develop, test, and characterize Silicon Photonics based high-speed optical communication devices for data centers. The role involves hands-on experimental lab work, including the bring-up of new switches and transceivers, and characterization of electro-optical components and subsystems. | — | 0 |
| Senior NPI Engineer NVIDIA Networking division is seeking an experienced NPI Engineer to perform DFA, PFMEA, develop and validate production processes, solve engineering issues in the production line, and establish new production lines at CM's sites. The role requires a B.Sc. in Mechanical or Industrial engineering, 5+ years of relevant experience in electro-mechanical fields, CM/vendor management, and project/production/quality management. Excellent English and interpersonal skills are necessary. | — | 0 |
| Physical Design Engineer NVIDIA is seeking a Physical Design Engineer to join their Networking Silicon engineering team. The role involves the physical build of chip blocks, focusing on power, area, and performance, and engaging in all aspects of physical chip design from RTL to GDSII. This includes synthesis, place and route, timing closure, and physical verification. The position also involves contributing to flow development and collaborating with other engineers. The ideal candidate has a degree in Electrical/Computer Engineering or equivalent, extensive knowledge of physical construction, and 0-3 years of experience. The role is not directly building AI models but is within a company heavily involved in AI and GPU technology. | — | 0 |
| Senior Customer Program Manager, AI Datacenter NVIDIA is seeking a Senior Customer Program Manager for their AI Datacenter team. This role focuses on planning and executing technical and operational programs for key partners, managing customer relationships, and driving cross-functional collaboration. The ideal candidate will have strong technical program management expertise and a solid engineering background to ensure successful outcomes in fast-paced environments. | — | 0 |
| Senior Chip Architect NVIDIA is seeking a Senior Chip Architect to define the Network Adapter chip architecture from market requirements through design and all product life cycles. This role involves collaboration with various engineering teams, research and analysis for future architectures, and crafting product design specifications. | — | 0 |
| Senior Mask Design Engineer - Hardware Senior Mask Design Engineer for high-speed mixed-signal circuit designs using Cadence tools in sub-micron CMOS technologies. Responsibilities include physical layout, cross-functional collaboration, and verification against design rules and schematics. Requires BSEE or equivalent, 7+ years of experience, deep understanding of analog circuit layout, proficiency with Cadence virtuoso, verification tools (Dracula, Hercules, Calibre), scripting languages (perl, python, skill), and DRC/LVS flows. | — | 0 |
| Senior Mask Design Engineer - Hardware Senior Mask Design Engineer for high-speed mixed-signal circuit designs using Cadence tools in sub-micron CMOS technologies. | — | 0 |
| Senior Mixed Signal Design Engineer NVIDIA is seeking a Senior Mixed Signal Design Engineer to work on next-generation High Speed IOs for GDDR/HBM Memory Interfaces. The role involves the development and implementation of high-speed interfaces and analog circuits, from concept through silicon characterization, including schematic design, layout, verification, and post-silicon debugging. | — | 0 |
| Senior ASIC Verification engineer Senior ASIC Verification Engineer for NVIDIA's next-generation GPU and SOC IPs, focusing on High-Speed Test Access Mechanism (TAM) verification for various testing stages and silicon lifecycle management. | — | 0 |
| Senior Chip Design Engineer NVIDIA is seeking an experienced Senior Chip Design Engineer to join their YU design team in Israel. The role involves defining, coding, and integrating sophisticated boot and chiplet control components for next-generation Switches, NIC, and SoC product lines. Responsibilities include micro-architecture documentation, design block coding, integration, silicon tape-out, testing, and production, with strong collaboration across design, verification, backend, and production teams. Requires 5+ years of experience, RTL implementation, familiarity with verification tools, and strong analytical and communication skills. | — | 0 |
| Senior Chip Design Verification Engineer Senior Chip Design Verification Engineer at NVIDIA, focusing on developing and verifying high-speed communication devices and networking/GPU networking chips. Requires 5+ years of ASIC verification experience. | — | 0 |
| Software Security Researcher NVIDIA is seeking a Senior Security Researcher to enhance the security posture of its networking products. The role involves offensive security research, threat modeling, defining security standards, and providing security architecture recommendations. The ideal candidate will have a strong background in security research, applied cryptography, and common attack vectors, with the ability to work independently and collaboratively. | — | 0 |
| Senior Firmware PHY Verification Engineer Senior Firmware PHY Verification Engineer for NVIDIA's FW PHY verification group, focusing on networking features and verification infrastructure for NVIDIA products. | — | 0 |
| Senior DFT Verification Engineer NVIDIA is seeking a Senior Chip Design Verification Engineer to develop and verify next-generation DFT technologies for their Switches, Nic, and SoC product lines. The role involves creating verification environments, test plans, and collaborating with cross-functional teams to ensure design correctness. | — | 0 |
| System Design Power Validation Engineer NVIDIA is seeking a Power Validation Engineer in Taipei to perform board/system power qualification and function testing for various NVIDIA platforms including Data Center, Graphics, ARM, and Autonomous Driving. The role involves DC-DC power signal measurement, power testing, debugging, compensation tuning, and system functionality testing, with collaboration with hardware design and mechanical/thermal engineers. | — | 0 |
| Senior Software Engineer – Distributed Test Platform Senior Software Engineer role focused on building and improving distributed test platforms and microservices for validating chip designs at NVIDIA. The role involves enhancing system performance, reliability, and throughput, and developing interfaces for engineering users. Requires strong software engineering skills in Python, OOP, distributed systems, and Kubernetes. | — | 0 |
| Senior I/O Specifications Architect This role focuses on architecting and developing chip requirements for industry-standard I/O interfaces (PCIe, CXL, UCIe), engaging with standards bodies, and collaborating with internal teams to define interconnect strategies for future AI and graphics systems. It requires deep knowledge of I/O technologies and system architecture. | — | 0 |