Intel
- HQ
- Santa Clara, US
- Founded
- 1968
- Size
- 120,000+
- Website
- intel.com
Intel currently has 84 active job listings related to artificial intelligence. The majority of these roles, 51%, are focused on serving infrastructure, with agents representing another significant portion at 24%. Engineering is the most frequent function for these positions. The company is actively hiring in the United States, China, and Mexico. Frequent technical tags include model serving, inference infrastructure, and agent orchestration. In the last 30 days, Intel has added 73 new AI roles, representing a 52% increase compared to the previous 30-day period.
Currently tracking 56 active AI roles, down 27% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $122k–$414k (avg $253k).
Intel currently has 59 active AI-related roles in our index. The most common open titles are: AI Software Engineering Intern (3), AI Software Engineer Intern (2), GenAI Software Solutions Engineer (2), Graduate Talent (GenAI Software Solutions Engineer) (2), AI Algorithm Engineer. Most positions are in Engineering and Research.
Intel's active AI hiring is concentrated in: serving infrastructure (49%), agents (29%), application (8%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
Intel is hiring AI talent in: United States (28 roles), China (7 roles), Mexico (6 roles), Malaysia (6 roles).
Job postings at Intel most frequently reference: model serving, inference infra, agent orchestration, rag, tool use.
In the past 30 days, Intel has posted 28 new AI-related roles. That is a -63% change versus the prior 30 days (75 → 28).
| Title | Stage | AI score |
|---|---|---|
| Substrates Supply Manager Intel is seeking a Strategic Sourcing Manager to lead and manage global supply chain operations, focusing on strategic sourcing decisions, supplier relationships, and ensuring sustainability, affordability, and resilience. The role involves developing commodity strategies, identifying and mitigating supply disruptions, negotiating contracts, and influencing supplier selection. The position requires expertise in supply line and capacity management, strategic supplier relationships in a fabless manufacturing environment, and proficiency in data analysis. A Bachelor's degree with 12+ years of experience or a Master's with 8+ years is required. | — | 0 |
| NMSi - F11x Production Line Coordinator Technician Contract (Day Shift) This role is for a Production Line Coordinator Technician at Intel's wafer fabrication facility in Rio Rancho, New Mexico. The technician will be responsible for identifying and eliminating barriers to tactical execution within the wafer fab, managing line limiters, coordinating downtime, optimizing line management through data analysis, and managing Work-In-Progress (WIP). The role also involves understanding and managing Critical Queue Time (CQT) and supporting hot box lot movement. This is a contract position with potential for conversion. |
| — |
| 0 |
| WPM- F9 Production Line Coordinator Technician Contract (Night Shift) This role is for a Production Line Coordinator Technician in a wafer fab at Intel. The primary responsibilities include identifying and eliminating barriers to tactical execution, managing production lines, optimizing WIP, and ensuring quality expectations are met through Critical Queue Time management. The role requires understanding of production systems, data analysis, and collaboration with module teams. It is a contract position with night shifts. | — | 0 |
| WPM- C4 Production Line Coordinator Technician Contract (Swing Shift) This role is a Production Line Coordinator Technician in a wafer fab at Intel. The primary responsibilities involve identifying and eliminating barriers to tactical execution, managing line limiters, optimizing line management, WIP management, and Critical Queue Time (CQT). The role requires understanding production systems, analyzing lot flow and tool performance data, and collaborating with module teams. It is a contract position with a swing shift schedule. | — | 0 |
| Strategic Account Executive – Telecommunications Strategic Account Executive for Intel's Telecommunications sector in Latin America, focusing on driving Intel's edge-to-cloud strategy and building partnerships with a major telecommunications company. Responsibilities include developing strategic plans, leading sales teams, building C-suite relationships, and exceeding revenue goals. | — | 0 |
| Fab Equipment Maintenance Commodity Manager Commodity Manager responsible for developing and managing supply chain solutions for fab equipment spares and service. This role involves developing and executing commodity strategies, negotiating contracts, managing supplier relationships, and identifying cost-saving opportunities within Intel's global supply chain. | — | 0 |
| Senior CPU Physical Design Engineer Senior CPU Physical Design Engineer at Intel, responsible for the physical design and verification of E-Core/Atom microprocessors. This role involves qualifying PDKs, standard cell libraries, and managing the RTL2GDS flow, including synthesis, floor planning, place and route, static timing analysis, power analysis, and reliability checks. The engineer will also collaborate with cross-functional teams and EDA vendors to enhance design methodologies and automate processes. | — | 0 |
| Firmware Developer Engineering Intern Internship role focused on firmware development for memory sub-systems in Intel silicon products, involving design, implementation, testing, and documentation of memory reference code and platform BIOS. | — | 0 |
| Compiler Engineer Compiler Engineer role at Intel focusing on developing and maintaining an LLVM-based compiler stack (C, C++, SYCL, Fortran) for Intel processor platforms, impacting AI and HPC. Requires strong C/C++ and LLVM experience, with collaboration in open-source communities and with hardware teams. | — | 0 |
| Finance Settlement and Supply Chain Analyst This role is for a Finance Settlement and Supply Chain Analyst within Intel's Construction Division Finance team. The analyst will be responsible for settlement analysis and reporting, cost allocation, financial controls, month-end closing, forecasting, and contract approval processes. The position requires strong analytical skills and experience in finance, preferably in construction or capital projects. | — | 0 |
| CPU Design and Verification Student Worker Student worker role focused on pre-silicon verification of CPU IP for Intel's next-generation CPU cores. Responsibilities include developing test plans, creating simulation components, debugging digital simulations, and ensuring functional coverage. Requires a Bachelor's or Master's degree in a related field with at least one year remaining, and experience in digital design, ASIC flow, computer architecture, programming languages, and hardware description languages. | — | 0 |
| Layout Design Intern Internship role focused on physical layout design of next-generation semiconductors, supporting custom IP blocks and APR partitions. Responsibilities include executing layout tasks, assessing and driving complex assignments, and collaborating with senior engineers on methodologies and automation scripts. The role offers learning opportunities in advanced VLSI layout, physical implementation flows, EDA tools, microprocessor architecture, and cross-functional collaboration. | — | 0 |
| Layout Design Intern Internship role focused on physical layout design for next-generation semiconductors, supporting custom IP blocks and APR partitions. Responsibilities include executing layout tasks, assessing and driving complex assignments, and collaborating with senior engineers on methodologies and automation scripts. The role involves learning advanced VLSI layout techniques, physical implementation flows, EDA tools, and microprocessor architecture fundamentals. | — | 0 |
| Construction Quality and Project Manager Construction Quality and Project Manager role at Intel, focusing on building semiconductor manufacturing facilities. Responsibilities include developing and implementing Quality Management Plans, leading quality investigations, managing construction projects (scope, schedule, budget), and ensuring compliance with standards. Requires a Bachelor's degree in Engineering or related field with experience in construction quality management and project management. | — | 0 |
| Platform Validation Intern This is an internship role for an Engineering Intern to support validation activities for Telecommunications products. Responsibilities include setting up platforms, executing test cases, performing triage, scripting manual test cases, and automating test plans. The candidate should be pursuing a bachelor's degree in a related STEM field and have experience with scripting languages like Python, Linux OS, system validation, and computer assembly. | — | 0 |
| RF Engineer RF Engineer at Intel responsible for designing, developing, and verifying complex radio frequency integrated circuits for IPs and SoCs. This includes transistor-level feasibility analysis, floorplan and layout definition, test bench creation, and debugging. The role involves ensuring designs meet specifications and customer needs, applying knowledge of electromagnetic and communication theory, and working with RF test equipment and wireless applications (4G, 5G, WLAN, Bluetooth, GPS). | — | 0 |
| SoC Design Engineer Intern Internship role focused on SoC integration and verification, involving RTL/logic development with System Verilog and Python, and utilizing AI tools for automation. Requires basic knowledge of digital design fundamentals and computer architecture. | — | 0 |
| SOC Physical Design Static Timing Analysis Engineer This role focuses on Static Timing Analysis (STA) for System-on-Chip (SoC) physical design at Intel. The engineer will perform timing analysis, generate and verify timing constraints, address timing violations, conduct timing rollups, and develop optimized clock networks. They will also define methodologies for timing models, establish PVT conditions, and collaborate with various teams (clocking, architecture, DFT, logic design) to ensure designs meet performance and power efficiency requirements. The role involves contributing to tools, flows, and methodologies for physical design and timing processes. | — | 0 |
| Manufacturing Operations Manager Manufacturing Operations Manager at Intel in Penang, Malaysia. This role involves leading a team of technicians to oversee operations, equipment maintenance, and repair in manufacturing facilities. Responsibilities include managing safety, quality, scheduling, conflict resolution, streamlining processes, and ensuring production schedules are met within quality and cost objectives. The manager will also focus on employee staffing, training, development, retention, and establishing long-term strategies for manufacturing capabilities. Requires a Bachelor's degree in a related field and 2-6 years of relevant experience. | — | 0 |
| Manufacturing Systems Engineer Manufacturing Systems Engineer role focused on evaluating, installing, qualifying, sustaining, and improving electronic or electromechanical systems in a manufacturing environment. The role involves integrating manufacturing processes, acting as a liaison between manufacturing and virtual factory groups, and using data analytics to resolve equipment issues. It also includes leading preventive maintenance programs, driving continuous improvement roadmaps, managing projects, and conducting gap analysis for disruptive technologies in high-volume manufacturing. | — | 0 |
| Graduate Talent (Analog Layout Engineer) Entry Level Analog Layout Engineer to support analog and mixed signal IP development, executing custom layout implementation and physical verification tasks for analog blocks used in SoC and IP designs. | — | 0 |
| IP Design Verification Engineer This role focuses on the functional verification of IP designs for Intel's advanced IP technologies. The engineer will develop and execute verification plans, test benches, and simulation models to ensure designs meet specifications and identify/debug issues in the presilicon environment. Collaboration with architects and RTL developers is key, as is maintaining verification infrastructure. The role requires strong coding skills in Perl or Python, proficiency in SystemVerilog and UVM/OVM, and experience with AMBA protocols. | — | 0 |
| Project Controls Engineer Project Controls Engineer at Intel Foundry Construction Sourcing responsible for cost/estimating/schedule controls for semiconductor manufacturing factory projects. This role involves cost reporting, forecast development, leading estimate development, driving process improvements, financial updates, cost reduction strategies, and partnering with procurement on commercial activities. Requires experience in estimation, cost control, capital, OpEx/Spending, and FPnA. | — | 0 |
| Advanced Packaging Flagship Curriculum Internship Program Internship in semiconductor advanced packaging, focusing on process improvements, materials characterization, experimental validation, and computational analysis. The role involves literature surveys, DOE, lab experiments, technical documentation, and supporting R&D aligned with Intel's business goals. | — | 0 |
| Supply Chain Material Program Manager This role is for a Supply Chain Material Program Manager at Intel, focusing on applying supply chain principles to NPIs, cost savings projects, and process standardization. It involves managing cross-functional projects, stakeholder communication, and ensuring compliance within the supply chain operations. | — | 0 |
| Business HR Partner Business HR Partner at Intel in Tokyo, Japan, responsible for partnering with business leaders on HR initiatives, talent management, employee relations, and workforce planning. Requires at least 10 years of HR experience, proficiency in HR programs, employee relations, employment law, and data analysis, with specific experience in Japan labor laws and regulations. | — | 0 |
| Data Architect This role is for a Data Architect within Intel's Corporate Planning Group Data and Analytics team. The primary focus is on driving insights and analytics through data analysis, requirement gathering, report development, data quality, governance, and validation. The role involves working with data used in various business functions like demand planning, supply planning, sales, manufacturing, and finance, and supporting data architecture strategy. While the role mentions using AI coding assistants as a preferred qualification, the core responsibilities are centered around traditional data architecture, BI, and reporting, not the direct development or deployment of AI/ML models. | — | 0 |
| Quality and Reliability R&D Lab Engineer Quality and Reliability R&D Lab Engineer at Intel Foundry, focusing on developing and managing lab tools for reliability testing and characterization of semiconductor devices. The role involves technical problem-solving, continuous improvement, capability development for new tools and methodologies, cross-functional collaboration, and documentation for advanced process technologies. | — | 0 |
| Software Simulation Intern This role is for a Software Simulation Intern at Intel, focusing on developing and improving system simulators for Intel's product firmware and software. The intern will be involved in coding, testing, debugging, analyzing specifications, and collaborating with hardware and software engineers to deliver next-generation simulation platforms. The role requires programming skills in Python, C/C++, and potentially other languages, with a background in computer architecture being a plus. While AI solutions are mentioned as a helpful tool, the core of the role is in software simulation and system development, not direct AI/ML model development. | — | 0 |
| Power Delivery Validation Intern Intern position for an Electronics or Electrical Engineering student to work on power delivery and integrity validation of Intel's next-generation CPUs. Responsibilities include validation, characterization, optimization of integrated voltage regulators and power delivery networks, developing automation software, and using lab equipment. Requires Python or C++ programming skills and knowledge of power electronics and control systems. | — | 0 |
| Wet Etch Cleans Technical Manager Technical Manager for Wet Etch Cleans in Intel's Logic Technology Development, focusing on advanced logic nodes and High Volume Manufacturing. This role involves hands-on process development, R&D to HVM deployment, and technical leadership. | — | 0 |
| Post-silicon Validation and Debug Engineer This role focuses on post-silicon validation and debug engineering for Intel's System-on-Chip (SoC) products, ensuring seamless performance by working at the intersection of hardware, firmware, and software. Responsibilities include performing low-level debug, developing validation plans, conducting root cause analysis, and collaborating with cross-functional teams to deliver high-quality products. | — | 0 |
| GPU Software Development Engineer Develop and validate system software for Intel GPUs, including firmware, device drivers, and APIs. Optimize tools and infrastructure for GPU performance, adapt driver functionality to hardware changes, and debug Linux kernel issues. Contribute to open-source communities by upstreaming patches and coordinating driver enhancements. | — | 0 |
| RF Engineer Designs, develops, and verifies complex radio frequency integrated circuits and creates verification test plans for RF validation. This role involves transistor level feasibility analysis, floorplan and layout definition, test bench creation, and debugging designs to meet specifications. It requires an understanding of electromagnetic theory, communication theory, RF test equipment, RF circuit design, RF system analysis, and RF measurements. The role also involves reviewing system specifications and design plans for compliance. | — | 0 |
| Substrate Packaging Research and Development Engineer This role focuses on optimizing and managing high-volume manufacturing equipment and processes for semiconductor production, ensuring safety, quality, and cost goals are met. Responsibilities include conducting tests, recommending modifications, managing maintenance, leading continuous improvement projects, collaborating with suppliers, developing excursion prevention systems, and handling factory ramps and technology transfers. | — | 0 |
| MEOS - Module Engineer On Shift Module Engineer On Shift (MEOS) responsible for daily engineering experiments, production issue response, tool and process expertise, and collaboration with manufacturing teams in semiconductor assembly and test technology development. Requires strong problem-solving and collaboration skills. | — | 0 |
| Memory Validation Intern Intern position contributing to the functional, power, performance, and memory validation of Intel silicon products. Responsibilities include debugging, data analysis, validation coverage assessment, test automation, and developing validation infrastructure. Requires current pursuit of a relevant Bachelor's or Master's degree and 3+ months of experience in signal integrity electronic circuit analysis and data analysis techniques. | — | 0 |
| Staff OS Kernel Engineer Software developer role focused on Linux kernel integration, automation, issue analysis, and triage for Intel platforms. Involves maintaining, testing, debugging, optimizing, and securing OS kernel and system software, including device drivers and virtualization. | — | 0 |
| Facilities Power Distribution Electrical Engineer Electrical Engineer responsible for the operation, maintenance, and upgrades of Intel's site electrical power distribution systems, including troubleshooting, studies (breaker coordination, arc flash), load tracking, and partnering with utilities and project teams. Requires a Bachelor's degree in Electrical Engineering with 3+ years of experience in medium voltage systems. | — | 0 |
| Front End Long Range Capacity Planning Sr. Analyst (Intel Foundry) This role is for a Sr. Analyst on the Foundry Central LRP and Strategic Capacity Planning team, focusing on shaping Intel's long-term strategies by generating five-year PNL forecasts and NPV valuations. Responsibilities include financial valuation, PNL and cash flow optimization, scenario planning, performance monitoring, and supporting ad-hoc LRP requests. The role requires robust financial analysis, modeling, and data manipulation skills, preferably with Power BI/Power Query, strong communication, strategic thinking, and project management abilities. | — | 0 |
| Experienced DFT ATPG Engineer Experienced DFT ATPG Engineer responsible for developing logic design, RTL coding, simulation, DFT timing closure support, and test content generation for various DFx content. The role involves participating in architecture and microarchitecture definition, developing HVM content for ATE, integrating DFT blocks, and collaborating with post-silicon and manufacturing teams. Requires BS/MS in EE/CE or related STEM field with 1-3+ years of DFT experience and familiarity with tools like Siemens Tessent, Spyglass, Fusion compiler, and/or VCS, as well as experience with scan insertion, debug, and post-silicon debug. | — | 0 |
| Experienced DFT ATPG Engineer Experienced DFT ATPG Engineer responsible for developing logic design, RTL coding, simulation, DFT timing closure support, and test content generation for various DFx content. The role involves participating in architecture and microarchitecture definition, developing HVM content for ATE, integrating DFT blocks, and collaborating with post-silicon and manufacturing teams. Requires BS/MS in EE/CE or related STEM field with 1-3+ years of DFT experience and familiarity with tools like Siemens Tessent, Spyglass, Fusion compiler, and/or VCS, as well as experience with scan insertion, debug, and post-silicon debug. | — | 0 |
| Logistics Operations Manager Logistics Operations Manager at Intel in Malaysia, responsible for managing logistics operations, supplier governance, performance metrics, process improvement, and ensuring compliance. The role involves leveraging analytical and advanced technology skills, including AI, to optimize logistics solutions. | — | 0 |
| Firmware Development Engineer Firmware Development Engineer at Intel, focusing on designing, developing, and maintaining embedded firmware for silicon, SoC subsystems, and controllers. Responsibilities include end-to-end feature ownership, low-level driver development, RTOS integration, pre-silicon to post-silicon debug, and collaboration with cross-functional teams. Requires strong C/C++, embedded systems fundamentals, and experience with pre-silicon workflows and debugging tools. | — | 0 |
| Compiler Engineer Intel is seeking a Compiler Engineer to design, develop, test, and enhance software tools for domain-specific programming languages like P4. The role involves collaborating with hardware design teams, optimizing code generation for ASIC network packet processing, and participating in language standards groups. Requires strong C/C++ skills, deep understanding of compiler internals, and expertise in frameworks like GCC or LLVM. | — | 0 |
| CPU Structural Design – Technology and Path finding This role focuses on the physical design and process technology for Intel's High Performance Processor (P-Core) CPUs. Responsibilities include synthesis, place and route, timing analysis, power optimization, and developing physical design methodologies using industry EDA tools. | — | 0 |
| HR Contact Center Specialist This role is for an HR Contact Center Specialist at Intel in Malaysia. The primary responsibility is to serve as the first point of contact for global employee HR inquiries, resolving questions and issues related to the HR life cycle through various communication channels. The role involves researching HR guidelines, documenting interactions, escalating complex issues, and identifying opportunities for process improvement. It requires strong customer service, critical thinking, and communication skills, with experience in HR Shared Services or HR Administration. | — | 0 |
| CPU Circuit Design Engineer CPU Circuit Design Engineer role at Intel, focusing on designing next-generation CPU cores and SoCs. Responsibilities include detailed circuit analysis, design implementation, and optimization at the transistor level, meeting power, performance, and area targets. Requires BSc/MSc in EE/CE and at least 2 years of VLSI/circuit design experience. | — | 0 |
| SoftIP Verification Engineer This role is for an IP Design Verification Engineer at Intel, focusing on ensuring the quality and reliability of Intel's IP designs. Responsibilities include developing and executing verification plans, creating test benches and cases, performing simulations, debugging issues, and collaborating with cross-functional teams. The role requires proficiency in System Verilog and Python, knowledge of IP validation tools and methodologies, and experience in test planning and hardware simulation. | — | 0 |
| Core and Patch Verification Engineer This role focuses on the functional logic verification of an integrated SoC, ensuring it meets specifications. Responsibilities include defining and developing verification plans, test benches, and environments, executing these plans using emulation and simulation models, debugging issues in the presilicon environment, and collaborating with various design teams. The role also involves incorporating security activities into test plans and maintaining the verification infrastructure. Experience with Pre-Si validation, System Verilog OVM/UVM, and scripting languages like Python is required. | — | 0 |