Intel
Building- HQ
- Santa Clara, US
- Founded
- 1968
- Size
- 120,000+
- Website
- intel.com
Currently tracking 64 active AI roles, up 216% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $122k–$414k (avg $253k).
Hiring
64 / 66
Momentum (4w)
↑+356 +216%
521 opens last 4w · 165 prior 4w
Salary range · avg $253k
$122k–$414k
USD · disclosed roles only
Tracked since
Feb 3
last role today
Hiring velocityscroll left for older weeks
Jobs (798)
| Title | Stage | AI score |
|---|---|---|
| Firmware Development Engineer Intern Internship role focused on firmware development for embedded systems like BIOS, microcontrollers, and memory systems, involving design, development, validation, and debugging. Requires proficiency in C/C++/Python and foundational knowledge of embedded software and computer architecture. | — | 0 |
| Senior SoC Electrical Validation and Tuning Engineer This role focuses on electrical validation and tuning of System-on-Chip (SoC) components, specifically IO interfaces. The engineer will define validation strategies, ensure analog performance and signal integrity, conduct research in mixed-signal architectures, analyze customer returns for yield improvement, and perform root cause analysis for electrical issues. The position requires expertise in hardware validation, debug, signal delivery, and Python programming for validation tasks. | — | 0 |
| Module Engineering Manager Module Engineering Manager at Intel in Malaysia, responsible for leading a team of engineers to transfer new products to factory, support high volume manufacturing, and drive continuous improvement in safety, quality, output, and cost. Requires people leadership and technical understanding in semiconductor assembly or manufacturing operations. | — | 0 |
| Accountant Accountant role at Intel focusing on financial preparation, analysis, and validation, ensuring compliance with global financial standards (IFRS, US GAAP) and internal policies. Responsibilities include managing financial records, interacting with auditors, validating accounts, developing finance policies, and supporting financial compliance for legal entities. Requires proficiency in accounting principles, financial systems (SAP S4, SQL, Power BI), and SOX compliance. | — | 0 |
| SoC Logic Design Engineer Logic Design Engineer for future generation Intel SOCs, focusing on RTL coding, simulation, and integration of IP blocks. Responsibilities include meeting power, performance, area, and timing goals, quality checks, and collaborating with verification and physical design teams. | — | 0 |
| Analytical Chemistry Lab Technician Analytical Chemistry Lab Technician at Intel, responsible for sample preparation, analysis using advanced techniques (ICPMS, LCMS, IC, Assay, GCMS), and laboratory equipment maintenance in support of materials analysis for semiconductor manufacturing. | — | 0 |
| Sr. Infrastructure Engineer – Linux OS This role focuses on deploying, configuring, and managing Linux OS environments, specifically Red Hat Enterprise Linux (RHEL), along with various layered applications, middleware, and security tools. It requires expertise in automation scripting (Bash, Python) for streamlining tasks, maintaining applications, and improving system reliability. The position also involves security best practices, performance monitoring, and troubleshooting complex OS and application-level issues within a government programs context, requiring U.S. citizenship and the ability to obtain a TS Security Clearance. | — | 0 |
| Software Application Development Engineer Grade Software Application Development Engineer at Intel Foundry Automation (IFA) NPI Systems team. Develops full-stack software solutions for manufacturing automation, including new product introduction workflows, execution readiness, build logistics, and DOE planning. Responsibilities cover the full software project lifecycle, from requirements analysis to testing and support. Collaborates with technology development teams and factory engineers. | — | 0 |
| Package Assembly Low Yield Analysis Engineer Intel is seeking a Package Assembly Low Yield Analysis Engineer to support back-end package assembly and wafer level assembly sort and test fails. This role involves technical functions such as design, test, checkout, modifications, and characterization of assembly technologies. The engineer will conduct various analyses and engineering tests to provide root cause determination of in-line electrical failures and perform defect and/or process characterization. Responsibilities include working across team boundaries, project management, developing failure analysis techniques, and providing consultation on packaging and assembly problems. Requires a Master's degree in a relevant engineering field and experience with characterization or fault isolation tools. | — | 0 |
| Power-Perf and Over Clocking Industry Immersion Intern Internship role focused on power-performance and overclocking within client platform development at Intel. Requires enrollment in a relevant degree program, basic knowledge of product development, programming skills (Python, C++, Batch), and understanding of electrical engineering fundamentals and computer hardware architecture. Preferred qualifications include statistical data analysis, data visualization, and understanding of overclocking and performance testing. | — | 0 |
| IT Support Specialist This role provides advanced operational and technical support for Intel's Microsoft Teams, Teams Rooms (MTR), Audio/Visual (AV), and Telephony services in a global, 24x7 enterprise environment. It acts as an escalation point for complex incidents, leads problem management, and proactively maintains service health. Responsibilities include supporting collaboration services, voice systems, AV infrastructure, and participating in a 24x7 on-call rotation. | — | 0 |
| Electrical Validation Engineering Grad Intern Electrical Validation Engineering Graduate Intern at Intel, focusing on pre-silicon and post-silicon validation of server datacenter products, specifically memory I/O technologies. Responsibilities include developing test content, performing silicon debug and characterization, and collaborating with cross-functional teams. Requires a Bachelor's or Master's in Electrical/Computer Engineering and experience with hardware architecture, programming languages (Python, C, C++), and high-speed circuit testing. | — | 0 |
| DTCO Systems Analysis Engineer This role focuses on data analysis within Intel's Central Engineering Group, transforming design PPA data into actionable insights to improve foundry technology solutions. Responsibilities include data extraction, processing, pattern identification, and developing analytics tools. The role requires a Bachelor's degree in a STEM field with experience in data analysis tools like SQL or Python, and data validation. | — | 0 |
| IT Support Specialist The IT Support Specialist functions as a senior support engineer, team lead, and subject matter expert (SME) supporting Intel's Microsoft Teams, Teams Rooms (MTR), Audio/Visual, and Telephony services. This role provides Level 4 (L4) operational and escalation support while assisting with shift-based leadership in a global 24x7 support environment. In addition to hands-on technical support, the role supports day-to-day shift execution, assists in coordinating incident response during high-impact events, and helps ensure service readiness and SLA adherence. This position serves as an escalation resource for complex issues, provides technical guidance to support specialists, and works closely with engineering, network, security, vendors, and carriers to maintain service stability and reliability. The role supports business-critical meetings and enterprise collaboration services, with a focus on incident resolution, problem analysis, and proactive operational improvements, while escalating broader systemic risks and decisions through established leadership channels. | — | 0 |
| EDA Tools Software Engineer Designs, develops, tests, and debugs software tools, flows, and methodologies used in design automation for hardware products, process design, or manufacturing. Requires in-depth knowledge of semiconductor physics, process technology, design rules, and EDA tools for EM, IR drop, and ESD. Scripting skills in languages like SKILL, Python, PERL, or TCL are essential. Experience applying AI/ML techniques for analog layout generation and geometry/graph-based problems is a plus. | — | 0 |
| Network Security Engineer This role focuses on network security engineering, involving the determination and deployment of robust network services, management of technical projects, research into new technologies, and troubleshooting complex network issues. It requires a strong background in network operations and engineering with specific experience in Cisco, Extreme, Arista, and F5 components, as well as network security concepts. The role also involves scripting and database skills as preferred qualifications. | — | 0 |
| GPU Design Verification Engineer This role focuses on the functional verification of graphics logic components (3D graphics, media, display) for GPUs. Responsibilities include defining and developing verification plans, test benches, and architecture, executing verification plans, running simulations, debugging issues, and collaborating with architects and developers. The role requires strong programming skills in System Verilog, OVM, and UVM, and experience in ASIC, CPU, or GPU verification. | — | 0 |
| Dell Sales Account Manager Sales Account Manager for Intel, responsible for the relationship between Intel CCG and Dell CSG, driving business results and PC design wins. Requires technical knowledge, business acumen, and sales skills. | — | 0 |
| Packaging Module Process Development Engineer Develops and optimizes semiconductor packaging processes, focusing on manufacturing efficiency, quality, reliability, and cost. Applies statistical methods like DOE and SPC, and establishes material and equipment specifications. The role involves technical innovation, problem-solving, and continuous improvement in a manufacturing environment. | — | 0 |
| Experienced IP Logic Design Engineer Experienced IP Logic Design Engineer responsible for designing, optimizing, and validating IP blocks for SoC integration at Intel in Costa Rica. This role involves RTL coding, simulation, architecture definition, and ensuring power, performance, area, and timing goals are met. Collaboration with SoC customers and verification teams is key for high-quality IP delivery. | — | 0 |
| Manufacturing Equipment Technician (MTE) - Night Shift 6 This role is for a Manufacturing Equipment Technician (MTE) in Intel's Advanced Packaging Technology Development team. The technician will perform electrical and mechanical troubleshooting, repair, and maintenance on semiconductor manufacturing equipment, focusing on wet chemistry, plating, and dry high-vacuum toolsets. Responsibilities include documentation, collaboration with engineering for continuous improvement, and contributing to yield and uptime initiatives. The role requires strong problem-solving skills, ability to work in a cleanroom environment, and flexibility in a fast-paced manufacturing setting. | — | 0 |
| TEM Technician This role involves technical functions in an electron microscopy lab supporting advanced technology development, process/product development, qualification, and failure analysis. Responsibilities include preparing ultra-thin specimens and performing TEM analysis using dual beam FIB and TEM tools. The role requires technical skills, problem-solving abilities, and continuous skill upgrading. | — | 0 |
| TEM Technician This role involves technical functions in an electron microscopy lab supporting advanced technology development, process/product development, qualification, and failure analysis. Responsibilities include preparing ultra-thin specimens and performing TEM analysis using dual beam FIB and TEM tools. The role requires technical skills in sample preparation and imaging, with an emphasis on continuous skill upgrading and problem-solving. | — | 0 |
| TEM Technician This role involves technical functions in an electron microscopy lab, supporting advanced technology development, process/product development, and failure analysis. Responsibilities include preparing ultra-thin specimens and performing TEM analysis using FIB/SEM tools. The role requires technical skills in sample preparation and imaging, with an emphasis on continuous learning and problem-solving. | — | 0 |
| Packaging Module Development Engineer The Packaging Module Development Engineer at Intel will provide mechanical modeling support for semiconductor packaging technologies, focusing on R&D projects and issue resolution. This role involves theoretical analysis and numerical modeling using FEA software to advance technology and foundry capabilities. | — | 0 |
| Middleware Development Engineer (Intern) Intern role focused on developing middleware software solutions that connect applications and hardware, enhancing communication, data management, and system efficiency on Intel's platforms. Responsibilities include API design, protocol implementation, performance tuning, debugging, and applying Agile methodologies. | — | 0 |
| Analog Design Architect Analog Circuit Design Engineer role at Intel, focusing on designing and developing cutting-edge analog circuits for advanced process nodes. The role involves creating high-performance analog and mixed-signal IPs, optimizing circuits for various objectives, and collaborating with cross-functional teams. Requires expertise in high-speed IO circuits and analog circuit design, with a strong foundation in CMOS design principles. | — | 0 |
| Window infrastructure & DevOps Student Student role focused on IT operations and DevOps, involving ticket resolution, scripting (PowerShell), automation tool development, server management, and CI/CD processes within an enterprise environment. The role progresses from operational tasks to development projects. | — | 0 |
| Foundry Site Quality Program Manager Program Manager for Foundry Quality and Reliability Team, focusing on measuring and reporting Fab quality, implementing improvement programs, supporting Quality Meetings and Teams, acting as Site Auditor for ISO9K/IATF Cert and internal audits, driving proactive quality culture and improving quality systems in semiconductor manufacturing. Role involves leading initiatives aligned with Intel's Foundry Quality Pyramid, identifying risks, preventing excursions, implementing fixes, supporting QMS elements for new technology certification, and continuous improvement of quality metrics and systems. | — | 0 |
| Physical Design Timing Engineer This role focuses on the physical design and timing analysis of System-on-Chips (SoCs), ensuring optimal performance, power, and functionality. Responsibilities include timing analysis, constraint generation, violation fixing, clock network design, and methodology development for timing models. The role collaborates with various teams to deliver efficient chip integration and validate clock network guidelines. | — | 0 |
| Process and Equipment Module Engineer (DIE Attach or Thermal Compress Bonding) Process and Equipment Module Engineer at Intel in Malaysia, focusing on high-volume manufacturing equipment and processes for integrated circuits, including die attach and thermal compress bonding. Responsibilities include testing, modification, continuous improvement, and technology transfer. | — | 0 |
| Logic Design Engineer Logic Design Engineer at Intel in Bangalore, India. This role involves contributing to technological advancements, solving complex problems, and collaborating with cross-functional teams. Responsibilities include applying technical skills to projects, analyzing and troubleshooting issues, conducting research, and preparing reports. Requires a Bachelor's degree in a technical field or equivalent experience, with proficiency in relevant software, tools, or systems. Preferred qualifications include a Master's degree, experience in collaborative projects, and strong communication skills. | — | 0 |
| CPU Circuit Design Lead Lead the design analysis and methodologies for memory blocks and data path subsystems in Intel's latest CPUs, focusing on high frequency (over 5GHz) and low-power digital designs. | — | 0 |
| GPU Software Engineer Intern Intern role contributing to the design, development, and validation of system software across various layers of the software stack, including firmware, drivers, operating systems, and middleware, to enable Intel platforms and technologies. Focuses on cross-stack software optimization and reference platform development. | — | 0 |
| Capital Accounting Analyst The Capital Accounting Analyst supports the execution of critical Close and Reporting activities for Intel's Property, Plant, and Equipment (PPE) accounting, contributing to the accuracy and integrity of Intel's financial statements. This role serves as a key point of contact for multiple partners, including Internal and External Audit, Consolidations, SOX, and Capital Finance. | — | 0 |
| Mixed Signal Design Verification Engineer Mixed Signal Design Verification Engineer responsible for ensuring the functionality and performance of mixed signal logic components using System Verilog, UVM, and Verilog, developing test plans and environments, and debugging issues in the presilicon environment. | — | 0 |
| Security Software development Engineer Intel is seeking a Security Software Development Engineer to validate TDX (Trusted Domain Extensions), a technology for confidential computing and virtualization. The role involves building frameworks and automation for validation across firmware, OS, drivers, middleware, SDKs, and applications. Requires 3-5 years of software/hardware validation experience and C/C++ coding proficiency. Preferred knowledge includes OS/virtualization pre/post-silicon validation and Specman/System Verilog. | — | 0 |
| EHS Engineer This role is for an EHS Engineer focused on industrial hygiene and safety programs within semiconductor manufacturing. Responsibilities include risk assessments, exposure monitoring, safety reviews for equipment installation, contractor safety management, incident investigations, and EHS audits. The role requires foundational knowledge of occupational health and safety principles, with experience in brownfield projects and semiconductor industries being advantageous. | — | 0 |
| Design Verification Engineer Design Verification Engineer at Intel responsible for functional verification of IP logic, developing verification plans, test benches, and simulation environments. The role involves executing verification plans, debugging issues, collaborating with design teams, and maintaining verification infrastructure. | — | 0 |
| CPU Validation Engineer This role is for a CPU Validation Engineer at Intel, focusing on post-silicon validation of next-generation processor designs. Responsibilities include validating logic and architectural features, developing test plans and content, practicing software development and QA processes, driving performance improvements, and debugging silicon bugs. The role requires a Bachelor's degree in a related field, proficiency in Python and scripting, and strong knowledge of CPU architecture and validation processes. | — | 0 |
| Mixed Signal Logic Design Engineer Develops logic design, RTL coding, and simulation for mixed signal and/or high-speed IPs for integration in full chip designs. Participates in architecture and microarchitecture definition, applies strategies for mixed signal designs including analog behavior modeling and circuit simulation, writes RTL, and optimizes mixed signal logic to meet power, performance, area, and timing goals. Reviews verification plans, implements corrective measures for failing RTL tests, and supports SoC customers for IP block integration. | — | 0 |
| Senior Applications and Solutions Engineer - Foundry Services Senior Applications and Solutions Engineer for Intel Foundry Services, focusing on technical support for customers using Intel's semiconductor process and packaging technologies, with a specialization in complex multi-voltage domain ASIC design implementation and verification. The role involves customer guidance, quality improvements in design kits, and performing ASIC design services. | — | 0 |
| IT Support Specialist IT Support Specialist serving as a technical team lead and subject matter expert for Microsoft Teams, Teams Rooms (MTR), Audio/Visual, and Telephony services. Provides Level 4 operational and escalation support, leads shift-based operations in a global 24x7 environment, and acts as the primary escalation point for complex issues. Supports business critical meetings and enterprise collaboration services with an emphasis on proactive issue prevention, problem management, and operational excellence. | — | 0 |
| Memory Systems Firmware Development Engineer Develops firmware for memory subsystems, focusing on initialization, training, and calibration algorithms, ensuring adherence to JEDEC standards and memory design specifications. Collaborates with hardware and RTL design teams. | — | 0 |
| Power Integrity Industry Immersion Intern Internship role focused on power integrity challenges in client platform development, requiring electrical engineering fundamentals and experience with simulation tools. | — | 0 |
| Formal Verification Engineer - CPU Core Seeking a Formal Verification Engineer to join the US CPU verification team, focusing on the development of next-generation CPUs for AI applications. Responsibilities include writing verification test plans, developing pre-silicon verification collateral, technical ownership of formal verification for microarchitecture blocks, ROI analysis, and debugging. | — | 0 |
| Learning and Development Consultant Seeking a Learning and Development Specialist to enhance manufacturing workforce training, focusing on skill gap assessment, training design, facilitation, and continuous improvement within Intel Foundry. | — | 0 |
| Senior CPU Core Physical Design Engineer This role is for a Senior CPU Physical Design Engineer responsible for the physical design implementation of custom CPU designs from RTL to GDS, including synthesis, place and route, clock tree synthesis, static timing analysis, and power/clock distribution. The engineer will also conduct verification and signoff, analyze results to improve microarchitectures, and work with EDA vendors to enhance tool capabilities. The role is critical to the development of next-generation CPUs designed to power the AI revolution. | — | 0 |
| CPU Core Physical Design Engineer This role is for a CPU Physical Design Engineer responsible for the physical design implementation of custom CPU designs from RTL to GDS, including synthesis, place and route, static timing analysis, and power/clock distribution. The engineer will also perform verification and signoff, analyze results to improve microarchitectures, and work with EDA vendors to enhance tool capabilities. The role requires expertise in VLSI circuit design, static timing analysis, and low power design, with a focus on developing CPUs for the AI revolution. | — | 0 |
| Wafer Assembly TD Strategic Program Manager This role focuses on leading the design and development of advanced manufacturing processes for Intel's wafer assembly technology development. It involves building strategies for space, factory positioning, and capacity, developing manufacturability requirements, conducting simulations, partnering with suppliers, and identifying modifications to improve production efficiency. The role also includes monitoring industrial trends, creating technical documentation, and performing pathfinding activities for future device designs. | — | 0 |