Internship role focused on SoC integration and verification, involving RTL/logic development with System Verilog and Python, and utilizing AI tools for automation. Requires basic knowledge of digital design fundamentals and computer architecture.

This role focuses on Static Timing Analysis (STA) for System-on-Chip (SoC) physical design at Intel. The engineer will perform timing analysis, generate and verify timing constraints, address timing violations, conduct timing rollups, and develop optimized clock networks. They will also define methodologies for timing models, establish PVT conditions, and collaborate with various teams (clocking, architecture, DFT, logic design) to ensure designs meet performance and power efficiency requirements. The role involves contributing to tools, flows, and methodologies for physical design and timing processes.

Manufacturing Operations Manager at Intel in Penang, Malaysia. This role involves leading a team of technicians to oversee operations, equipment maintenance, and repair in manufacturing facilities. Responsibilities include managing safety, quality, scheduling, conflict resolution, streamlining processes, and ensuring production schedules are met within quality and cost objectives. The manager will also focus on employee staffing, training, development, retention, and establishing long-term strategies for manufacturing capabilities. Requires a Bachelor's degree in a related field and 2-6 years of relevant experience.

Manufacturing Systems Engineer role focused on evaluating, installing, qualifying, sustaining, and improving electronic or electromechanical systems in a manufacturing environment. The role involves integrating manufacturing processes, acting as a liaison between manufacturing and virtual factory groups, and using data analytics to resolve equipment issues. It also includes leading preventive maintenance programs, driving continuous improvement roadmaps, managing projects, and conducting gap analysis for disruptive technologies in high-volume manufacturing.

Entry Level Analog Layout Engineer to support analog and mixed signal IP development, executing custom layout implementation and physical verification tasks for analog blocks used in SoC and IP designs.

This role focuses on the functional verification of IP designs for Intel's advanced IP technologies. The engineer will develop and execute verification plans, test benches, and simulation models to ensure designs meet specifications and identify/debug issues in the presilicon environment. Collaboration with architects and RTL developers is key, as is maintaining verification infrastructure. The role requires strong coding skills in Perl or Python, proficiency in SystemVerilog and UVM/OVM, and experience with AMBA protocols.

Project Controls Engineer at Intel Foundry Construction Sourcing responsible for cost/estimating/schedule controls for semiconductor manufacturing factory projects. This role involves cost reporting, forecast development, leading estimate development, driving process improvements, financial updates, cost reduction strategies, and partnering with procurement on commercial activities. Requires experience in estimation, cost control, capital, OpEx/Spending, and FPnA.

Quality and Reliability R&D Lab Engineer at Intel Foundry, focusing on developing and managing lab tools for reliability testing and characterization of semiconductor devices. The role involves technical problem-solving, continuous improvement, capability development for new tools and methodologies, cross-functional collaboration, and documentation for advanced process technologies.

This role is for a Software Simulation Intern at Intel, focusing on developing and improving system simulators for Intel's product firmware and software. The intern will be involved in coding, testing, debugging, analyzing specifications, and collaborating with hardware and software engineers to deliver next-generation simulation platforms. The role requires programming skills in Python, C/C++, and potentially other languages, with a background in computer architecture being a plus. While AI solutions are mentioned as a helpful tool, the core of the role is in software simulation and system development, not direct AI/ML model development.

Intern position for an Electronics or Electrical Engineering student to work on power delivery and integrity validation of Intel's next-generation CPUs. Responsibilities include validation, characterization, optimization of integrated voltage regulators and power delivery networks, developing automation software, and using lab equipment. Requires Python or C++ programming skills and knowledge of power electronics and control systems.

Technical Manager for Wet Etch Cleans in Intel's Logic Technology Development, focusing on advanced logic nodes and High Volume Manufacturing. This role involves hands-on process development, R&D to HVM deployment, and technical leadership.

Develop and validate system software for Intel GPUs, including firmware, device drivers, and APIs. Optimize tools and infrastructure for GPU performance, adapt driver functionality to hardware changes, and debug Linux kernel issues. Contribute to open-source communities by upstreaming patches and coordinating driver enhancements.

This role focuses on optimizing and managing high-volume manufacturing equipment and processes for semiconductor production, ensuring safety, quality, and cost goals are met. Responsibilities include conducting tests, recommending modifications, managing maintenance, leading continuous improvement projects, collaborating with suppliers, developing excursion prevention systems, and handling factory ramps and technology transfers.

Module Engineer On Shift (MEOS) responsible for daily engineering experiments, production issue response, tool and process expertise, and collaboration with manufacturing teams in semiconductor assembly and test technology development. Requires strong problem-solving and collaboration skills.

Intern position contributing to the functional, power, performance, and memory validation of Intel silicon products. Responsibilities include debugging, data analysis, validation coverage assessment, test automation, and developing validation infrastructure. Requires current pursuit of a relevant Bachelor's or Master's degree and 3+ months of experience in signal integrity electronic circuit analysis and data analysis techniques.

Software developer role focused on Linux kernel integration, automation, issue analysis, and triage for Intel platforms. Involves maintaining, testing, debugging, optimizing, and securing OS kernel and system software, including device drivers and virtualization.

Electrical Engineer responsible for the operation, maintenance, and upgrades of Intel's site electrical power distribution systems, including troubleshooting, studies (breaker coordination, arc flash), load tracking, and partnering with utilities and project teams. Requires a Bachelor's degree in Electrical Engineering with 3+ years of experience in medium voltage systems.

Experienced DFT ATPG Engineer responsible for developing logic design, RTL coding, simulation, DFT timing closure support, and test content generation for various DFx content. The role involves participating in architecture and microarchitecture definition, developing HVM content for ATE, integrating DFT blocks, and collaborating with post-silicon and manufacturing teams. Requires BS/MS in EE/CE or related STEM field with 1-3+ years of DFT experience and familiarity with tools like Siemens Tessent, Spyglass, Fusion compiler, and/or VCS, as well as experience with scan insertion, debug, and post-silicon debug.

Experienced DFT ATPG Engineer responsible for developing logic design, RTL coding, simulation, DFT timing closure support, and test content generation for various DFx content. The role involves participating in architecture and microarchitecture definition, developing HVM content for ATE, integrating DFT blocks, and collaborating with post-silicon and manufacturing teams. Requires BS/MS in EE/CE or related STEM field with 1-3+ years of DFT experience and familiarity with tools like Siemens Tessent, Spyglass, Fusion compiler, and/or VCS, as well as experience with scan insertion, debug, and post-silicon debug.

Logistics Operations Manager at Intel in Malaysia, responsible for managing logistics operations, supplier governance, performance metrics, process improvement, and ensuring compliance. The role involves leveraging analytical and advanced technology skills, including AI, to optimize logistics solutions.

Firmware Development Engineer at Intel, focusing on designing, developing, and maintaining embedded firmware for silicon, SoC subsystems, and controllers. Responsibilities include end-to-end feature ownership, low-level driver development, RTOS integration, pre-silicon to post-silicon debug, and collaboration with cross-functional teams. Requires strong C/C++, embedded systems fundamentals, and experience with pre-silicon workflows and debugging tools.

Intel is seeking a Compiler Engineer to design, develop, test, and enhance software tools for domain-specific programming languages like P4. The role involves collaborating with hardware design teams, optimizing code generation for ASIC network packet processing, and participating in language standards groups. Requires strong C/C++ skills, deep understanding of compiler internals, and expertise in frameworks like GCC or LLVM.

This role focuses on the physical design and process technology for Intel's High Performance Processor (P-Core) CPUs. Responsibilities include synthesis, place and route, timing analysis, power optimization, and developing physical design methodologies using industry EDA tools.

This role is for an IP Design Verification Engineer at Intel, focusing on ensuring the quality and reliability of Intel's IP designs. Responsibilities include developing and executing verification plans, creating test benches and cases, performing simulations, debugging issues, and collaborating with cross-functional teams. The role requires proficiency in System Verilog and Python, knowledge of IP validation tools and methodologies, and experience in test planning and hardware simulation.

This role focuses on the functional logic verification of an integrated SoC, ensuring it meets specifications. Responsibilities include defining and developing verification plans, test benches, and environments, executing these plans using emulation and simulation models, debugging issues in the presilicon environment, and collaborating with various design teams. The role also involves incorporating security activities into test plans and maintaining the verification infrastructure. Experience with Pre-Si validation, System Verilog OVM/UVM, and scripting languages like Python is required.

This role is for a DFT Design Engineer at Intel, focusing on Design for Testability (DFT), Design for Debug (DFD), and Design for Validation (DFV) within micro-architecture, RTL design, and validation stages. The engineer will architect and implement DFX strategies, define methodologies, oversee Scan/ATPG, perform yield analysis, and support silicon debug. Responsibilities include RTL coding, integrating DFx sub-IPs, inserting MemoryBIST logic, and collaborating with cross-functional teams for issue analysis and root cause identification. The role also involves pre-silicon validation and post-silicon support for debug capabilities.

Mechanical Engineering Intern to support operation and preventive maintenance of mechanical systems like HVAC, Chiller, OFA, and vacuum systems in industrial and data center environments. Responsibilities include hands-on maintenance tasks and learning about building mechanical systems.

Senior CPU Design Engineer focused on front-end integration and quality assurance across multiple teams and sites. Responsibilities include leading complex subIP integration, static methodology sign-off (CDC, RDC, Lint, low-power), and driving end-to-end integration workflows. Requires strong technical leadership and collaboration skills.

Internship role focused on firmware engineering for Intel Client architecture, contributing to the design, development, validation, and debugging of embedded software for Edge reference platforms. Involves system-level modeling, algorithm development, and hardware-software integration.

Internship role focused on security research for hardware development teams, involving review of designs, threat and vulnerability assessments, and creating proof-of-concepts for security risks in SoCs.

Electrical Validation Intern at Intel, contributing to the functional, power, performance, and electrical validation of silicon products. Responsibilities include debugging, data analysis, coverage assessment, and potentially assisting with test automation and validation infrastructure development. The role requires a Bachelor's degree in Engineering and experience in signal integrity electronic circuit analysis.

Experienced Linux Kernel Developer sought for system software engineering team, focusing on x86 architectures, device drivers, and platform integration. Role involves supporting early platform enablement in presilicon and postsilicon environments, collaborating with hardware and software teams, and contributing to upstream Linux kernel subsystems. Requires strong Linux kernel expertise and debugging skills.

This internship focuses on developing automated simulation workflows for high-speed I/O technologies like PCIe, evaluating channel and circuit topologies, extracting channel models, and analyzing results to identify optimization opportunities. The role involves collaborating with engineers, executing parametric studies, and contributing to documentation for future server platforms and data center leadership.

Student worker role focused on developing and automating simulation workflows for next-generation electro-optical links, benchmarking link parameters, performing laboratory measurements to validate simulation models, and analyzing performance differences. The role involves synthesizing findings for component architecture recommendations and contributing to I/O specifications.

Intel's IOTS Pathfinding team is seeking an Engineer Intern to support readiness and scalability for next-generation high-speed I/O technologies. The role involves developing and validating 3D electromagnetic (EM) model libraries for interconnects using industry-standard tools to support signal integrity (SI) and power integrity (PI) evaluations. Responsibilities include running parametric studies, correlating simulations to measurements, and contributing to documentation and reusable modeling workflows.

Internship role focused on supporting SoC (System on Chip) development activities, including learning about functionality, performance, and quality validation. Responsibilities involve assisting with pre-silicon and post-silicon validation plans and execution, using environments like Simics/VP, FPGA, Zebu SLE and HSLE models, and participating in debugging.

This is an internship role focused on the pre-silicon functional logic verification of silicon designs for data centers. The intern will contribute to verification plans, test benches, and environments, working with experienced engineers on validation methodologies, simulation, emulation, and debug. The role involves learning industry-standard verification flows and tools, and collaborating with design and architecture teams.

Develop and validate system software for Intel GPUs, including firmware, device drivers, and APIs. Optimize tools and infrastructure for GPU performance, adapt driver functionality to hardware changes, and debug Linux kernel issues. Contribute to open-source communities by upstreaming patches and coordinating driver enhancements.

Seeking a Python Automation Engineer for pre-silicon validation tools at Intel. Responsibilities include developing automation tools, debugging, performance analysis, supporting validation coverage, and participating in test automation and data analysis. Requires experience in computer architecture, programming, GitHub, and Linux, with familiarity in Python and server/SoC architectures preferred.

Senior Verification Engineer role focused on ASIC/FPGA design verification using UVM, formal methods, and coverage-driven techniques. Responsibilities include defining verification strategy, leading execution, debugging, and mentoring junior engineers. Requires 5+ years of experience in ASIC/FPGA verification.

This role is for a Design Verification Student Worker at Intel, focusing on SoC design and implementation for next-generation SoCs. The candidate will explore and implement new design methodologies that utilize AI engines and modern hardware description languages. Responsibilities include IP to SoC integration, developing automation scripts, debugging digital simulations, and collaborating with design engineers. The role requires pursuing a Master's or PhD in a related field with at least one year remaining, and experience in digital design, programming/scripting, hardware description languages, and pre-Si validation.

This is a student intern position at Intel focused on technical sales enablement. The role involves assisting with technology demonstrations, developing training materials, documenting technical results, and participating in proof-of-concept projects. While the role mentions AI PC and advanced computing solutions, the core responsibilities are sales enablement and technical support, not direct AI/ML development or research.

Product Development Engineer responsible for evaluating and debugging new test programs, resolving product manufacturability issues, performing data analysis to improve test coverage and yield, and developing support software for test program validation and debug.

Internship role focused on firmware development for Intel silicon products, involving design, development, validation, and debugging of embedded software for domains like BIOS, microcontrollers, and memory systems. Responsibilities include system-level modeling, algorithm development, and hardware-software integration, often under constraints. Collaboration with architects and engineers is expected. The role is for graduate students with strong programming skills (C++, C, Assemble) and experience in firmware or embedded software development.

Intern role focused on Xeon IO performance engineering, involving validation, analysis of KPIs, debugging, and optimization of networks for Intel's AI performance across diverse product segments. Responsibilities include executing performance validation, identifying bottlenecks, supporting customer co-validation, and mitigating single-point-of-failure risks in I/O domains.

Entry-level Linux/Android Kernel Engineer role focused on SoC platform development, applying academic knowledge to real-world kernel development, FPGA environments, and industry-standard tools. Involves basic kernel module development, device drivers, and system components with mentorship.

Software Enabling and Optimization Engineer at Intel responsible for developing software for Intel's customers to enable, validate, and triage the integration of CPUs into their platforms. This role involves collaborating with customers and internal partners to solve critical customer problems, conducting code reviews, analyzing and debugging issues, and providing technical support. The engineer will also contribute to product development by driving application pre-enablement and product hardening, and deliver technical training and collateral to facilitate customer adoption of tools.

Intel is seeking a GPU Design Verification Engineer to ensure the functional accuracy and performance of their GPU architectures. The role involves developing verification plans, test benches, and executing simulations to validate designs, debug issues, and collaborate with cross-functional teams. The position requires experience in System Verilog, UVM, and scripting languages, with a focus on graphics IP verification for integrated, discrete, and AI-enabled platforms.