This role is for a Systems Design Engineer at AMD, focusing on developing and implementing System Power Modeling methodologies and frameworks. The engineer will work on diverse system architectures, analyze power impact, and drive technical innovation in product development and validation. The role requires programming/scripting skills and experience with system architecture and debug.

System Software Engineer at AMD responsible for designing and developing Scandump and JTAG tools for AMD products, spanning pre-silicon architecture to post-silicon implementation. The role involves coordinating with engineering teams, debugging issues, and driving continuous improvement for Scan tools. Requires a self-starter with experience in C#, Python, SQL, and familiarity with C++, DFT, and X86 architecture.

AMD is seeking a system design engineer to lead the bring-up and validation of AI scale-up switches for next-generation AI rack infrastructure. The role involves deep expertise in high-speed Ethernet, server management, and platform validation, with responsibilities including link bring-up, performance testing, and debugging complex system-level failures. The engineer will collaborate with hardware, firmware, and software teams to deliver production-ready systems and develop test automation scripts.

This role supports direct and indirect materials contracting within the Procurement Legal function, managing a high volume of work with minimal supervision. Responsibilities include drafting, reviewing, and negotiating procurement agreements, managing intake governance, and identifying process improvements. The role also supports the use of automation and AI tools to improve efficiency.

This role is for a Technical Program Manager focused on Manufacturing Test and Readiness for AMD's Data Center GPU products. The role involves end-to-end test strategy, ASIC validation, firmware/software enablement, platform bring-up, and high-volume manufacturing. Key responsibilities include defining test program content, driving cross-functional execution, managing project risks, leading debug of manufacturing failures, and architecting manufacturing test programs for yield and test time optimization. While the company mentions AI and its use in screening, the core function of this role is in hardware manufacturing and test, not AI/ML development.

This role is for a Sr. Systems Design Engineer at AMD, focusing on improving AMD's capabilities in product development, validation, and debugging. The role involves driving technical innovation, developing tools and scripts, enhancing methodologies, and debugging issues across SOC programs. It requires programming/scripting skills and knowledge of system architecture and debug techniques.

AMD is looking for an FPGA Development Engineer to design out-of-band management FPGA solutions for their next-generation GPU products. The role involves developing complex FPGA-based digital designs, defining architecture, writing Verilog/SystemVerilog, and supporting debug and defect resolution. Experience with FPGA, firmware, embedded systems, and various protocols is preferred.

Senior Hardware Engineer to join the Data Center Systems Engineering team, focusing on the design, development, and integration of hardware for next-generation AI and accelerated computing platforms, specifically Data Center GPU systems. Responsibilities include leading schematic design, component selection, PCB layout, board bring-up, system integration, validation, and debug efforts for complex hardware issues. The role requires experience with computer architecture, signal integrity, power delivery, and system-level design, with a preference for direct experience in Data Center GPU platforms and AI server architectures.

AMD is seeking a Distinguished Memory PHY Architect to shape the future of memory interface technology. This role involves defining, architecting, and delivering next-generation Memory PHY solutions in advanced CMOS technologies, influencing technical direction and guiding critical design decisions for future SoCs. The position focuses on deep technical ownership and architectural influence without requiring people management.

Senior High-Speed SERDES Validation Engineer responsible for characterization and validation of high-speed transceivers from wafer sort to production, collaborating with design and test teams to ensure product quality and manufacturability.

This role is for a SoC Verification Engineer at AMD, focusing on the verification of Network on Chip (NoC) IPs and Subsystems. The engineer will be responsible for architecting, developing, and using simulation and formal verification environments to ensure the functional correctness of NoC IPs, subsystems, and SOC designs. The position requires strong expertise in SystemVerilog, UVM, and ASIC/SoC verification methodologies.

This role is for a Silicon Design Verification Engineer at AMD. The primary focus is on verifying complex digital design blocks for processors, FPGAs, and SOCs using System Verilog and UVM. The role involves planning verification, designing testbenches, debugging, and analyzing coverage. While the company mentions AI and next-generation computing, the core responsibilities of this specific role are in traditional hardware verification, not AI/ML model development or deployment.

This role is for a Silicon Design Verification Engineer at AMD, focusing on verifying complex IP designs for processors. Responsibilities include creating test plans, designing testbenches using System Verilog and UVM, formal verification, debugging, and ensuring quality metrics. The role requires a Master's degree in computer or electrical engineering and experience with verification methodologies and scripting languages.

AMD is seeking an IP Verification Engineer to join their AECG Group. The role involves verifying cutting-edge FPGAs and ASICs for various customers, collaborating with architecture, IP design, PD, and product engineering teams. Responsibilities include developing test plans, coding UVM-based testbenches, building directed and random tests, and debugging failures to ensure high design quality. Preferred experience includes IP level ASIC verification, Verilog, System Verilog, UVM frameworks, and scripting for automation. Familiarity with computer architecture and protocols like PCIe, CXL, NVMe, or Ethernet is also beneficial.

This role is for a Verification Engineer working on FPGA and ASICs, focusing on IP verification for PCIe CXL based IPs. Responsibilities include developing test plans, coding UVM based testbenches, running regressions, and debugging failures. While generative AI is mentioned as a potential plus for verification tools, the core of the role is traditional hardware verification.

AMD is seeking a Verification Engineer to join their AECG Group, focusing on cutting-edge FPGA and ASIC development for various customers. The role involves collaborating with architects, design, and product engineers to ensure first-pass silicon success. Responsibilities include developing test plans, coding UVM-based testbenches, building directed and random tests, and debugging failures to ensure high design quality.

This role is for a Debug Engineer at AMD, focusing on the Server DPPM Data Center for AMD EPYC processors. The responsibilities include leading the debug team, driving improvements in testing and failure identification, and working with cross-functional teams to root-cause product issues. The role requires a strong understanding of x86 architecture, post-silicon validation, and semiconductor manufacturing processes. Experience in system-level debug, fault isolation, and scripting languages like Python is preferred.

This role focuses on the design and implementation of features within ML Processor & Digital IP for AMD. The responsibilities include driving feature definition, RTL implementation, and collaborating with various engineering teams. The role requires a strong understanding of digital design concepts, computer architecture, and PPA trade-offs, with a plus for GPU programming and architecture knowledge.

AMD is seeking a Client Public Relations (PR) Manager to lead tactical PR programs supporting Client Computing and Graphics product launches, reviews, and momentum campaigns. This role partners closely with regional PR teams to coordinate consumer client and graphics communications globally, with direct responsibility for North America. The PR Manager will cultivate and support relationships with media, bloggers, content creators, YouTubers, and industry influencers to drive positive coverage, reinforce key product messages, and amplify AMD thought leadership. Internally, this role collaborates with business units and marketing teams to develop messaging, content, and communications strategies that support product launches and ongoing campaigns. The overall objective is to maximize positive editorial coverage and engagement across North America and globally. This position also oversees press sampling and review program strategy across the Client and Graphics portfolios, ensuring alignment between business objectives, marketing priorities, and regional execution.

This role is for a Sr. Analog Design Engineer at AMD, focusing on the definition, specification, and implementation of high-speed and high-precision memory interface PHY circuits (DDR, LPDDR, GDDR). The engineer will be responsible for circuit design, layout quality, electrical and timing analysis, and reliability checks, interfacing with cross-functional teams. Experience in analog/mixed-signal circuits for memory interfaces or serial links is preferred.

This role is for a Sr. Memory Subsystem Verification Engineer at AMD, focusing on pre-silicon verification of advanced Network-on-Chip (NoC) architectures and DRAM memory controller IPs (LPDDR6, HBM4). The engineer will drive verification strategies, develop simulation and formal verification environments, and collaborate with design, architecture, and software teams to ensure high-quality silicon.

This role is for an Occupational Health Program Manager at AMD. The primary responsibilities include developing, implementing, and managing comprehensive occupational health programs such as injury prevention, workers' compensation, OSHA recordkeeping, medical accommodations, and emergency response. The role also involves data analysis, reporting, fostering a culture of well-being, and collaborating with various internal teams. While the company mentions AI and the role has preferred experience with basic AI tools, the core function of the job is not AI/ML development or research.

Director of Hardware Systems Engineering at AMD, focusing on leading teams in the design, validation, and launch of cutting-edge hardware products, including defining system architecture, managing teams, and resolving complex hardware issues related to PCIe, memory, and high-speed ethernet. The role involves strategic leadership, team management, product development lifecycle ownership, root cause analysis, and driving hardware improvements.

This role is for a Server Customer Debug Engineer at AMD, focusing on resolving customer issues related to RAS, PCIe, Memory, MCA, CXL, and Micro-Controller failures. It involves using debug tools, collaborating with global teams, and providing recommendations for validation and root cause analysis. The role requires expertise in silicon and system engineering for customer enablement and debug.

This role focuses on the design and verification of power systems for AMD's Instinct Graphics Processing Units (GPUs), which are used in AI and data centers. The engineer will work on power delivery networks, component selection, layout guidelines, and system-level validation. While the role supports AI hardware, it is not directly involved in building or researching AI models or agents.

AMD is seeking a Technical Program Manager for their Pre-Silicon Development team, focusing on driving the execution of key development programs from concept to tape out for AI and data center computing experiences. The role involves coordinating across various engineering teams, managing project plans, schedules, resources, and risks, and ensuring program success in terms of scope, schedule, and spend.

Senior Hardware Validation & Failure Analysis Engineer at AMD responsible for leading hardware validation, system bring-up, failure analysis, and product sustainment activities across complex computing and embedded hardware platforms. This role involves evaluating product performance throughout the product lifecycle, from pre-silicon validation to manufacturing support and field issue resolution.

This role is a Director, Lenovo Global Account Manager responsible for leading AMD's global engagement with Lenovo across Data Center and Client businesses. The role focuses on defining and executing global program strategy, driving platform adoption, expanding revenue and market share, and strengthening AMD's position across Lenovo's portfolio. It involves executive engagement, platform strategy, AI infrastructure growth, and global account leadership, leveraging AI-enabled tools for planning and forecasting.

This role is for a Senior Software Development Engineer at AMD, focusing on firmware development for AMD Secure Encrypted Virtualization. The engineer will design, develop, and debug firmware solutions for new processors, collaborate with customers and partners, resolve technical challenges, and align efforts across engineering teams. The role requires strong C/C++ skills, experience in firmware or device driver development, and an understanding of secure coding processes and encryption technology. Experience with virtualization, hypervisors/VMs, and Linux kernel is desired. The role is not directly AI/ML development but is within the broader context of AMD's work in AI and data centers.

Lead Systems Design Engineer for AMD's Data Center GPU team, focusing on driving technical innovation, improving product development and validation, and debugging SOC programs. The role involves developing scalable and automated solutions, working with multiple teams, and engaging in software/hardware modeling.

This role is for a Principal Linux Systems Architect at AMD, focusing on x86 computing architecture and Linux system software. The architect will drive end-to-end platform and software architecture, set technical direction, and solve complex system-level challenges across hardware, firmware, OS, virtualization, and application layers. Responsibilities include defining system software and platform architecture, driving technical strategy, leading architecture reviews, architecting Linux kernel and low-level system software, providing technical leadership for system bring-up and performance optimization, and leading root-cause analysis. The role also involves interfacing with open-source communities and external partners.

This role is for an RTL/Logic Design Engineer at AMD, focusing on the Graphics Memory Controller (GMC) IP for Discrete GPUs and Instinct accelerators. The engineer will participate in architecture and micro-architecture specifications, perform RTL coding for new features, and work with verification engineers. The role requires experience in digital design, high-speed memory interfaces (HBM, GDDR), Verilog, and industry-standard CAD tools, with a focus on meeting timing, power, and area requirements.

AMD is seeking an experienced DFx Architecture, Methodology and Logic Design Expert to own and drive DFx Architecture definition, RTL implementation, and methodology development for FPGA-SoCs and custom ASICs. The role involves defining and implementing DFx features in RTL, co-owning timing and design quality checks, and working cross-functionally with various engineering teams. Experience with Siemens Tessent DFT flows and strong logic design/timing fundamentals are preferred.

This role focuses on the post-silicon validation of high-speed IO for AMD's datacenter CPU and AI GPU systems. The engineer will develop and execute test plans, create test content, develop validation infrastructure, and collaborate with cross-functional teams to debug platform and SoC issues. The role requires expertise in high-speed IO interfaces like PCIe and CXL, server platform components, and strong debug skills. While the role supports AI GPU systems, the core function is validation engineering for hardware infrastructure, not AI model development or deployment.

Research Engineer at AMD focusing on driving technical innovation and developing prototype technology across hardware and software boundaries, with a strong emphasis on collaboration and impactful research.

This role is for a Senior Design Verification Engineer at AMD, focusing on advanced data center networking technology. The engineer will be responsible for developing and executing verification strategies for complex ASIC designs, including IP, subsystem, and SoC levels. Key responsibilities involve UVM-based testbench development, execution, debugging, and collaboration with cross-functional teams. The role requires strong SystemVerilog and UVM expertise, experience with industry protocols, and scripting skills.

Program Manager for AMD's Rack Expansion Program, focusing on managing project schedules, supply balance, and cross-functional alignment for product launches in AI and data centers, PCs, gaming, and embedded systems.

This role supports servers in customer data centers, focusing on hardware setup, diagnostics, troubleshooting, and decommissioning. It involves following standard procedures, ensuring quality checks, and contributing to documentation and team environment. The role requires strong technical skills in hardware, IT, and cabling management, with a focus on attention to detail and results-driven attitude.

This role focuses on building next-generation infrastructure for predicting, explaining, and improving AMD GPU kernel performance. It involves creating performance-estimation systems using various data sources like ISA, compiler output, and simulator traces. The engineer will model key performance drivers, validate predictions against hardware and simulators, and partner with other teams to optimize hardware, compilers, and kernels. While ML-assisted modeling is mentioned as an exploration area, the core of the role is in GPU performance modeling, compiler analysis, and microarchitecture, not direct AI/ML model development as the primary output.

AMD is seeking a SoC Architect to join their AECG x86 Embedded Team. This role will focus on defining and driving cutting-edge SoC designs for embedded and commercial applications, working across silicon, firmware, and software. Responsibilities include leading SoC architecture, owning platform power and reset, defining SOC features, static timing analysis, high-speed I/O architecture, performance/power/reliability modeling, functional safety, and cross-functional leadership. The ideal candidate will have experience in X86, GPU, interconnect, HSIO, and Memory subsystems architecture, with a background in embedded markets and SOC design.

AMD is seeking a Security Architect to design and develop system security architectures for their client and gaming products. The role involves defining security specifications, conducting threat modeling, and collaborating with hardware, software, and firmware teams. Experience with secure boot, confidential computing, and cryptography is preferred, with a mention of AI/ML security implications in hardware systems.

Failure Analysis Engineer - Power & Design at AMD, focusing on GPU accelerators. Responsibilities include PCB triage, power delivery debug, board-level fault isolation, developing debug strategies, running diagnostics, and collaborating with design, validation, FW, and manufacturing teams to accelerate root cause analysis and corrective actions. The role requires strong electrical engineering fundamentals, hardware design, board bring-up, and electrical debug expertise.

Director of Program Management, Mfg Strategy at AMD, leading complex, cross-functional programs critical to Helios success. Owns end-to-end program deliverables, governance, and execution, ensuring alignment across engineering, operations, supply chain, finance, and executive leadership. Sets operating rhythm, scales teams/processes, and drives predictable delivery against aggressive schedules, cost targets, and quality expectations. Requires strong executive presence, risk identification/mitigation, crisis management, and collaborative leadership. Experience in semiconductor, advanced manufacturing, or technology-intensive industries is preferred.

Operations Manager role at AMD focused on leading warehouse and operational execution, ensuring performance, compliance, and scalability. The role involves structured problem solving, process standardization, continuous improvement, and managing material flows across inbound, internal, and outbound activities. It requires compliance with safety and shipping regulations and collaboration with cross-functional teams and external logistics providers.

Develop, enhance, and maintain stress tools for AMD CPUs, collaborating with design teams and participating in silicon validation efforts. This role focuses on software engineering for hardware development tools.

AMD is seeking a Failure Analysis Engineer focused on Power and Thermal issues for GPU accelerators. This role involves PCB triage, board-level fault isolation, developing debug strategies, running tests, and collaborating with design, validation, FW, and manufacturing teams to identify root causes and implement corrective actions. The engineer will analyze power behavior, thermal analysis, and liquid-cooling performance, documenting findings and presenting them to stakeholders. Experience with hardware debug, power/thermal analysis, liquid cooling, PCB triage, scripting (Python), and firmware is preferred.

Develop high-performance models for ASIC verification, architecture validation, and software development acceleration. Requires C/C++, SystemC, and ARM fast models expertise.

AMD is seeking a Senior DevOps/SRE Engineer to improve developer experience and release quality builds for their open-source software stack, which supports inference and training workloads. The role involves developing and maintaining CI/CD pipelines, leading SRE activities, modernizing developer workflows, and contributing to release packaging. The engineer will work with the latest hardware and software technology and lead a small team.