Intel

This role focuses on the physical design and timing analysis of DDRPHY IP, ensuring high performance and low power consumption. Responsibilities include chip/block-level timing analysis, optimization, clock network design, and collaboration with various engineering teams. The role requires expertise in static timing analysis tools, clock design, and TCL scripting.

This role focuses on the functional validation of CPUs, ensuring performance, power, and area goals are met. Responsibilities include developing validation methodologies, executing test plans, performing silicon debug, and collaborating with various engineering teams throughout the product lifecycle. The role requires knowledge of CPU architecture, coding in C/C++ or Python, and experience with hardware/software validation tools.

Intel is seeking a CPU Validation Engineer to define, develop, and perform functional validation for CPUs, focusing on CPU internals and integration in system-level features. The role involves applying hardware and software tools, developing validation methodologies and test plans, executing these plans, and collaborating with other engineers for design optimization and troubleshooting. Responsibilities include silicon debug, root cause analysis, testing feature interactions, developing post-silicon validation infrastructure, publishing validation reports, and working with cross-functional teams (architecture, design, verification, board, platform, manufacturing) to improve debug and validation strategies. The engineer will also develop content to increase specific IP interactions and engage in all product life cycle phases, including bug hunting in simulation, emulation, and FPGAs.

Seeking a Practical Engineering student for a semiconductor manufacturing facility to support advanced equipment, learn maintenance and troubleshooting, and collaborate with engineering teams. Role involves hands-on experience in a high-volume, cutting-edge fabrication environment.

Student worker role focused on pre-silicon verification of hardware designs for Intel's next-generation IPs, ensuring bug-free final designs through RTL validation, test plan development, and debugging.

Develops and optimizes processes and equipment for Intel's advanced packaging platform technologies, focusing on manufacturability, reliability, quality, cost, yield, and productivity. Collaborates with cross-functional teams to solve engineering challenges and design processes.

Develops and optimizes semiconductor packaging technologies, focusing on interconnects and thermal solutions. Collaborates on equipment, materials, and processes for high-volume manufacturing, requiring a PhD or Master's in a related engineering/science field and experience in mechanical design or manufacturing systems.

This role is for a Facility Category Manager at Intel, responsible for managing supply chain strategies, supplier relationships, and procurement processes for facilities services, real estate, construction, and maintenance programs. The candidate will develop commodity strategies, manage supplier performance, and ensure cost-effectiveness and sustainability.

Seeking a strategic Server Product Manager to drive product platform strategies and manage critical supply chain operations for Intel's Data Center and Network Supply team. This role involves optimizing supply and demand across the data center product portfolio, managing product supply health, developing supply strategies, and collaborating with cross-functional teams.

This role is for a Senior Infrastructure and Design Automation Engineer within Intel Foundry Automation - Government Programs. The engineer will be responsible for planning, provisioning, installation, configuration, maintenance, and operations of software infrastructure for building, validating, and releasing hardware and software products. Key tasks include identifying automation opportunities, implementing solutions for increased automation and reliability, deriving infrastructure design requirements, and maintaining systems within Intel's enterprise infrastructure constraints. The role requires experience with EDA tools, scripting languages (Python, Perl, Tcl, shell), Linux OS, networking, workload management platforms, and license management. Experience with government security clearances and customer-facing roles is preferred.

Analog Circuit Design Engineer at Intel focusing on PLLs and clocking circuits, involving design, validation, and reliability. Requires strong fundamentals in CMOS design and semiconductor device physics.

Analog Circuit Design Engineer responsible for designing and developing analog circuits in advanced process nodes for analog and mixed-signal IPs, optimizing for power, performance, area, timing, and yield. Requires experience in PLLs, clocking circuits, LC VCO/DCO design, and CMOS fundamentals.

Analog Circuit Design Engineer at Intel focusing on high-speed interconnect solutions, designing and verifying analog circuits in advanced process nodes. Responsibilities include transistor-level design, simulation, optimization, and post-silicon validation for SerDes PHY analog blocks.

Intel is seeking an Analog Circuit Design Engineer to design, simulate, and verify analog circuits for advanced process nodes, focusing on high-speed SerDes (112/224Gbps). The role involves optimizing circuits for power, performance, area, and yield, and collaborating with cross-functional teams. Experience with EDA tools and CMOS technologies is required.

Analog Circuit Design Engineer at Intel, focusing on designing, developing, and optimizing high-speed analog circuits in advanced process nodes for next-generation memory interface PHYs. Responsibilities include circuit design, simulation, optimization for power/performance/area, test plan creation, collaboration with cross-functional teams, layout reviews, and post-silicon debug.

Manufacturing Operator role focused on product manufacturing, assembly, equipment operation, data collection, and process optimization in an industrial setting. Requires technical aptitude and adherence to SOPs.

Design, develop, and optimize high-speed SerDes circuits for Intel's next-generation technologies, collaborating with cross-functional teams and supporting silicon validation.

This role focuses on the functional validation of Accelerator IPs within Intel's Data Center Group. The engineer will define, develop, and perform validation for IP internals and their integration into system-level features, covering both pre- and post-silicon stages. Responsibilities include developing test plans, methodologies, and infrastructure, performing silicon debug, and collaborating with other engineering teams. The role requires strong programming skills in C/C++/Python for automation and experience with hardware architectures and lab equipment.

Intel is seeking an experienced Micro Architect/Senior Design Engineer to design, develop, and implement advanced Digital IO Controllers like PCIe/CXL/UCIe systems for next-generation data center and AI chips. This role requires microarchitectural expertise and hands-on RTL coding skills, with a deep understanding of high-speed IOs and interconnect protocols. Responsibilities include architecting memory coherency protocols, designing critical components of PCIe/UCIe controllers, collaborating with cross-functional teams, and staying updated on emerging technologies in AI/ML hardware.

Analog Circuit Design Engineer at Intel, responsible for designing, developing, and optimizing high-speed analog circuits in advanced process nodes. This role involves circuit design, validation, simulation, optimization for power/performance/area/timing/yield, test plan creation, cross-functional collaboration, and post-silicon debug. Requires expertise in high-speed analog circuits like TX/RX blocks, PLLs, DLLs, SerDes, and voltage regulators, with proficiency in industry-standard tools.

Analog Circuit Design Engineer at Intel responsible for designing, developing, and optimizing high-speed analog circuits in advanced process nodes, contributing to next-generation memory interface PHYs and analog/mixed-signal IPs. Involves circuit design, simulation, validation, optimization for power/performance/area, test plan creation, collaboration with cross-functional teams, layout reviews, and post-silicon debug.

Analog Circuit Design Engineer at Intel responsible for designing, developing, and optimizing high-speed analog circuits in advanced process nodes, contributing to next-generation memory interface PHYs and analog/mixed-signal IPs. Involves circuit design, simulation, validation, optimization for power/performance/area, test plan creation, collaboration with cross-functional teams, layout reviews, and post-silicon debug.

Develop, optimize, and maintain high-performance network solutions and device drivers for Intel's innovative products. Responsibilities include driver development across OS platforms, optimizing packet processing, debugging software stacks, implementing Ethernet standards, and working with virtualization technologies. Collaboration with firmware, hardware, validation teams, and OS vendors is key. The role also involves analyzing and improving OS kernel components and contributing to programming standards.

Seeking a Software Applications Engineering Undergraduate Intern to work on innovative projects, collaborate with professionals, and contribute to software development. Responsibilities include assisting in design, development, and testing of software applications, participating in code reviews, contributing to desktop application development using C#, .Net, C++, Python, and scripting for automation. The role involves problem-solving, communication, and learning practical software design and development processes.

Lead a team of process engineers in developing and implementing dry etch processes for next-generation advanced packaging solutions at Intel Foundry. This role involves managing engineers, formulating long-term strategies, overseeing production-worthy etch processes, and driving yield improvement initiatives.

Intel is seeking a Strategic Sourcing Manager to lead and manage global supply chain operations, focusing on strategic sourcing decisions, supplier relationships, and ensuring sustainability, affordability, and resilience. The role involves developing commodity strategies, identifying and mitigating supply disruptions, negotiating contracts, and influencing supplier selection. The position requires expertise in supply line and capacity management, strategic supplier relationships in a fabless manufacturing environment, and proficiency in data analysis. A Bachelor's degree with 12+ years of experience or a Master's with 8+ years is required.

This role is for a Production Line Coordinator Technician at Intel's wafer fabrication facility in Rio Rancho, New Mexico. The technician will be responsible for identifying and eliminating barriers to tactical execution within the wafer fab, managing line limiters, coordinating downtime, optimizing line management through data analysis, and managing Work-In-Progress (WIP). The role also involves understanding and managing Critical Queue Time (CQT) and supporting hot box lot movement. This is a contract position with potential for conversion.

This role is for a Production Line Coordinator Technician in a wafer fab at Intel. The primary responsibilities include identifying and eliminating barriers to tactical execution, managing production lines, optimizing WIP, and ensuring quality expectations are met through Critical Queue Time management. The role requires understanding of production systems, data analysis, and collaboration with module teams. It is a contract position with night shifts.

This role is a Production Line Coordinator Technician in a wafer fab at Intel. The primary responsibilities involve identifying and eliminating barriers to tactical execution, managing line limiters, optimizing line management, WIP management, and Critical Queue Time (CQT). The role requires understanding production systems, analyzing lot flow and tool performance data, and collaborating with module teams. It is a contract position with a swing shift schedule.

Strategic Account Executive for Intel's Telecommunications sector in Latin America, focusing on driving Intel's edge-to-cloud strategy and building partnerships with a major telecommunications company. Responsibilities include developing strategic plans, leading sales teams, building C-suite relationships, and exceeding revenue goals.

Commodity Manager responsible for developing and managing supply chain solutions for fab equipment spares and service. This role involves developing and executing commodity strategies, negotiating contracts, managing supplier relationships, and identifying cost-saving opportunities within Intel's global supply chain.

Senior CPU Physical Design Engineer at Intel, responsible for the physical design and verification of E-Core/Atom microprocessors. This role involves qualifying PDKs, standard cell libraries, and managing the RTL2GDS flow, including synthesis, floor planning, place and route, static timing analysis, power analysis, and reliability checks. The engineer will also collaborate with cross-functional teams and EDA vendors to enhance design methodologies and automate processes.

Internship role focused on firmware development for memory sub-systems in Intel silicon products, involving design, implementation, testing, and documentation of memory reference code and platform BIOS.

Compiler Engineer role at Intel focusing on developing and maintaining an LLVM-based compiler stack (C, C++, SYCL, Fortran) for Intel processor platforms, impacting AI and HPC. Requires strong C/C++ and LLVM experience, with collaboration in open-source communities and with hardware teams.

This role is for a Finance Settlement and Supply Chain Analyst within Intel's Construction Division Finance team. The analyst will be responsible for settlement analysis and reporting, cost allocation, financial controls, month-end closing, forecasting, and contract approval processes. The position requires strong analytical skills and experience in finance, preferably in construction or capital projects.

Student worker role focused on pre-silicon verification of CPU IP for Intel's next-generation CPU cores. Responsibilities include developing test plans, creating simulation components, debugging digital simulations, and ensuring functional coverage. Requires a Bachelor's or Master's degree in a related field with at least one year remaining, and experience in digital design, ASIC flow, computer architecture, programming languages, and hardware description languages.

Internship role focused on physical layout design of next-generation semiconductors, supporting custom IP blocks and APR partitions. Responsibilities include executing layout tasks, assessing and driving complex assignments, and collaborating with senior engineers on methodologies and automation scripts. The role offers learning opportunities in advanced VLSI layout, physical implementation flows, EDA tools, microprocessor architecture, and cross-functional collaboration.

Internship role focused on physical layout design for next-generation semiconductors, supporting custom IP blocks and APR partitions. Responsibilities include executing layout tasks, assessing and driving complex assignments, and collaborating with senior engineers on methodologies and automation scripts. The role involves learning advanced VLSI layout techniques, physical implementation flows, EDA tools, and microprocessor architecture fundamentals.

Construction Quality and Project Manager role at Intel, focusing on building semiconductor manufacturing facilities. Responsibilities include developing and implementing Quality Management Plans, leading quality investigations, managing construction projects (scope, schedule, budget), and ensuring compliance with standards. Requires a Bachelor's degree in Engineering or related field with experience in construction quality management and project management.

This is an internship role for an Engineering Intern to support validation activities for Telecommunications products. Responsibilities include setting up platforms, executing test cases, performing triage, scripting manual test cases, and automating test plans. The candidate should be pursuing a bachelor's degree in a related STEM field and have experience with scripting languages like Python, Linux OS, system validation, and computer assembly.

RF Engineer at Intel responsible for designing, developing, and verifying complex radio frequency integrated circuits for IPs and SoCs. This includes transistor-level feasibility analysis, floorplan and layout definition, test bench creation, and debugging. The role involves ensuring designs meet specifications and customer needs, applying knowledge of electromagnetic and communication theory, and working with RF test equipment and wireless applications (4G, 5G, WLAN, Bluetooth, GPS).

Internship role focused on SoC integration and verification, involving RTL/logic development with System Verilog and Python, and utilizing AI tools for automation. Requires basic knowledge of digital design fundamentals and computer architecture.

This role focuses on Static Timing Analysis (STA) for System-on-Chip (SoC) physical design at Intel. The engineer will perform timing analysis, generate and verify timing constraints, address timing violations, conduct timing rollups, and develop optimized clock networks. They will also define methodologies for timing models, establish PVT conditions, and collaborate with various teams (clocking, architecture, DFT, logic design) to ensure designs meet performance and power efficiency requirements. The role involves contributing to tools, flows, and methodologies for physical design and timing processes.

Manufacturing Operations Manager at Intel in Penang, Malaysia. This role involves leading a team of technicians to oversee operations, equipment maintenance, and repair in manufacturing facilities. Responsibilities include managing safety, quality, scheduling, conflict resolution, streamlining processes, and ensuring production schedules are met within quality and cost objectives. The manager will also focus on employee staffing, training, development, retention, and establishing long-term strategies for manufacturing capabilities. Requires a Bachelor's degree in a related field and 2-6 years of relevant experience.

Manufacturing Systems Engineer role focused on evaluating, installing, qualifying, sustaining, and improving electronic or electromechanical systems in a manufacturing environment. The role involves integrating manufacturing processes, acting as a liaison between manufacturing and virtual factory groups, and using data analytics to resolve equipment issues. It also includes leading preventive maintenance programs, driving continuous improvement roadmaps, managing projects, and conducting gap analysis for disruptive technologies in high-volume manufacturing.

Entry Level Analog Layout Engineer to support analog and mixed signal IP development, executing custom layout implementation and physical verification tasks for analog blocks used in SoC and IP designs.

This role focuses on the functional verification of IP designs for Intel's advanced IP technologies. The engineer will develop and execute verification plans, test benches, and simulation models to ensure designs meet specifications and identify/debug issues in the presilicon environment. Collaboration with architects and RTL developers is key, as is maintaining verification infrastructure. The role requires strong coding skills in Perl or Python, proficiency in SystemVerilog and UVM/OVM, and experience with AMBA protocols.

Project Controls Engineer at Intel Foundry Construction Sourcing responsible for cost/estimating/schedule controls for semiconductor manufacturing factory projects. This role involves cost reporting, forecast development, leading estimate development, driving process improvements, financial updates, cost reduction strategies, and partnering with procurement on commercial activities. Requires experience in estimation, cost control, capital, OpEx/Spending, and FPnA.

Internship in semiconductor advanced packaging, focusing on process improvements, materials characterization, experimental validation, and computational analysis. The role involves literature surveys, DOE, lab experiments, technical documentation, and supporting R&D aligned with Intel's business goals.

This role is for a Supply Chain Material Program Manager at Intel, focusing on applying supply chain principles to NPIs, cost savings projects, and process standardization. It involves managing cross-functional projects, stakeholder communication, and ensuring compliance within the supply chain operations.