Intel
Building- HQ
- Santa Clara, US
- Founded
- 1968
- Size
- 120,000+
- Website
- intel.com
Currently tracking 64 active AI roles, up 216% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $122k–$414k (avg $253k).
Hiring
64 / 66
Momentum (4w)
↑+356 +216%
521 opens last 4w · 165 prior 4w
Salary range · avg $253k
$122k–$414k
USD · disclosed roles only
Tracked since
Feb 3
last role today
Hiring velocityscroll left for older weeks
Jobs (646)
| Title | Stage | AI score |
|---|---|---|
| CPU Validation Engineer This role is for a CPU Validation Engineer at Intel, focusing on post-silicon validation of next-generation processor designs. Responsibilities include validating logic and architectural features, developing test plans and content, practicing software development and QA processes, driving performance improvements, and debugging silicon bugs. The role requires a Bachelor's degree in a related field, proficiency in Python and scripting, and strong knowledge of CPU architecture and validation processes. | — | 0 |
| Mixed Signal Logic Design Engineer Develops logic design, RTL coding, and simulation for mixed signal and/or high-speed IPs for integration in full chip designs. Participates in architecture and microarchitecture definition, applies strategies for mixed signal designs including analog behavior modeling and circuit simulation, writes RTL, and optimizes mixed signal logic to meet power, performance, area, and timing goals. Reviews verification plans, implements corrective measures for failing RTL tests, and supports SoC customers for IP block integration. | — | 0 |
| IT Support Specialist IT Support Specialist serving as a technical team lead and subject matter expert for Microsoft Teams, Teams Rooms (MTR), Audio/Visual, and Telephony services. Provides Level 4 operational and escalation support, leads shift-based operations in a global 24x7 environment, and acts as the primary escalation point for complex issues. Supports business critical meetings and enterprise collaboration services with an emphasis on proactive issue prevention, problem management, and operational excellence. | — | 0 |
| Memory Systems Firmware Development Engineer Develops firmware for memory subsystems, focusing on initialization, training, and calibration algorithms, ensuring adherence to JEDEC standards and memory design specifications. Collaborates with hardware and RTL design teams. | — | 0 |
| Power Integrity Industry Immersion Intern Internship role focused on power integrity challenges in client platform development, requiring electrical engineering fundamentals and experience with simulation tools. | — | 0 |
| Formal Verification Engineer - CPU Core Seeking a Formal Verification Engineer to join the US CPU verification team, focusing on the development of next-generation CPUs for AI applications. Responsibilities include writing verification test plans, developing pre-silicon verification collateral, technical ownership of formal verification for microarchitecture blocks, ROI analysis, and debugging. | — | 0 |
| Learning and Development Consultant Seeking a Learning and Development Specialist to enhance manufacturing workforce training, focusing on skill gap assessment, training design, facilitation, and continuous improvement within Intel Foundry. | — | 0 |
| Senior CPU Core Physical Design Engineer This role is for a Senior CPU Physical Design Engineer responsible for the physical design implementation of custom CPU designs from RTL to GDS, including synthesis, place and route, clock tree synthesis, static timing analysis, and power/clock distribution. The engineer will also conduct verification and signoff, analyze results to improve microarchitectures, and work with EDA vendors to enhance tool capabilities. The role is critical to the development of next-generation CPUs designed to power the AI revolution. | — | 0 |
| CPU Core Physical Design Engineer This role is for a CPU Physical Design Engineer responsible for the physical design implementation of custom CPU designs from RTL to GDS, including synthesis, place and route, static timing analysis, and power/clock distribution. The engineer will also perform verification and signoff, analyze results to improve microarchitectures, and work with EDA vendors to enhance tool capabilities. The role requires expertise in VLSI circuit design, static timing analysis, and low power design, with a focus on developing CPUs for the AI revolution. | — | 0 |
| Wafer Assembly TD Strategic Program Manager This role focuses on leading the design and development of advanced manufacturing processes for Intel's wafer assembly technology development. It involves building strategies for space, factory positioning, and capacity, developing manufacturability requirements, conducting simulations, partnering with suppliers, and identifying modifications to improve production efficiency. The role also includes monitoring industrial trends, creating technical documentation, and performing pathfinding activities for future device designs. | — | 0 |
| Module Development Engineer Module Development Engineer at Intel focused on advancing semiconductor manufacturing technologies through process and device architecture development, collaborating with suppliers, and optimizing production efficiency. | — | 0 |
| GPU Design Verification Engineer This role is for a GPU Design Verification Engineer at Intel. The engineer will be responsible for defining, developing, and performing functional validation for GPUs, ensuring interaction with media, display, and system-level features. They will apply hardware and software tools to meet performance, power, and area goals, review design changes, develop validation methodologies, and perform silicon debug. The role also involves developing post-silicon validation infrastructure and collaborating with various teams to improve debug and validation strategies. A Bachelor's degree in electrical/computer engineering with 7 years of experience or a Master's with 5 years is required, with experience in SystemVerilog, OVM/UVM, scoreboards, test plans, and CPU/GPU architecture. | — | 0 |
| Power and Thermal Management Industry Immersion Intern Internship role focused on power and thermal management within client platform development at Intel. Responsibilities include developing automation scripts, data analysis, contributing to power management models, and researching emerging technologies. Requires enrollment in a relevant degree program and basic coding/lab experience. | — | 0 |
| Electrical Validation Intern for Client IO Electrical Validation Intern for Client IO at Intel, focusing on validating high-speed and low-speed silicon interfaces. Responsibilities include hardware bring-up, lab testing with professional equipment, data analysis, and developing automation frameworks for electrical validation. Requires coursework in Electrical Engineering and programming skills in Python or C++. | — | 0 |
| CPU Verification Engineer CPU Design Verification Engineer responsible for verifying and validating high-performance, power-efficient processors. Develops and executes verification plans, creates UVM-based testbenches, performs functional coverage analysis, and debugs pre-silicon environments. Collaborates with architects and designers, and enhances verification infrastructure. | — | 0 |
| Packaging Module Development Engineer Develops and optimizes semiconductor packaging technologies, focusing on First Level Interconnect (FLI) and collaborating with cross-functional teams to improve assembly processes, scale advanced capabilities, and lead equipment development. Requires a Master's or PhD in a relevant engineering field with experience in programming/scripting (Python, MATLAB) with AI/ML concepts. | — | 0 |
| Firmware/Software Validation Design Engineer Intern Internship role focused on designing, developing, validating, and debugging embedded software solutions for Intel's hardware. Responsibilities include system-level modeling, algorithm development, hardware-software integration, and bug analysis in constrained environments. | — | 0 |
| Analog Layout Design Engineer Entry Level Analog Layout Engineer to support analog and mixed signal IP development. Responsibilities include custom layout implementation and physical verification tasks for analog blocks used in SoC and IP designs. | — | 0 |
| Firmware Development Engineer Firmware Development Engineer role focused on creating foundational software that interfaces directly with hardware components, including microcode, IP-specific firmware, FPGA, and DSPs. Responsibilities include design, implementation, testing, and validation of these interfaces. Requires C and System Software experience, with preferred experience in C++, Rust, System C, Python, and knowledge of embedded systems and SoC architecture. | — | 0 |
| Design Methodology Engineering Intern This is an ASIC Design Automation Engineering Intern role focused on developing and enhancing automation scripts and tools for front-end RTL design and verification processes in the semiconductor industry. The role involves debugging, problem-solving, and collaborating with design teams, utilizing scripting languages and industry-standard EDA tools. | — | 0 |
| SoC RTL Verification Intern Intern role responsible for verifying architectural functional blocks of IP or SOC, including creating test cases and test benches using UVM methodology. Develop pre-silicon validation tests to ensure systems meet design requirements. Perform RTL and GLS simulation, create RTL validation test plans, run system simulations, and resolve failed tests. Build infrastructure for regressions and volume validation. Document test plans across platforms (IP library, Complex-IPs, Subsystems). Contribute to verification methodology and infrastructure. Adopt and implement industry-standard verification tools and methodologies (Formal, Low Power, Performance, Co-Simulation). | — | 0 |
| Design Emulation Engineer This role is for an ASIC Design Emulation Engineer focused on next-generation System-on-Chip (SoC) technologies. The engineer will work on verification processes using industry-leading EDA tools and methodologies to simulate and validate designs against ASIC specifications. The position requires a student pursuing a Bachelor's degree in Electrical or Computer Engineering with a foundation in digital design verification, HVL languages, programming languages, scripting, and EDA simulation tools. | — | 0 |
| GPU Software Performance Engineer GPU Software Development Engineer focused on performance optimization of 3D games and applications on Linux, involving driver and shader compiler work. Responsibilities include designing, developing, and validating software for Intel GPUs, implementing and optimizing graphics driver features, analyzing performance, and developing internal tools for profiling and debugging. | — | 0 |
| Mixed Signal Logic Design Engineer Develops mixed signal logic design and RTL coding for high-speed IP blocks, focusing on optimizing power, performance, area, and timing. Responsibilities include static timing analysis, collaborating with SoC architects, and supporting integration into complex SoC designs. | — | 0 |
| Pre-Silicon Validation Engineer Intel is seeking a Pre-Silicon Validation Engineer with 7+ years of experience to join their Central Engineering Group in Bangalore, India. The role involves defining and executing verification plans, developing test benches, and debugging complex SoC designs using SystemVerilog and UVM. The engineer will collaborate with cross-functional teams to ensure high-quality SoC delivery and contribute to Intel's next-generation products. | — | 0 |
| Pre-Silicon Validation Engineer This role focuses on Pre-Silicon Validation Engineer for SoC designs at Intel. Responsibilities include defining and developing verification plans, test benches, and environments using SystemVerilog and UVM. The engineer will execute verification plans, debug issues in the presilicon environment, collaborate with cross-functional teams, and incorporate security validation. The role requires strong debugging capabilities for SoC, fabric, and memory subsystems, and knowledge of microarchitecture and computer architecture. | — | 0 |
| Wi-Fi System Architect Seeking an experienced System Architect to define and develop wireless communication system architectures, focusing on HW/SW partitioning, VLSI hardware architecture, and real-time SW/firmware development for next-generation Wi-Fi technology. | — | 0 |
| Silicon SoC Architect Intel is seeking a Silicon SoC Architect with 15+ years of experience to define and drive end-to-end SoC architecture for high-performance and low-power products. Responsibilities include defining architecture, evaluating trade-offs, conceptualizing microarchitecture, integrating IP blocks, developing test infrastructure, conducting simulations, and collaborating with cross-functional teams. Requires expertise in SoC architecture fundamentals, microarchitecture, RTL development, and system architecture integration, with a strong understanding of performance and power trade-offs. | — | 0 |
| Assembly Equipment Group Department Manager Leads the Assembly & Finish Equipment organization at Vietnam Assembly Test (VNAT), driving improvements in quality, predictability, velocity, and affordability. Focuses on operational excellence, engineering rigor, and innovation through AI/ML and advanced engineering solutions. Owns end-to-end equipment performance for Assembly and Finish, ensuring readiness for High Volume Manufacturing (HVM) and New Product Introduction (NPI). Leverages AI/ML and automation to improve tool availability and reduce repeat issues. Builds a strong team culture and serves as the equipment leader interface to factory and site leadership. | — | 0 |
| IP Design Verification Engineer Seeking an IP Design Verification Engineer to ensure the functionality and performance of Intel's cutting-edge intellectual property (IP) designs for system-on-chip (SoC) applications, focusing on LPDDR5 and DDR5 PHY verification. Responsibilities include developing test benches, defining verification strategies, implementing test cases, debugging failures, and automating pre-silicon validation flows. | — | 0 |
| Firmware Validation Engineer Firmware Validation Engineer responsible for designing, developing, and executing software validation environments and plans to test firmware functionality. This role involves analyzing results, debugging failures, identifying root causes, and collaborating with cross-functional teams to ensure firmware quality and reliability for Intel's technology products. Requires Python scripting and strong debugging skills. | — | 0 |
| Product Development Engineer Develop and optimize testability and manufacturability for cutting-edge integrated circuits, from early feasibility to high-volume production. Evaluate and debug new designs on ATE platforms, characterize devices, define specifications, and perform yield analysis to ensure seamless post-silicon ramp and product launch. | — | 0 |
| Pre-Silicon Validation Engineer This role is for a Pre-Silicon Validation Engineer at Intel in Bangalore, India. The engineer will apply technical skills to execute and support projects, analyze and resolve issues, and collaborate with cross-functional teams. The role requires a Bachelor's degree in a technical field and strong technical aptitude. | — | 0 |
| Assembly Equipment Specialist This role focuses on troubleshooting, repairing, and maintaining manufacturing equipment, performing calibration and preventative maintenance, and analyzing data to improve tool performance. It involves creating reports, updating specifications, and supporting engineering experiments and data collection. | — | 0 |
| Manufacturing Technician ( 1 year contract) Manufacturing Technician role focused on wafer production operations, equipment, process, and training. Responsibilities include data collection, process optimization, preventive maintenance, troubleshooting, and improvement processes within a semiconductor manufacturing environment. | — | 0 |
| Test Equipment Specialist This role involves performing troubleshooting, conversion, and preventive maintenance on test equipment and collaterals in an assembly and test plant. The specialist will monitor and analyze equipment performance, escalate issues, and collaborate with engineering on experiments and upgrades. A technical degree in a related field is required. | — | 0 |
| Systems and Solutions Engineer Systems and Solutions Engineer responsible for the design, development, and integration of systems including software, firmware, board, and silicon/SoC components, focusing on customer requirements and system lifecycle. The role involves systems architecture, component-level analysis, defining implementation solutions, delivering end-to-end technical solutions, and collaborating on next-generation requirements and proof-of-concept innovations. Requires strong experience with Bluetooth protocols and Windows platforms, along with bug triage and customer collaboration skills. | — | 0 |
| Compiler Engineer Compiler Engineer role focused on developing, testing, and maintaining C/C++/DPC++ and Fortran compilers for Intel's CPU and GPU platforms. Responsibilities include feature development, defect resolution, performance optimization, and experimental testing. Collaboration with hardware design teams and open-source communities is expected. | — | 0 |
| Site Operations Specialist This role is for a Site Operations Specialist at Intel, focusing on managing facilities, contractors, and operational budgets to ensure the seamless functioning of Intel's sites. The role involves overseeing maintenance, incident response, supplier management, and project execution within the Real Estate and Workplace Services (REWS) team. While the company mentions "AI everywhere" and "AI-assisted coding tools", the core responsibilities are in facilities and operations management, not AI/ML development. | — | 0 |
| Thermal Analysis Engineer This role focuses on the thermal analysis and design of GPU and AI accelerators, ensuring high-performance computing products meet thermal requirements. It involves simulation, experimental validation, and cross-functional collaboration with silicon, packaging, and platform teams. | — | 0 |
| APTD Substrate Quality Engineer The role focuses on elevating quality standards in a semiconductor factory (CH8) by leading a Process Control System (PCS) Working Group, educating engineers on PCS, driving continuous improvement, and developing a long-term PCS strategy. It requires a strong background in advanced statistical methods and manufacturing experience. | — | 0 |
| Formal Verification Student Student role focused on developing tools and methodologies for formal verification of future CPU products within Intel's Core HW Design Verification Team. Requires familiarity with Python and Linux. | — | 0 |
| Design Verification Engineering Intern This is an internship role for ASIC Design & Verification Engineering, focusing on next-generation System-on-Chip (SoC) technologies. The intern will work with industry-leading EDA tools and methodologies, contributing to high-impact projects in semiconductor design. Responsibilities include debugging, problem-solving, and teamwork. Qualifications include a strong foundation in digital design verification (System Verilog, VHDL), object-oriented programming, and scripting languages. | — | 0 |
| TD Media and Collaterals Development Engineer Develops and optimizes media and collaterals for Intel's assembly packaging platform technologies, applying statistical principles and experimental design to improve manufacturing efficiency, quality, and reliability. This role involves developing evaluation equipment, new techniques for problem identification, and consulting on design and process improvements. | — | 0 |
| Power Integrity Industry Immersion Intern Internship role focused on power integrity challenges in client platform development, requiring electrical engineering fundamentals and experience with simulation tools. | — | 0 |
| Soc Functional Validation Engineer This role focuses on the functional validation of integrated SoCs, ensuring IP integration, interaction between IPs, and system-level features meet performance, power, and area goals. The engineer will develop and execute validation plans, perform silicon debug, and collaborate with various teams throughout the product life cycle to ensure silicon readiness. The role involves testing interactions between SoC features, developing validation infrastructure, and publishing validation reports. | — | 0 |
| Infrastructure Engineer – Compute and Client Infrastructure Engineer focused on server hardware management, lifecycle, and operating systems (Linux/Windows) in a data center environment. Responsibilities include deployment, configuration, troubleshooting, firmware/driver maintenance, OS patching, performance monitoring, and documentation. Requires strong analytical and troubleshooting skills, proactive issue resolution, and excellent documentation. | — | 0 |
| Design Technology Tool Enablement Engineer The Design Technology Platform team is looking for an EDA Tools Software Engineer to design, develop, test, and debug software tools and flows for process design and manufacturing. This role involves collaborating with process developers and EDA vendors, automating workflows, and ensuring seamless integration with design methodologies. The position requires expertise in scripting languages, EDA tools, and semiconductor device physics. | — | 0 |
| Construction Technology Integration Program Manager Program Manager for Construction Technology Integration at Intel Foundry, focusing on integrating new technologies to improve cost, schedule, and productivity in semiconductor factory construction, with a specific emphasis on Off-Site Manufacturing (OSM). | — | 0 |
| IT Support Specialist This role supports enterprise digital signage systems, focusing on operational support, monitoring, hardware health, procurement, and coordinating repair efforts. It also involves evaluating and piloting new technologies and solutions through POCs. | — | 0 |