Intel

Building

Industrial

HQ
Santa Clara, US
Founded
1968
Size
120,000+
Website
intel.com

Currently tracking 64 active AI roles, up 216% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $122k–$414k (avg $253k).

Hiring
64 / 66
Momentum (4w)
+356 +216%
521 opens last 4w · 165 prior 4w
Salary range · avg $253k
$122k–$414k
USD · disclosed roles only
Tracked since
Feb 3
last role yesterday
Hiring velocityscroll left for older weeks
2 new roles
Oct 6
1 new role
Dec 8
3 new roles
Jan 5
5 new roles
12
1 new role
19
2 new roles
26
6 new roles
Feb 2
6 new roles
9
8 new roles
16
18 new roles
23
22 new roles
Mar 2
38 new roles
9
45 new roles
16
29 new roles
23
37 new roles
30
54 new roles
Apr 6
113 new roles
13
110 new roles
20
151 new roles
27
147 new roles
May 4

Jobs (646)

64 AI · 734 total active
TitleStageFunctionLocationFirst seenAI score
Memory Validation Intern
Intern position contributing to the functional, power, performance, and memory validation of Intel silicon products. Responsibilities include debugging, data analysis, validation coverage assessment, test automation, and developing validation infrastructure. Requires current pursuit of a relevant Bachelor's or Master's degree and 3+ months of experience in signal integrity electronic circuit analysis and data analysis techniques.
EngineeringGuadalajara, Mexico2w ago0
Staff OS Kernel Engineer
Software developer role focused on Linux kernel integration, automation, issue analysis, and triage for Intel platforms. Involves maintaining, testing, debugging, optimizing, and securing OS kernel and system software, including device drivers and virtualization.
EngineeringOregon, Hillsboro, United States +22w ago0
Facilities Power Distribution Electrical Engineer
Electrical Engineer responsible for the operation, maintenance, and upgrades of Intel's site electrical power distribution systems, including troubleshooting, studies (breaker coordination, arc flash), load tracking, and partnering with utilities and project teams. Requires a Bachelor's degree in Electrical Engineering with 3+ years of experience in medium voltage systems.
EngineeringCalifornia, Santa Clara, United States2w ago0
Experienced DFT ATPG Engineer
Experienced DFT ATPG Engineer responsible for developing logic design, RTL coding, simulation, DFT timing closure support, and test content generation for various DFx content. The role involves participating in architecture and microarchitecture definition, developing HVM content for ATE, integrating DFT blocks, and collaborating with post-silicon and manufacturing teams. Requires BS/MS in EE/CE or related STEM field with 1-3+ years of DFT experience and familiarity with tools like Siemens Tessent, Spyglass, Fusion compiler, and/or VCS, as well as experience with scan insertion, debug, and post-silicon debug.
EngineeringMassachusetts, Beaver Brook, United States +12w ago0
Experienced DFT ATPG Engineer
Experienced DFT ATPG Engineer responsible for developing logic design, RTL coding, simulation, DFT timing closure support, and test content generation for various DFx content. The role involves participating in architecture and microarchitecture definition, developing HVM content for ATE, integrating DFT blocks, and collaborating with post-silicon and manufacturing teams. Requires BS/MS in EE/CE or related STEM field with 1-3+ years of DFT experience and familiarity with tools like Siemens Tessent, Spyglass, Fusion compiler, and/or VCS, as well as experience with scan insertion, debug, and post-silicon debug.
EngineeringMassachusetts, Beaver Brook, United States +12w ago0
Logistics Operations Manager
Logistics Operations Manager at Intel in Malaysia, responsible for managing logistics operations, supplier governance, performance metrics, process improvement, and ensuring compliance. The role involves leveraging analytical and advanced technology skills, including AI, to optimize logistics solutions.
EngineeringKulim, Malaysia +12w ago0
Firmware Development Engineer
Firmware Development Engineer at Intel, focusing on designing, developing, and maintaining embedded firmware for silicon, SoC subsystems, and controllers. Responsibilities include end-to-end feature ownership, low-level driver development, RTOS integration, pre-silicon to post-silicon debug, and collaboration with cross-functional teams. Requires strong C/C++, embedded systems fundamentals, and experience with pre-silicon workflows and debugging tools.
EngineeringBangalore, India2w ago0
Compiler Engineer
Intel is seeking a Compiler Engineer to design, develop, test, and enhance software tools for domain-specific programming languages like P4. The role involves collaborating with hardware design teams, optimizing code generation for ASIC network packet processing, and participating in language standards groups. Requires strong C/C++ skills, deep understanding of compiler internals, and expertise in frameworks like GCC or LLVM.
EngineeringBangalore, India2w ago0
CPU Structural Design – Technology and Path finding
This role focuses on the physical design and process technology for Intel's High Performance Processor (P-Core) CPUs. Responsibilities include synthesis, place and route, timing analysis, power optimization, and developing physical design methodologies using industry EDA tools.
EngineeringHaifa, Israel +12w ago0
CPU Circuit Design Engineer
CPU Circuit Design Engineer role at Intel, focusing on designing next-generation CPU cores and SoCs. Responsibilities include detailed circuit analysis, design implementation, and optimization at the transistor level, meeting power, performance, and area targets. Requires BSc/MSc in EE/CE and at least 2 years of VLSI/circuit design experience.
EngineeringHaifa, Israel +12w ago0
SoftIP Verification Engineer
This role is for an IP Design Verification Engineer at Intel, focusing on ensuring the quality and reliability of Intel's IP designs. Responsibilities include developing and executing verification plans, creating test benches and cases, performing simulations, debugging issues, and collaborating with cross-functional teams. The role requires proficiency in System Verilog and Python, knowledge of IP validation tools and methodologies, and experience in test planning and hardware simulation.
EngineeringBangalore, India2w ago0
Core and Patch Verification Engineer
This role focuses on the functional logic verification of an integrated SoC, ensuring it meets specifications. Responsibilities include defining and developing verification plans, test benches, and environments, executing these plans using emulation and simulation models, debugging issues in the presilicon environment, and collaborating with various design teams. The role also involves incorporating security activities into test plans and maintaining the verification infrastructure. Experience with Pre-Si validation, System Verilog OVM/UVM, and scripting languages like Python is required.
EngineeringBangalore, India2w ago0
DFT Design Engineer
This role is for a DFT Design Engineer at Intel, focusing on Design for Testability (DFT), Design for Debug (DFD), and Design for Validation (DFV) within micro-architecture, RTL design, and validation stages. The engineer will architect and implement DFX strategies, define methodologies, oversee Scan/ATPG, perform yield analysis, and support silicon debug. Responsibilities include RTL coding, integrating DFx sub-IPs, inserting MemoryBIST logic, and collaborating with cross-functional teams for issue analysis and root cause identification. The role also involves pre-silicon validation and post-silicon support for debug capabilities.
EngineeringPenang, Malaysia2w ago0
Facilities Mechanical Intern
Mechanical Engineering Intern to support operation and preventive maintenance of mechanical systems like HVAC, Chiller, OFA, and vacuum systems in industrial and data center environments. Responsibilities include hands-on maintenance tasks and learning about building mechanical systems.
EngineeringPenang, Malaysia2w ago0
Senior CPU Design Engineer- FE Integration and FE Flow
Senior CPU Design Engineer focused on front-end integration and quality assurance across multiple teams and sites. Responsibilities include leading complex subIP integration, static methodology sign-off (CDC, RDC, Lint, low-power), and driving end-to-end integration workflows. Requires strong technical leadership and collaboration skills.
EngineeringBangalore, India2w ago0
ECE Firmware Engineering Intern
Internship role focused on firmware engineering for Intel Client architecture, contributing to the design, development, validation, and debugging of embedded software for Edge reference platforms. Involves system-level modeling, algorithm development, and hardware-software integration.
EngineeringGuadalajara, Mexico2w ago0
Security Research Intern
Internship role focused on security research for hardware development teams, involving review of designs, threat and vulnerability assessments, and creating proof-of-concepts for security risks in SoCs.
EngineeringGuadalajara, Mexico2w ago0
Electrical Validation Intern
Electrical Validation Intern at Intel, contributing to the functional, power, performance, and electrical validation of silicon products. Responsibilities include debugging, data analysis, coverage assessment, and potentially assisting with test automation and validation infrastructure development. The role requires a Bachelor's degree in Engineering and experience in signal integrity electronic circuit analysis.
EngineeringGuadalajara, Mexico2w ago0
Linux Kernel Engineer
Experienced Linux Kernel Developer sought for system software engineering team, focusing on x86 architectures, device drivers, and platform integration. Role involves supporting early platform enablement in presilicon and postsilicon environments, collaborating with hardware and software teams, and contributing to upstream Linux kernel subsystems. Requires strong Linux kernel expertise and debugging skills.
EngineeringCalifornia, Folsom, United States +22w ago0
High-Speed SerDes Simulation & Optimization Intern — I/O Next Generation R&D
This internship focuses on developing automated simulation workflows for high-speed I/O technologies like PCIe, evaluating channel and circuit topologies, extracting channel models, and analyzing results to identify optimization opportunities. The role involves collaborating with engineers, executing parametric studies, and contributing to documentation for future server platforms and data center leadership.
EngineeringGuadalajara, Mexico2w ago0
Optical Component Link Simulation Student Worker
Student worker role focused on developing and automating simulation workflows for next-generation electro-optical links, benchmarking link parameters, performing laboratory measurements to validate simulation models, and analyzing performance differences. The role involves synthesizing findings for component architecture recommendations and contributing to I/O specifications.
EngineeringGuadalajara, Mexico2w ago0
Electromagnetic Modeling Student Worker
Intel's IOTS Pathfinding team is seeking an Engineer Intern to support readiness and scalability for next-generation high-speed I/O technologies. The role involves developing and validating 3D electromagnetic (EM) model libraries for interconnects using industry-standard tools to support signal integrity (SI) and power integrity (PI) evaluations. Responsibilities include running parametric studies, correlating simulations to measurements, and contributing to documentation and reusable modeling workflows.
EngineeringGuadalajara, Mexico2w ago0
SoC Functional Validation Engineering Intern
Internship role focused on supporting SoC (System on Chip) development activities, including learning about functionality, performance, and quality validation. Responsibilities involve assisting with pre-silicon and post-silicon validation plans and execution, using environments like Simics/VP, FPGA, Zebu SLE and HSLE models, and participating in debugging.
EngineeringGuadalajara, Mexico2w ago0
Pre-Si Systems Intern
This is an internship role focused on the pre-silicon functional logic verification of silicon designs for data centers. The intern will contribute to verification plans, test benches, and environments, working with experienced engineers on validation methodologies, simulation, emulation, and debug. The role involves learning industry-standard verification flows and tools, and collaborating with design and architecture teams.
EngineeringGuadalajara, Mexico2w ago0
GPU Software Development Engineer
Develop and validate system software for Intel GPUs, including firmware, device drivers, and APIs. Optimize tools and infrastructure for GPU performance, adapt driver functionality to hardware changes, and debug Linux kernel issues. Contribute to open-source communities by upstreaming patches and coordinating driver enhancements.
EngineeringOregon, Hillsboro, United States2w ago0
Python Automation Engineer – Pre-Silicon Validation Tools (Intern/Co-op)
Seeking a Python Automation Engineer for pre-silicon validation tools at Intel. Responsibilities include developing automation tools, debugging, performance analysis, supporting validation coverage, and participating in test automation and data analysis. Requires experience in computer architecture, programming, GitHub, and Linux, with familiarity in Python and server/SoC architectures preferred.
EngineeringGuadalajara, Mexico2w ago0
Senior Verification Engineer
Senior Verification Engineer role focused on ASIC/FPGA design verification using UVM, formal methods, and coverage-driven techniques. Responsibilities include defining verification strategy, leading execution, debugging, and mentoring junior engineers. Requires 5+ years of experience in ASIC/FPGA verification.
EngineeringCanada · Remote2w ago0
Design Verification Student Worker
This role is for a Design Verification Student Worker at Intel, focusing on SoC design and implementation for next-generation SoCs. The candidate will explore and implement new design methodologies that utilize AI engines and modern hardware description languages. Responsibilities include IP to SoC integration, developing automation scripts, debugging digital simulations, and collaborating with design engineers. The role requires pursuing a Master's or PhD in a related field with at least one year remaining, and experience in digital design, programming/scripting, hardware description languages, and pre-Si validation.
EngineeringGuadalajara, Mexico2w ago0
Technical Sales Enablement Student
This is a student intern position at Intel focused on technical sales enablement. The role involves assisting with technology demonstrations, developing training materials, documenting technical results, and participating in proof-of-concept projects. While the role mentions AI PC and advanced computing solutions, the core responsibilities are sales enablement and technical support, not direct AI/ML development or research.
EngineeringGuadalajara, Mexico2w ago0
Analytical Chemistry Technician
Analytical Chemistry Technician with Mass Spectrometry experience for trace metal analysis in a clean room laboratory environment. Responsibilities include sample preparation, analysis, maintenance of laboratory equipment, and data reporting in support of manufacturing operations. Requires experience with ICPMS, titration, and chromatography techniques.
EngineeringLeixlip, Ireland2w ago0
Product Development Engineer
Product Development Engineer responsible for evaluating and debugging new test programs, resolving product manufacturability issues, performing data analysis to improve test coverage and yield, and developing support software for test program validation and debug.
EngineeringPenang, Malaysia2w ago0
Firmware Development Intern
Internship role focused on firmware development for Intel silicon products, involving design, development, validation, and debugging of embedded software for domains like BIOS, microcontrollers, and memory systems. Responsibilities include system-level modeling, algorithm development, and hardware-software integration, often under constraints. Collaboration with architects and engineers is expected. The role is for graduate students with strong programming skills (C++, C, Assemble) and experience in firmware or embedded software development.
EngineeringShanghai, China2w ago0
Platform Power Thermal Performance Intern
Intern role focused on Xeon IO performance engineering, involving validation, analysis of KPIs, debugging, and optimization of networks for Intel's AI performance across diverse product segments. Responsibilities include executing performance validation, identifying bottlenecks, supporting customer co-validation, and mitigating single-point-of-failure risks in I/O domains.
EngineeringShanghai, China2w ago0
EC Infra and DevOps Engineer
This is an intern role focused on supporting and contributing to software development infrastructure and processes, including automation, monitoring, optimization, CI/CD, cloud integration, and containerization. The role involves learning and applying DevOps and SRE concepts within a hybrid cloud environment, with a focus on HPC and storage systems. The candidate will work with various teams to streamline development and release processes.
EngineeringSan Jose, CA, Costa Rica3w ago0
Automation Engineering - Student Worker
Student worker role focused on supporting software development infrastructure, automation, monitoring, optimization, CI/CD, cloud integration, containerization, and deployment workflows. Requires active student status in a relevant degree, basic server administration experience, and advanced English.
EngineeringSan Jose, CA, Costa Rica3w ago0
Linux Kernel Engineer
Entry-level Linux/Android Kernel Engineer role focused on SoC platform development, applying academic knowledge to real-world kernel development, FPGA environments, and industry-standard tools. Involves basic kernel module development, device drivers, and system components with mentorship.
EngineeringCalifornia, Folsom, United States3w ago0
Senior Infrastructure and DevOps Engineer
This role focuses on designing, deploying, and maintaining Linux-based infrastructure for large-scale modeling, simulation, and data analysis workflows within Intel's Silicon Architecture group. The engineer will manage CI/CD pipelines, automation, artifact storage, and monitor/improve pipeline performance and observability, working cross-functionally to enhance developer productivity and system scalability.
EngineeringOregon, Hillsboro, United States +33w ago0
Python Developer for Customer Debug Tools
Software Enabling and Optimization Engineer at Intel responsible for developing software for Intel's customers to enable, validate, and triage the integration of CPUs into their platforms. This role involves collaborating with customers and internal partners to solve critical customer problems, conducting code reviews, analyzing and debugging issues, and providing technical support. The engineer will also contribute to product development by driving application pre-enablement and product hardening, and deliver technical training and collateral to facilitate customer adoption of tools.
EngineeringGuadalajara, Mexico3w ago0
GPU Design Verification Engineer
Intel is seeking a GPU Design Verification Engineer to ensure the functional accuracy and performance of their GPU architectures. The role involves developing verification plans, test benches, and executing simulations to validate designs, debug issues, and collaborate with cross-functional teams. The position requires experience in System Verilog, UVM, and scripting languages, with a focus on graphics IP verification for integrated, discrete, and AI-enabled platforms.
EngineeringCalifornia, Folsom, United States3w ago0
GPU Design Verification Engineer
This role is for a seasoned professional GPU Design Verification Engineer to join an IP team. Responsibilities include planning, designing complex structures, leading design and verification efforts, defining strategy, and architecting testbenches. The role requires expertise in Verilog, System Verilog, UVM, assertion-based verification, and industry standard protocols. Experience with AI tools or advanced process nodes is preferred.
EngineeringCalifornia, Folsom, United States3w ago0
GPU Design Verification Engineer
This role focuses on the functional verification of graphics logic components (3D graphics, media, display) within Intel's Data Center Group. The engineer will develop verification plans, test benches, and simulation models to ensure designs meet specifications, debug issues in pre-silicon environments, and collaborate with cross-functional teams to improve verification of complex features. The role requires experience with SystemVerilog, UVM, computer architecture, and ASIC design/verification.
EngineeringCalifornia, Folsom, United States3w ago0
System & Board Support Technician- Temporary Position
This role involves managing and maintaining a lab environment, deploying automated tests, triaging issues, and performing hardware/software troubleshooting. It also includes designing custom equipment, monitoring tests, performing preventive maintenance, and developing technical documentation. The position requires onsite presence and is a fixed-term opportunity.
EngineeringGuadalajara, Mexico3w ago0
Module Equipment Technician (Contract)
This role is for a Module Equipment Technician at Intel in Malaysia, focusing on troubleshooting, maintenance, and calibration of manufacturing equipment. It requires a technical diploma and offers opportunities for fresh graduates. The role involves supporting engineering experiments and data collection within a manufacturing environment.
EngineeringKulim, Malaysia3w ago0
SOC Performance Architect
Intel is seeking a SOC Performance Architect to design and evaluate complex hardware features and structures for the XEON CPU and AI portfolio. Responsibilities include defining, documenting, and testing processes, and identifying/resolving design weaknesses to influence future product architecture. The role requires experience in computer architecture, software engineering, performance analysis, SoC-level development, and proficiency in programming and scripting languages.
EngineeringOregon, Hillsboro, United States +23w ago0
AI SW Development Engineer
Develops and optimizes Intel's oneAPI Collective Communications Library for AI accelerators and GPUs, focusing on performant graph modes and efficient scaling solutions for inference and training. Requires strong C++ and Linux development skills, with experience in multithreaded programming and optimization.
EngineeringPetah-Tikva, Israel +13w ago0
Graduate Talent (MPE DDG)
This role focuses on ensuring the testability and manufacturability of integrated circuits, involving testing, validation, and debugging in a manufacturing environment. It also offers involvement in early product development phases for content implementation and validation.
EngineeringPenang, Malaysia3w ago0
Senior Technical Expert- Manufacturing Integration
Designs, develops, tests, and debugs software applications, potentially spanning the full application stack (frontend and backend). Utilizes modern software development methodologies, secure coding practices, and follows legal compliance guidelines. Responsibilities include analyzing user stories, writing functional and test code, automating build/deployment, and performing various levels of testing. Also involves SDL tasks, contributing to product documentation, and potentially interacting with end-users for requirements definition.
EngineeringBangalore, India3w ago0
Systems and Solutions Engineer
This Systems and Solutions Engineer role at Intel focuses on the design, development, and integration of complex systems involving software, firmware, board, and silicon components for data centers. The role involves defining system architecture, translating business needs into technical specifications, and leading the implementation of end-to-end technical solutions. Key responsibilities include automating data center infrastructure build-up, provisioning, monitoring, and creating reusable building blocks for management tools. The position requires strong programming skills (Python preferred), deep OS knowledge, experience with IaC tools, and the ability to lead cross-functional teams.
EngineeringBangalore, India3w ago0
Standard Cell Design Reliability Verification Engineer
Standard Cell Design Reliability Verification Engineer at Intel, focusing on IR/EM flows, VLSI, and using EDA tools for ASIC designs. Requires expertise in device physics, FinFet characteristics, and Python for automation.
EngineeringBangalore, India3w ago0
Senior PCB/CAD Layout Engineer
Senior PCB/CAD Layout Engineer to lead the design and delivery of cutting-edge printed circuit board layouts across diverse electrical systems, including both flexible and rigid circuit boards. This role combines technical excellence with strategic impact, directly contributing to Intel's key objectives through innovative PCB design solutions.
EngineeringOregon, Hillsboro, United States3w ago0