Intel

This role focuses on network security engineering, involving the determination and deployment of robust network services, management of technical projects, research into new technologies, and troubleshooting complex network issues. It requires a strong background in network operations and engineering with specific experience in Cisco, Extreme, Arista, and F5 components, as well as network security concepts. The role also involves scripting and database skills as preferred qualifications.

This role focuses on the functional verification of graphics logic components (3D graphics, media, display) for GPUs. Responsibilities include defining and developing verification plans, test benches, and architecture, executing verification plans, running simulations, debugging issues, and collaborating with architects and developers. The role requires strong programming skills in System Verilog, OVM, and UVM, and experience in ASIC, CPU, or GPU verification.

Experienced IP Logic Design Engineer responsible for designing, optimizing, and validating IP blocks for SoC integration at Intel in Costa Rica. This role involves RTL coding, simulation, architecture definition, and ensuring power, performance, area, and timing goals are met. Collaboration with SoC customers and verification teams is key for high-quality IP delivery.

This role involves technical functions in an electron microscopy lab supporting advanced technology development, process/product development, qualification, and failure analysis. Responsibilities include preparing ultra-thin specimens and performing TEM analysis using dual beam FIB and TEM tools. The role requires technical skills, problem-solving abilities, and continuous skill upgrading.

This role involves technical functions in an electron microscopy lab supporting advanced technology development, process/product development, qualification, and failure analysis. Responsibilities include preparing ultra-thin specimens and performing TEM analysis using dual beam FIB and TEM tools. The role requires technical skills in sample preparation and imaging, with an emphasis on continuous skill upgrading and problem-solving.

The Packaging Module Development Engineer at Intel will provide mechanical modeling support for semiconductor packaging technologies, focusing on R&D projects and issue resolution. This role involves theoretical analysis and numerical modeling using FEA software to advance technology and foundry capabilities.

Intern role focused on developing middleware software solutions that connect applications and hardware, enhancing communication, data management, and system efficiency on Intel's platforms. Responsibilities include API design, protocol implementation, performance tuning, debugging, and applying Agile methodologies.

Analog Circuit Design Engineer role at Intel, focusing on designing and developing cutting-edge analog circuits for advanced process nodes. The role involves creating high-performance analog and mixed-signal IPs, optimizing circuits for various objectives, and collaborating with cross-functional teams. Requires expertise in high-speed IO circuits and analog circuit design, with a strong foundation in CMOS design principles.

Student role focused on IT operations and DevOps, involving ticket resolution, scripting (PowerShell), automation tool development, server management, and CI/CD processes within an enterprise environment. The role progresses from operational tasks to development projects.

Program Manager for Foundry Quality and Reliability Team, focusing on measuring and reporting Fab quality, implementing improvement programs, supporting Quality Meetings and Teams, acting as Site Auditor for ISO9K/IATF Cert and internal audits, driving proactive quality culture and improving quality systems in semiconductor manufacturing. Role involves leading initiatives aligned with Intel's Foundry Quality Pyramid, identifying risks, preventing excursions, implementing fixes, supporting QMS elements for new technology certification, and continuous improvement of quality metrics and systems.

This role focuses on the physical design and timing analysis of System-on-Chips (SoCs), ensuring optimal performance, power, and functionality. Responsibilities include timing analysis, constraint generation, violation fixing, clock network design, and methodology development for timing models. The role collaborates with various teams to deliver efficient chip integration and validate clock network guidelines.

Process and Equipment Module Engineer at Intel in Malaysia, focusing on high-volume manufacturing equipment and processes for integrated circuits, including die attach and thermal compress bonding. Responsibilities include testing, modification, continuous improvement, and technology transfer.

Logic Design Engineer at Intel in Bangalore, India. This role involves contributing to technological advancements, solving complex problems, and collaborating with cross-functional teams. Responsibilities include applying technical skills to projects, analyzing and troubleshooting issues, conducting research, and preparing reports. Requires a Bachelor's degree in a technical field or equivalent experience, with proficiency in relevant software, tools, or systems. Preferred qualifications include a Master's degree, experience in collaborative projects, and strong communication skills.

Lead the design analysis and methodologies for memory blocks and data path subsystems in Intel's latest CPUs, focusing on high frequency (over 5GHz) and low-power digital designs.

Intern role contributing to the design, development, and validation of system software across various layers of the software stack, including firmware, drivers, operating systems, and middleware, to enable Intel platforms and technologies. Focuses on cross-stack software optimization and reference platform development.

The Capital Accounting Analyst supports the execution of critical Close and Reporting activities for Intel's Property, Plant, and Equipment (PPE) accounting, contributing to the accuracy and integrity of Intel's financial statements. This role serves as a key point of contact for multiple partners, including Internal and External Audit, Consolidations, SOX, and Capital Finance.

Mixed Signal Design Verification Engineer responsible for ensuring the functionality and performance of mixed signal logic components using System Verilog, UVM, and Verilog, developing test plans and environments, and debugging issues in the presilicon environment.

Intel is seeking a Security Software Development Engineer to validate TDX (Trusted Domain Extensions), a technology for confidential computing and virtualization. The role involves building frameworks and automation for validation across firmware, OS, drivers, middleware, SDKs, and applications. Requires 3-5 years of software/hardware validation experience and C/C++ coding proficiency. Preferred knowledge includes OS/virtualization pre/post-silicon validation and Specman/System Verilog.

This role is for an EHS Engineer focused on industrial hygiene and safety programs within semiconductor manufacturing. Responsibilities include risk assessments, exposure monitoring, safety reviews for equipment installation, contractor safety management, incident investigations, and EHS audits. The role requires foundational knowledge of occupational health and safety principles, with experience in brownfield projects and semiconductor industries being advantageous.

Design Verification Engineer at Intel responsible for functional verification of IP logic, developing verification plans, test benches, and simulation environments. The role involves executing verification plans, debugging issues, collaborating with design teams, and maintaining verification infrastructure.

This role is for a CPU Validation Engineer at Intel, focusing on post-silicon validation of next-generation processor designs. Responsibilities include validating logic and architectural features, developing test plans and content, practicing software development and QA processes, driving performance improvements, and debugging silicon bugs. The role requires a Bachelor's degree in a related field, proficiency in Python and scripting, and strong knowledge of CPU architecture and validation processes.

Develops logic design, RTL coding, and simulation for mixed signal and/or high-speed IPs for integration in full chip designs. Participates in architecture and microarchitecture definition, applies strategies for mixed signal designs including analog behavior modeling and circuit simulation, writes RTL, and optimizes mixed signal logic to meet power, performance, area, and timing goals. Reviews verification plans, implements corrective measures for failing RTL tests, and supports SoC customers for IP block integration.

IT Support Specialist serving as a technical team lead and subject matter expert for Microsoft Teams, Teams Rooms (MTR), Audio/Visual, and Telephony services. Provides Level 4 operational and escalation support, leads shift-based operations in a global 24x7 environment, and acts as the primary escalation point for complex issues. Supports business critical meetings and enterprise collaboration services with an emphasis on proactive issue prevention, problem management, and operational excellence.

Develops firmware for memory subsystems, focusing on initialization, training, and calibration algorithms, ensuring adherence to JEDEC standards and memory design specifications. Collaborates with hardware and RTL design teams.

Internship role focused on power integrity challenges in client platform development, requiring electrical engineering fundamentals and experience with simulation tools.

Seeking a Formal Verification Engineer to join the US CPU verification team, focusing on the development of next-generation CPUs for AI applications. Responsibilities include writing verification test plans, developing pre-silicon verification collateral, technical ownership of formal verification for microarchitecture blocks, ROI analysis, and debugging.

Seeking a Learning and Development Specialist to enhance manufacturing workforce training, focusing on skill gap assessment, training design, facilitation, and continuous improvement within Intel Foundry.

This role is for a Senior CPU Physical Design Engineer responsible for the physical design implementation of custom CPU designs from RTL to GDS, including synthesis, place and route, clock tree synthesis, static timing analysis, and power/clock distribution. The engineer will also conduct verification and signoff, analyze results to improve microarchitectures, and work with EDA vendors to enhance tool capabilities. The role is critical to the development of next-generation CPUs designed to power the AI revolution.

This role is for a CPU Physical Design Engineer responsible for the physical design implementation of custom CPU designs from RTL to GDS, including synthesis, place and route, static timing analysis, and power/clock distribution. The engineer will also perform verification and signoff, analyze results to improve microarchitectures, and work with EDA vendors to enhance tool capabilities. The role requires expertise in VLSI circuit design, static timing analysis, and low power design, with a focus on developing CPUs for the AI revolution.

This role focuses on leading the design and development of advanced manufacturing processes for Intel's wafer assembly technology development. It involves building strategies for space, factory positioning, and capacity, developing manufacturability requirements, conducting simulations, partnering with suppliers, and identifying modifications to improve production efficiency. The role also includes monitoring industrial trends, creating technical documentation, and performing pathfinding activities for future device designs.

Product Manager for Intel's Ethernet Networking IPU products, focusing on definition, development, and lifecycle management. Requires technical background, market insight, and ability to translate customer needs into product requirements. Responsibilities include collecting requirements, documenting specifications, managing customer samples, defining pricing, conducting market research, and creating customer-facing collaterals. Requires collaboration with engineering, marketing, and sales teams.

Module Development Engineer at Intel focused on advancing semiconductor manufacturing technologies through process and device architecture development, collaborating with suppliers, and optimizing production efficiency.

This role is for a GPU Design Verification Engineer at Intel. The engineer will be responsible for defining, developing, and performing functional validation for GPUs, ensuring interaction with media, display, and system-level features. They will apply hardware and software tools to meet performance, power, and area goals, review design changes, develop validation methodologies, and perform silicon debug. The role also involves developing post-silicon validation infrastructure and collaborating with various teams to improve debug and validation strategies. A Bachelor's degree in electrical/computer engineering with 7 years of experience or a Master's with 5 years is required, with experience in SystemVerilog, OVM/UVM, scoreboards, test plans, and CPU/GPU architecture.

Internship role focused on power and thermal management within client platform development at Intel. Responsibilities include developing automation scripts, data analysis, contributing to power management models, and researching emerging technologies. Requires enrollment in a relevant degree program and basic coding/lab experience.

Electrical Validation Intern for Client IO at Intel, focusing on validating high-speed and low-speed silicon interfaces. Responsibilities include hardware bring-up, lab testing with professional equipment, data analysis, and developing automation frameworks for electrical validation. Requires coursework in Electrical Engineering and programming skills in Python or C++.

CPU Design Verification Engineer responsible for verifying and validating high-performance, power-efficient processors. Develops and executes verification plans, creates UVM-based testbenches, performs functional coverage analysis, and debugs pre-silicon environments. Collaborates with architects and designers, and enhances verification infrastructure.

Develops and optimizes semiconductor packaging technologies, focusing on First Level Interconnect (FLI) and collaborating with cross-functional teams to improve assembly processes, scale advanced capabilities, and lead equipment development. Requires a Master's or PhD in a relevant engineering field with experience in programming/scripting (Python, MATLAB) with AI/ML concepts.

Supply Chain Planning Analyst role at Intel, focusing on optimizing supply chain operations, integrating planning schedules, forecasts, and inventory strategies with customer requirements. The role involves scenario planning, analyzing supply vs. demand, collaborating with cross-functional teams, and driving continuous process improvement. Requires a Bachelor's degree in a related field and 3+ years of experience in supply chain or planning.

This role is for a Supply Chain Planning Analyst at Intel, focusing on optimizing global supply chain operations, including schedules, forecasts, materials, and capacity requirements. The analyst will conduct 'what-if' scenario planning, analyze inventory challenges, and provide inputs to demand management. The role requires a Bachelor's degree in a related field and 2+ years of experience in semiconductor supply chain complexities.

This role is a Finance Lead for Intel's Foundry Capital team, focusing on near- and long-term capital forecasts, capacity planning, and profitability. It involves close collaboration with senior leadership and cross-functional teams to drive financial strategies and capital authorizations.

Internship role focused on designing, developing, validating, and debugging embedded software solutions for Intel's hardware. Responsibilities include system-level modeling, algorithm development, hardware-software integration, and bug analysis in constrained environments.

Entry Level Analog Layout Engineer to support analog and mixed signal IP development. Responsibilities include custom layout implementation and physical verification tasks for analog blocks used in SoC and IP designs.

Firmware Development Engineer role focused on creating foundational software that interfaces directly with hardware components, including microcode, IP-specific firmware, FPGA, and DSPs. Responsibilities include design, implementation, testing, and validation of these interfaces. Requires C and System Software experience, with preferred experience in C++, Rust, System C, Python, and knowledge of embedded systems and SoC architecture.

This is an ASIC Design Automation Engineering Intern role focused on developing and enhancing automation scripts and tools for front-end RTL design and verification processes in the semiconductor industry. The role involves debugging, problem-solving, and collaborating with design teams, utilizing scripting languages and industry-standard EDA tools.

Intern role responsible for verifying architectural functional blocks of IP or SOC, including creating test cases and test benches using UVM methodology. Develop pre-silicon validation tests to ensure systems meet design requirements. Perform RTL and GLS simulation, create RTL validation test plans, run system simulations, and resolve failed tests. Build infrastructure for regressions and volume validation. Document test plans across platforms (IP library, Complex-IPs, Subsystems). Contribute to verification methodology and infrastructure. Adopt and implement industry-standard verification tools and methodologies (Formal, Low Power, Performance, Co-Simulation).

This role is for an ASIC Design Emulation Engineer focused on next-generation System-on-Chip (SoC) technologies. The engineer will work on verification processes using industry-leading EDA tools and methodologies to simulate and validate designs against ASIC specifications. The position requires a student pursuing a Bachelor's degree in Electrical or Computer Engineering with a foundation in digital design verification, HVL languages, programming languages, scripting, and EDA simulation tools.

GPU Software Development Engineer focused on performance optimization of 3D games and applications on Linux, involving driver and shader compiler work. Responsibilities include designing, developing, and validating software for Intel GPUs, implementing and optimizing graphics driver features, analyzing performance, and developing internal tools for profiling and debugging.

Develops mixed signal logic design and RTL coding for high-speed IP blocks, focusing on optimizing power, performance, area, and timing. Responsibilities include static timing analysis, collaborating with SoC architects, and supporting integration into complex SoC designs.

Intel is seeking a Pre-Silicon Validation Engineer with 7+ years of experience to join their Central Engineering Group in Bangalore, India. The role involves defining and executing verification plans, developing test benches, and debugging complex SoC designs using SystemVerilog and UVM. The engineer will collaborate with cross-functional teams to ensure high-quality SoC delivery and contribute to Intel's next-generation products.

This role focuses on Pre-Silicon Validation Engineer for SoC designs at Intel. Responsibilities include defining and developing verification plans, test benches, and environments using SystemVerilog and UVM. The engineer will execute verification plans, debug issues in the presilicon environment, collaborate with cross-functional teams, and incorporate security validation. The role requires strong debugging capabilities for SoC, fabric, and memory subsystems, and knowledge of microarchitecture and computer architecture.