Intel
Building- HQ
- Santa Clara, US
- Founded
- 1968
- Size
- 120,000+
- Website
- intel.com
Currently tracking 64 active AI roles, up 216% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $122k–$414k (avg $253k).
Hiring
64 / 66
Momentum (4w)
↑+356 +216%
521 opens last 4w · 165 prior 4w
Salary range · avg $253k
$122k–$414k
USD · disclosed roles only
Tracked since
Feb 3
last role yesterday
Hiring velocityscroll left for older weeks
Jobs (734)
| Title | Stage | AI score |
|---|---|---|
| FTM Portland Community College Quick Start Semiconductor Training Program This role is for an entry-level Module Equipment Technician in semiconductor manufacturing. Responsibilities include operating, maintaining, repairing, and troubleshooting specialized processing equipment in a clean room environment, collecting data, and optimizing equipment and processes. The role requires physical stamina and adherence to clean room protocols. A high school diploma and completion of a specific training program are required. | — | 0 |
| IP Functional Validation Engineer This role is for an IP Functional Validation Engineer responsible for functional validation in pre-silicon or post-silicon environments. The engineer will understand architecture specifications, develop test plans, create infrastructure and automation, perform debugging, and work with stakeholders. Experience with High Speed IO (PCIE) and scripting languages like Python or C/C++ is required. | — | 0 |
| Global Training Engineer Intern This is an intern role focused on developing and delivering technical training programs for a manufacturing environment at Intel. The role involves assessing skill gaps, designing and delivering training using various methods, managing an LMS, and measuring training effectiveness. While AI is mentioned as a potential advantage, it is not the core focus of the role. | — | 0 |
| FW PAE Intern Internship role focused on developing, validating, and debugging embedded software and firmware for Intel's technology platforms, involving system-level challenges and collaboration with engineers. Responsibilities include assisting in design, debugging, validation, code reviews, and scripting. | — | 0 |
| Senior Logic Design Verification Engineer Senior Logic Design Verification Engineer responsible for developing verification testbenches, RTL models, and test content for power management controller IPs. The role involves validating new architectural features, debugging RTL tests, and collaborating with cross-organizational partners. Requires at least 8 years of experience with UVM and System Verilog. | — | 0 |
| Supply Chain Planning Analyst This role focuses on optimizing supply chain planning, including schedules, forecasts, materials, and capacity requirements. It involves data-driven decision-making, scenario planning, and continuous process improvement using LEAN methodologies. The analyst will also manage new product planning readiness and address execution issues to ensure smooth factory operations. | — | 0 |
| PDK LVS Development Engineer Develop and maintain Process Design Kits (PDKs) for semiconductor manufacturing, focusing on physical verification runsets (DRC/LVS/PERC) using EDA tools like Calibre/ICV/Pegasus. This role involves scripting, collaboration with technology and EDA partners, and ensuring the quality and operability of PDK collaterals for Intel's product design teams. | — | 0 |
| Senior Technical Solutions Engineer - Advanced Packaging This role is for a Senior Technical Solutions Engineer focused on Advanced Packaging technologies within Intel Foundry. The primary responsibility is to serve as the main customer interface, providing technical consultation on packaging solutions, managing the customer engagement lifecycle, and collaborating with internal teams to ensure customer success. While the role supports the 'AI era' by enabling advanced packaging for AI chips, it does not directly involve building or researching AI models. | — | 0 |
| Head of Government Affairs - Intel Costa Rica This role is for a Head of Government Affairs in Costa Rica, responsible for developing and implementing legislative, regulatory, and policy advocacy strategies for Intel. The position involves building relationships with government entities, representing Intel in high-level meetings, monitoring policy environments, and managing external advocacy efforts. The ideal candidate will have extensive experience in government affairs and stakeholder management. | — | 0 |
| Silicon Packaging Design Engineer This role focuses on the physical design and layout of silicon packaging, including substrate design, routing, and optimization for performance, cost, and manufacturability. It involves collaboration with silicon and hardware teams and requires experience with specific package design tools and microelectronic package physical layout. | — | 0 |
| Wafer Packaging Manufacturing US/EUR Sort Leader Lead Wafer Packaging Manufacturing (WPM) Sort factories in the US and Europe regions, responsible for E-Test, Wafer Sort, and Die Sort. Manage a team of managers, engineers, and technicians, driving continuous improvement in safety, quality, output, and cost. Ensure compliance with safety and environmental regulations, meet quality goals, and own output commits. Lead technical problem-solving and implement root cause solutions for process and tool issues. Manage process transfers and maintain process synchronization across Sort floors. | — | 0 |
| Analog Design Engineer Analog Circuit Design Engineer responsible for designing, developing, and optimizing analog and mixed-signal circuits in advanced process nodes, contributing to Intel's IP solutions and shaping the future of computing and communication systems. | — | 0 |
| WiFi System Integration Team Lead Lead a system integration team for Intel's WiFi products, focusing on delivering best-in-class wireless performance, defining and driving system POCs, and integrating new features and hardware. The role involves leading and mentoring engineers, enhancing integration capabilities, and driving group targets, with an emphasis on using automation and AI-based capabilities to improve efficiency. | — | 0 |
| Module Engineer Module Engineer responsible for critical high volume manufacturing equipment and processes in semiconductor manufacturing, focusing on efficiency, yield, and technology transfer. This role involves testing, modification, maintenance, and continuous improvement of equipment and processes to meet safety, quality, and cost goals. | — | 0 |
| Senior Equipment Spare Program Manager This role focuses on managing equipment spare parts for Intel's manufacturing operations, ensuring readiness for New Product Introduction (NPI) and High-Volume Manufacturing (HVM). It involves supply chain optimization, inventory management, cost efficiency, supplier coordination, and risk assessment for bills of materials. The position requires collaboration with engineering, project management, and manufacturing teams to align material requirements with program goals and ensure on-time delivery and operational efficiency. | — | 0 |
| Design Engineer Design Engineer at Intel responsible for microarchitecture and design of soft IP cores for Intel’s next generation chips (including SOCs). Requires relevant ASIC design/validation experience in front end processes including RTL development, functional and performance verification. Expertise in verilog and system verilog based logic design, design quality check tools, and potentially PCI_Express or AMBA standards. Knowledge of AI tools like Github Copilot is mentioned. | — | 0 |
| Graduate Talent (Payroll Specialist) This role is responsible for preparing and processing payroll, managing employee master data, ensuring accurate payments and benefits, and maintaining payroll records. It involves collaborating with finance, legal, and tax departments, conducting audits, and ensuring compliance with internal policies and external government requirements. The role also focuses on process improvement and championing lean methodologies. | — | 0 |
| GPU Validation Engineer This role is for a GPU Design Verification Engineer at Intel, focusing on ensuring the quality of advanced graphics solutions, including those for AI-based graphics products. The engineer will perform functional verification, develop test benches, debug issues, and collaborate with cross-functional teams to meet functional, performance, and power goals. The role requires a Bachelor's or Master's degree with significant experience in silicon design development, validation methodologies, and simulation/emulation debugging, along with proficiency in C/C++/Python and SystemVerilog. | — | 0 |
| Analytical Chemistry Lab Technician - Shift 7 Seeking an analytical chemist with ICPMS experience for trace metal analysis in a clean room laboratory. Responsibilities include sample preparation, analysis, maintenance of lab equipment, and ensuring compliance with standard procedures. The role supports manufacturing operations and requires strong organizational and troubleshooting skills. | — | 0 |
| GPU Software Development Engineer Software Engineer role focused on developing and maintaining tools for Intel Graphics hardware specifications, including structured content creation, consumption, validation, and code generation. The role involves full-stack web development (.NET, ASP.NET, SQL Server), Windows services, REST APIs, and integration with development infrastructure. A key aspect is leveraging AI-assisted development tools to enhance productivity. | — | 0 |
| Process Integration and Development Engineer Process Integration and Development Engineer at Intel, focusing on developing cutting-edge semiconductor process technologies. Responsibilities include feasibility studies, experiment design, material/equipment selection, and ensuring product quality and reliability. Requires a Ph.D. in a related field and experience with semiconductor fabrication and reliability. | — | 0 |
| Strategic Sales Application Engineer - Windows Platform This role is for a Strategic Sales Application Engineer focused on the Windows platform at Intel. It involves aligning silicon architecture with Microsoft's requirements, driving ecosystem enablement for next-generation PCs, and acting as a bridge between Microsoft and Intel's engineering teams to grow Intel's PC business. The role requires strong communication, influence, and strategic thinking skills, with a focus on translating technical details into business impact. | — | 0 |
| IP Design Verification Engineer Intel is seeking an IP Design Verification Engineer to join their Devices Development Group. The role involves researching, designing, developing, and testing Client SOCs, focusing on pre-silicon IP design verification. Responsibilities include validating IP/features, creating validation plans and tests, debugging failures, developing and utilizing validation tools, and engaging with IP providers. Minimum qualifications include a BS/MS in CS/CE/EE with 1-2 years of experience in IP/SoC development, verification, or integration using Verilog/SystemVerilog and OVM/UVM, along with experience in writing validation plans and object-oriented programming. | — | 0 |
| Intel Process Integration Engineer - (BE) This role focuses on developing and optimizing integrated process flows for interconnect modules in semiconductor manufacturing. Responsibilities include coordinating with various engineering teams, optimizing RC performance, establishing process windows, identifying and reducing yield loss mechanisms, performing root cause analysis, implementing control plans, ensuring reliability margins, and supporting technology transfer from R&D to high-volume manufacturing. The role requires a PhD in a relevant engineering or science field and experience in semiconductor fabrication or characterization. | — | 0 |
| Intel Process Integration Engineer - (FE) Process Integration Engineer at Intel, focusing on developing integrated front-end process flows for new technology nodes, analyzing yield loss, and optimizing device performance. Requires a PhD in a relevant engineering or science field and experience in semiconductor fabrication or device characterization. | — | 0 |
| Infrastructure and DevOps Engineer Infrastructure and DevOps Engineer responsible for designing, deploying, and maintaining scalable infrastructure systems, building and optimizing CI/CD pipelines, and collaborating with development teams to implement technical solutions. Requires expertise in automation tools, DevOps methodologies, and Windows Server administration. | — | 0 |
| Accountant Accountant role at Intel focusing on preparing and maintaining financial records, managing audits, preparing internal and regulatory financial reports, developing finance policies, defining accounting system roadmaps, validating month-end accounts, and coordinating with statutory auditors. Requires a Bachelor's degree or Professional Degree in Accountancy, a Professional Accounting Qualification (CA/ACCA/CPA), and a minimum of 5 years of experience in a global organization. External auditor experience or knowledge of SAP S4 is preferred. | — | 0 |
| Software Development Engineer Software Development Engineer role focused on designing, developing, and testing cloud-native applications and microservices with a strong emphasis on security best practices and automated testing within a government programs context. Requires experience with Azure cloud solutions, APIs, and container technologies. | — | 0 |
| Trainee Manufacturing Technician Trainee Manufacturing Technician role at Intel Ireland supporting wafer manufacturing operations in a semiconductor environment. Responsibilities include equipment operation, maintenance, troubleshooting, and following procedures, with a focus on developing technical skills through structured training. | — | 0 |
| Analog Post-Si Engineer Executes functional validation and performance characterization for on-chip power delivery IP, identifies and resolves power delivery issues, and partners with cross-functional engineering teams to drive design optimization. | — | 0 |
| Source To Pay Solutions - Senior Lead This role is for a Senior Lead in Source To Pay Solutions, focusing on Supply Chain IT systems, SAP procurement modules, and end-to-end business process design. The candidate will lead FIT/GAP analysis, design and implement solutions in SAP MM and Inventory Management, and support SAP Ariba modules. Experience with SAP ECC/S4, Ariba, EDI standards, and procurement processes is required. Knowledge of newer SAP technologies like BTP, SAP Core AI, SAP Build, Agentic, CAP, and Fiori/UI5 is preferred. | — | 0 |
| Middleware Development Engineer Develops the offloading runtime (liboffload) for heterogeneous compute (GPUs and CPUs) within the LLVM ecosystem, bridging languages like SYCL and OpenMP to driver-level backends. Responsibilities include API design, backend implementation, upstream LLVM contributions, and community engagement. | — | 0 |
| Silicon Packaging Design Engineer This role focuses on the physical layout design of Intel's silicon for packaging technology, involving optimization for performance, reliability, and manufacturability. It requires developing custom layouts, performing detailed planning and routing, verifying standard cell libraries, and executing layout verification processes. The engineer will use EDA tools, troubleshoot design issues, and collaborate with cross-functional teams to ensure seamless execution of silicon tape-in, driving innovative layout methodologies. | — | 0 |
| Design Verification Eng Graduate Intern This is an internship role for a Design Verification Engineer focused on verifying the functional logic of silicon designs, ensuring alignment with architecture specifications. Responsibilities include developing verification plans, test benches, and environments, performing emulation and simulation, and debugging design issues. The role requires proficiency in SystemVerilog/Verilog and understanding of verification methodologies like OVM/UVM. | — | 0 |
| GPU Software Development Engineer GPU Software Development Engineer focused on validation and debug of graphics IP, integrating features, triaging failures, and developing debug tools. The role involves scaling across display, media, 3D, compute, and power conservation components, and enabling features for AI domains to improve performance on graphics products. Requires strong analytical and problem-solving skills, with experience in C, C++, Python, and graphics/GPU hardware/software. | — | 0 |
| Senior CPU Power Delivery Engineer Senior CPU Power Delivery Engineer role at Intel, focusing on the design, verification, and integration of power delivery networks for next-generation CPUs. Requires expertise in VLSI, physical design, and power delivery analysis tools. | — | 0 |
| Network Systems and Solutions Engineer This role focuses on providing technical support and engineering solutions for Intel's programmable Infrastructure Processing Units (IPUs) to customers, involving hardware and software integration, system bring-up, driver configuration, and use case testing. The engineer will also develop technical collateral, evaluate tools, and analyze customer feedback to drive product improvements. | — | 0 |
| CPU Formal Verification Engineer Intel is seeking a Formal Verification Engineer to ensure the reliability and functionality of their IP and SoC microarchitectures. This role involves using advanced formal verification tools and methodologies, developing test and coverage plans, creating abstraction models, and developing formal proofs. The engineer will collaborate with architects, RTL developers, and physical design teams, and maintain the verification infrastructure. | — | 0 |
| Density Fill PDK Development Engineer Develops and debugs Fill components of Process Design Kits (PDKs) using EDA tools like Calibre, ICV, and Pegasus to address density deficiencies and ensure manufacturability compliance. Automates workflows and collaborates with cross-functional teams and external vendors. | — | 0 |
| Latin America Payroll Processor This role focuses on processing payroll computations, maintaining payroll records, and supporting automation initiatives using tools like Excel macros and RPA. It involves ensuring accuracy, handling employee inquiries, and collaborating on operational improvements within a payroll team. | — | 0 |
| Corporate Accounting Mergers Acquisitions Specialist Corporate Accounting Mergers Acquisitions Specialist at Intel, focusing on financial integration/disintegration, technical accounting research, and project management for M&A activities. Requires CPA and experience in public accounting or valuation. | — | 0 |
| SoC Pre-Silicon Verification Engineer This role focuses on the pre-silicon functional logic verification of an integrated SoC to ensure it meets specifications. Responsibilities include defining and developing verification plans, test benches, and environments, executing these plans through emulation and system simulation, debugging issues, and collaborating with various design teams. The role also involves incorporating security verification and improving the verification infrastructure. | — | 0 |
| SoC Design Verification Engineer - Emulation This role focuses on SoC Design Verification using Emulation, involving building emulation targets, supporting new features/IPs, debugging failures, developing validation tools, and performing system-level validation tasks. It requires experience with technical specs, RTL code, and building emulation models for large-scale SoCs. | — | 0 |
| Technology Development Quality and Reliability Engineer Engineer in Technology Development Quality and Reliability Engineering group focusing on research and technology development for semiconductor devices and processes. Responsible for developing solutions and design rules to mitigate plasma induced process charging, designing test structures, running experiments, analyzing data, and serving as a consultant to design teams. | — | 0 |
| APTM NPI Integration Seeking an NPI Integration Engineer to manage the development and execution of new product introductions and process transfers across factories, ensuring technology and products meet certification requirements before transferring to High Volume Manufacturing (HVM). Responsibilities include logistical coordination, acting as a primary information interface, tracking collateral, managing silicon progress, and developing new NPI systems and business processes. | — | 0 |
| Systems and Solutions Engineer This role focuses on product lifecycle management, workflow definition, requirements analysis, solution design, and program planning within the context of processor platforms. It involves cross-functional collaboration and continuous improvement of engineering processes. | — | 0 |
| Foveros Direct Pathfinding Integration This role focuses on the design, development, and qualification of advanced semiconductor packaging solutions and materials. It involves managing the entire packaging development process, from artwork to manufacturing startup, and consulting with cross-functional partners on various aspects of product launch and supply chain. The role requires a strong background in engineering principles, materials science, and semiconductor packaging, with experience in qualification testing and specification documentation. | — | 0 |
| MDCE BEOL Integration Engineer This role focuses on process engineering and yield optimization within semiconductor manufacturing, specifically in the BEOL integration for Intel's advanced technology nodes. The engineer will work on identifying root causes of yield/performance issues, implementing corrective actions, and collaborating with various teams to ensure successful product introduction and continuous improvement. | — | 0 |
| Senior Compiler Engineer Senior Compiler Engineer at Intel responsible for the development, enhancement, and maintenance of Intel C/C++/DPC++ and Fortran Compilers, with a focus on performance optimization for CPU platforms. The role involves feature development, defect resolution, performance analysis, and collaboration with hardware design teams and open-source communities. | — | 0 |
| Emulation Engineer This role focuses on building and optimizing emulation and FPGA models for Intel's silicon prototyping and validation efforts. The engineer will work on translating RTL designs into working prototypes, developing hardware/software collateral, and improving emulation usability and efficiency to accelerate the development process for chipsets. The role involves collaboration with design, validation, and software teams to enable pre-silicon verification and software development. | — | 0 |