NVIDIA currently has 496 active AI-related job listings. The majority of these roles, 52%, are focused on serving infrastructure, with agents representing another significant segment at 23%. Engineering is the dominant function, with 441 positions. The United States leads hiring geographies with 287 roles, followed by China with 64. Frequent tech tags include model_serving, inference_infra, and agent_orchestration, suggesting a focus on deployment and management of AI models. Over the last 30 days, NVIDIA posted 214 new AI roles, a 27% decrease compared to the previous 30-day period.
NVIDIA currently has 487 active AI-related roles in our index. The most common open titles are: Deep Learning Performance Architect (4), Senior Deep Learning Performance Architect (4), AI Research Scientist (3), Developer Technology Engineer - AI (3), Manager, Deep Learning Algorithms (3). Most positions are in Engineering and Research.
NVIDIA's active AI hiring is concentrated in: serving infrastructure (54%), agents (21%), application (8%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
NVIDIA is hiring AI talent in: United States (286 roles), China (59 roles), Israel (50 roles), Germany (21 roles).
Job postings at NVIDIA most frequently reference: model serving, inference infra, agent orchestration, llm observability, multimodal.
In the past 30 days, NVIDIA has posted 110 new AI-related roles. That is a -50% change versus the prior 30 days (218 → 110).
Currently tracking 440 active AI roles, down 50% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $100k–$575k (avg $262k).
| Title | Stage | AI score |
|---|---|---|
| Senior High Speed Electro Optics Engineer NVIDIA is seeking a Senior High Speed Electro Optics Engineer to develop, test, and characterize Silicon Photonics based high-speed optical communication devices for data centers. The role involves hands-on experimental lab work, including the bring-up of new switches and transceivers, and characterization of electro-optical components and subsystems. | — | 0 |
| Senior Chip Architect NVIDIA is seeking a Senior Chip Architect to define the Network Adapter chip architecture from market requirements through design and all product life cycles. This role involves collaboration with various engineering teams, research and analysis for future architectures, and crafting product design specifications. | — | 0 |
| Senior Mask Design Engineer - Hardware Senior Mask Design Engineer for high-speed mixed-signal circuit designs using Cadence tools in sub-micron CMOS technologies. Responsibilities include physical layout, cross-functional collaboration, and verification against design rules and schematics. Requires BSEE or equivalent, 7+ years of experience, deep understanding of analog circuit layout, proficiency with Cadence virtuoso, verification tools (Dracula, Hercules, Calibre), scripting languages (perl, python, skill), and DRC/LVS flows. |
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| Senior ASIC Verification engineer Senior ASIC Verification Engineer for NVIDIA's next-generation GPU and SOC IPs, focusing on High-Speed Test Access Mechanism (TAM) verification for various testing stages and silicon lifecycle management. | — | 0 |
| Senior Chip Design Verification Engineer Senior Chip Design Verification Engineer at NVIDIA, focusing on developing and verifying high-speed communication devices and networking/GPU networking chips. Requires 5+ years of ASIC verification experience. | — | 0 |
| Software Security Researcher NVIDIA is seeking a Senior Security Researcher to enhance the security posture of its networking products. The role involves offensive security research, threat modeling, defining security standards, and providing security architecture recommendations. The ideal candidate will have a strong background in security research, applied cryptography, and common attack vectors, with the ability to work independently and collaboratively. | — | 0 |
| Senior Firmware PHY Verification Engineer Senior Firmware PHY Verification Engineer for NVIDIA's FW PHY verification group, focusing on networking features and verification infrastructure for NVIDIA products. | — | 0 |
| Senior DFT Verification Engineer NVIDIA is seeking a Senior Chip Design Verification Engineer to develop and verify next-generation DFT technologies for their Switches, Nic, and SoC product lines. The role involves creating verification environments, test plans, and collaborating with cross-functional teams to ensure design correctness. | — | 0 |
| System Design Power Validation Engineer NVIDIA is seeking a Power Validation Engineer in Taipei to perform board/system power qualification and function testing for various NVIDIA platforms including Data Center, Graphics, ARM, and Autonomous Driving. The role involves DC-DC power signal measurement, power testing, debugging, compensation tuning, and system functionality testing, with collaboration with hardware design and mechanical/thermal engineers. | — | 0 |
| Senior Software Engineer – Distributed Test Platform Senior Software Engineer role focused on building and improving distributed test platforms and microservices for validating chip designs at NVIDIA. The role involves enhancing system performance, reliability, and throughput, and developing interfaces for engineering users. Requires strong software engineering skills in Python, OOP, distributed systems, and Kubernetes. | — | 0 |
| Senior I/O Specifications Architect This role focuses on architecting and developing chip requirements for industry-standard I/O interfaces (PCIe, CXL, UCIe), engaging with standards bodies, and collaborating with internal teams to define interconnect strategies for future AI and graphics systems. It requires deep knowledge of I/O technologies and system architecture. | — | 0 |
| Senior Mixed Signal Design Engineer NVIDIA is seeking a Senior Mixed Signal Design Engineer to lead the design of CMOS high-speed interface circuits and mixed-signal circuits, including hands-on experience in silicon validation, debugging, characterization, and bring-up. The role involves designing high-speed transceivers and PLLs, simulating and verifying mixed-signal circuits, and working with multi-functional teams through implementation and productization. | — | 0 |
| Senior System Software Engineer, OpenBMC Senior System Software Engineer role at NVIDIA focusing on OpenBMC firmware development for server platforms. Responsibilities include implementing Unified Firmware architecture, system management software, BMC firmware bring-up, performance analysis, and ensuring code quality and security. Requires extensive experience in BMC firmware, system management, and programming languages like C/C++, Bash, Python, and Go. | — | 0 |
| Senior System Software Engineer, CUDA - Tegra NVIDIA is seeking an experienced software engineer to contribute to the CUDA driver and runtime, a core component of NVIDIA's CUDA parallel computing platform. The role involves building and maintaining features, contributing to the full SDLC, writing production-level code, and collaborating with hardware teams on next-generation GPUs. Requires a BS/MS in CS or equivalent experience, strong C/C++ skills, OS fundamentals, and debugging abilities. | — | 0 |
| Senior Verification Engineer - HSIO Cluster and SOC Senior Verification Engineer role focused on HSIO IP cluster and SOC level verification for automotive chips. Responsibilities include developing verification components, architecting testbenches, defining test plans, building verification infrastructure, and ensuring verification closure for high-speed I/O IPs like USB, UFS, Ethernet, and MACSEC. Requires experience with SV, UVM, and high-speed IO verification. | — | 0 |
| System Software Engineer, GPU Development Tools System Software Engineer role at NVIDIA focused on developing core infrastructure for modeling, analyzing, and debugging large-scale GPU development. The role involves working at the interface of software drivers and GPU simulation, enabling functional and performance testing, and improving daily workflows for chip modelers and designers. Requires strong C++ programming and understanding of software driver stacks. | — | 0 |
| Senior Post Silicon HSIO Bringup Lead NVIDIA is seeking a Senior Post Silicon HSIO Bringup Lead to own the post-silicon validation and support new hardware bring-up for HSIO interfaces (PCIe, CXL, NVLink) on GPU accelerated computing platforms. The role involves test plan development, automation, bug resolution, and influencing pre-silicon methodologies. Requires extensive experience in HSIO protocols, lab instruments, and post-silicon bring-up. | — | 0 |
| Senior Verification Engineer - HSIO Cluster and SOC Senior Verification Engineer responsible for HSIO IP's cluster and SOCV level verification, developing verification components and APIs for complex rapid data transfer IO IPs and sub-systems. This includes architecting testbenches, defining test plans, building verification infrastructure, implementing functional coverage, and ensuring SOC level verification closure. | — | 0 |
| Senior Verification Engineer - ARM Fabric Unit Level Senior Verification Engineer for ARM Fabric Unit Level at NVIDIA, focusing on developing UVM-based verification test benches and methodologies for high-performance automotive chips. Responsibilities include architecting testbenches, defining test plans, implementing functional coverage, and collaborating with design and post-silicon teams. | — | 0 |
| Senior Verification Engineer - HSIO Unit Level Senior Verification Engineer at NVIDIA focusing on HSIO IP unit level verification for automotive chips. Responsibilities include developing UVM-based test benches, defining test plans, building verification components, implementing functional coverage, and coordinating verification closure. Requires BTech/MTech with 4+ years of experience in High Speed IO verification, SV, and UVM. Experience with AI tools for code development is a plus. | — | 0 |
| Senior ASIC Design Engineer, High Speed IO NVIDIA is seeking a Senior ASIC Design Engineer for High Speed IO IPs in Automotive chips. The role involves understanding protocols, making architectural trade-offs, implementing RTL, driving verification, closing timing, and supporting silicon validation for UFS/Ethernet/PCIE/USB IPs. | — | 0 |
| Senior Verification Engineer - Audio and Auxiliary CPU Sub-Systems Senior Verification Engineer role focused on Audio and Auxiliary CPU Sub-Systems for automotive chips. Responsibilities include developing UVM-based verification test benches, defining test plans, building verification components, implementing functional coverage, and collaborating with cross-functional teams. Requires experience in verification closure of complex units/sub-systems/SOCs, RISCV/ARM/DSP core experience, and SV/UVM methodologies. | — | 0 |
| Senior ASIC Design Engineer - NOC IP Senior ASIC Design Engineer at NVIDIA working on memory subsystem components for Graphics Processors. This role involves micro-architecture, RTL development, verification, and collaboration with various engineering teams throughout the ASIC design flow. | — | 0 |
| ASIC Design Engineer, BOOT, Functional Safety and Power Management ASIC Design Engineer role focused on BOOT, Functional Safety, and Power Management subsystems for Automotive and Client chips. Responsibilities include micro-architecture, RTL development, verification support, and collaboration with cross-functional teams. | — | 0 |
| SDK Eth Software Engineer, Networking Software Engineer role focused on developing and maintaining APIs, tools, and libraries for Ethernet switch SDKs, involving C programming, performance analysis, and optimization within NVIDIA's Networking Software Group. | — | 0 |
| Software Engineer, Soc DPU Platform Software Engineer role focused on low-level embedded Linux software, bootloaders, firmware, and hardware initialization for DPU platforms. Requires C/C++ experience, understanding of hardware-software interaction, and device drivers. | — | 0 |
| Senior Firmware Verification Engineer Senior Firmware Verification Engineer to join the Firmware team, developing networking features for AI, cloud, HPC and storage. Responsibilities include working closely with architecture and software/hardware design teams, developing verification tests for advanced features in a complex testing environment, and collaborating with multi-functional teams for debugging. | — | 0 |
| ASIC Verification Engineer - New College Grad 2026 NVIDIA is seeking an ASIC Verification Engineer to verify the Memory Management Unit for their GPUs. The role involves understanding design, developing verification infrastructure, implementing test plans, and collaborating with cross-functional teams. Requires a Bachelor's or Master's degree in EE/CS/CE, exposure to computer architecture, ASIC design/verification, and proficiency in SystemVerilog, C/C++, and constrained random testing. | — | 0 |
| Senior Systems Software Engineer, CUDA Driver NVIDIA is seeking a Senior Systems Software Engineer to work on the CUDA Driver, a core component of their platform for accelerating general-purpose computation on the GPU. The role involves designing, architecting, and implementing new features, coordinating development efforts, and defining improvements to CUDA APIs and the programming model. The ideal candidate will have strong C/C++ skills, experience with operating system interfaces, and a background in multithreaded programming. | — | 0 |
| Senior System Software Engineer - Autonomous Vehicles NVIDIA is seeking a Senior System Software Engineer to develop and bring their autonomous vehicle platform to market. The role involves working with experts in Deep Learning and Computer Vision to integrate and optimize software on NVIDIA's DRIVE platform, collaborate with internal and external teams, and provide technical support to customers. Requires strong C/C++ programming, system software/embedded systems experience, and OS fundamentals. | — | 0 |
| Senior Physical Design Engineer Senior Physical Design Engineer for NVIDIA's Networking Silicon engineering team, focusing on the physical design and implementation of SOC devices for networking markets. Responsibilities include chip floorplan, power/clock distribution, P&R, timing closure, and physical verification, working with advanced process nodes (5nm, 4nm, 3nm). | — | 0 |
| Senior ASIC Timing Engineer Senior ASIC Timing Design Engineer role focused on physical design and timing of high-frequency and low-power DPUs and SoCs. Responsibilities include analyzing and optimizing design constraints, synthesis parameters, and driving frontend and backend implementation from RTL to GDS2. Requires expertise in Static Timing Analysis (STA), timing constraints, ECO implementation, physical design optimization, logic synthesis, and proficiency in scripting languages. | — | 0 |
| Senior Manager, Software Verification NVIDIA is looking for a Senior Manager to lead software verification and automation for their DOCA Networking SDK. The role involves managing teams, defining testing methodologies, and ensuring product quality through hands-on involvement in test design and debugging. Requires strong technical skills in Python, C/C++, networking protocols, and experience with regression systems and embedded development. | — | 0 |
| Research Scientist, Circuits - PhD New College Grad 2026 Research Scientist role focused on advanced circuit design for post-Moore's Law era, optimizing processor computation and interconnect performance/power. Involves exploring, designing, and implementing circuit approaches in prototype systems, collaborating with internal and external researchers, and transferring technology to product groups. Requires a PhD or equivalent experience in Electrical Engineering or related fields with a strong background in circuit design and publication history. | — | 0 |
| Senior Developer Technology Engineer, CPU Performance Seeking a Senior Developer Technology Engineer to research and develop techniques for optimizing large-scale applications on NVIDIA's CPU platforms, focusing on data-intensive workloads and heterogeneous computing systems. The role involves in-depth analysis, performance optimization, publishing findings, and influencing future hardware/software design. | — | 0 |
| Senior Mixed Signal Design Engineer NVIDIA is seeking a Senior Mixed Signal Design Engineer to develop and implement high-speed interfaces and analog circuits for next-generation NVLINK. This role involves hands-on experience from concept to silicon characterization, including schematic design, layout, verification, and post-silicon debugging. The ideal candidate will have a Master's degree or equivalent experience with 5+ years in analog/mixed-signal circuit design, proficiency in industry-standard EDA tools, and strong analytical and debugging skills. | — | 0 |
| Senior Mask Design Engineer - Hardware Senior Mask Design Engineer for high-speed mixed-signal circuit designs in sub-micron CMOS technologies using Cadence tools. Responsibilities include physical layout, cross-functional collaboration with ASIC and mixed-signal engineers, and verification against design rules and schematics. Requires BSEE or equivalent, 7+ years of experience in Mask and Layout Design, deep understanding of analog circuit layout concepts, proficiency with Cadence virtuoso, experience with verification tools (Dracula, Hercules, Calibre, Primeyield), and scripting languages (perl, python, skill). Knowledge of DRC and LVS checking flows is also required. | — | 0 |
| Senior Memory System Engineer NVIDIA is seeking a Senior Memory System Engineer to join their ASIC Memory Subsystem team. The role involves developing and architecting innovative Memory Solutions for Tegra SoCs, collaborating with various teams (ASIC Architects, Designers, Software, Firmware, SI/PI, Memory suppliers) to design and architect high-speed, low-power memory technology. Responsibilities include analyzing future memory technologies, defining memory module/package/PCB layouts, debugging and bringing up memory evaluation/validation, and collaborating with DRAM suppliers. | — | 0 |
| Senior Hardware Validation Engineer Senior Hardware Validation Engineer role at NVIDIA, focusing on designing and executing validation plans for GPU and CPU modules within datacenter products. Responsibilities include debugging, root cause analysis, electrical/functional testing, and collaborating with cross-functional teams. Requires BSEE/BSCE or equivalent experience, 5+ years of validation experience, strong understanding of digital/circuit design, computer architecture, and programming skills in Python or similar scripting languages. Experience with ARM CPU architecture and hardware validation is also required. | — | 0 |
| Software Verification Engineer - Networking Software Verification Engineer for NVIDIA's Networking Switch Software team, focusing on Python-based testing infrastructure and network operating systems. | — | 0 |
| Manager, Mechanical Engineering Manager for Mechanical Engineering team focused on thermal and mechanical solutions for NVIDIA's networking products, supporting AI and networking infrastructure. Responsibilities include leading teams, developing cooling solutions (liquid and air), and managing mechanical analysis, materials, and manufacturing processes. | — | 0 |
| Software Engineer, Storage Software Engineer role focused on developing and enhancing storage drivers and emulation solutions within a Linux environment. Responsibilities include end-to-end feature ownership, performance tuning, and test automation. | — | 0 |
| Senior Software Test Development Engineer NVIDIA is seeking a Senior Software Test Development Engineer to work on low-level software and test infrastructure for networking and Interconnect products. The role involves driver development, hardware bring-up, debugging hardware-software interactions, and creating testing solutions, requiring collaboration with hardware engineers and interpretation of schematics. | — | 0 |
| Mechanical Manufacturing Engineer NVIDIA is seeking a Mechanical Manufacturing Engineer to join their Thermal/Mechanical Manufacturing Team. This role focuses on New Product Introduction (NPI) for mechanical and thermal components, ensuring seamless integration of design and manufacturing processes. The engineer will contribute to DFM, DFA, and MFD initiatives, collaborating with hardware engineering, suppliers, and CEMs to develop manufacturing solutions from concept to mass production. | — | 0 |
| Senior System Software Engineer - GPU Virtualization Senior System Software Engineer role at NVIDIA focusing on GPU Virtualization. Responsibilities include designing, developing, optimizing, debugging, and maintaining next-generation graphics and computing features for NVIDIA GPUs across user and kernel stacks. Requires strong C/C++ skills, deep understanding of Windows/Linux device drivers, PC architecture, and debugging complex software. Experience with virtualization concepts is a plus. | — | 0 |
| DFT ATPG Engineer NVIDIA is seeking an experienced DFT ATPG Engineer to work on groundbreaking innovations in DFT architecture, verification, and post-silicon validation for semiconductor chips. The role involves end-to-end ownership of ATPG flows, from architecture and planning to pattern generation, verification, and post-silicon bring-up and diagnosis, as well as inventing and maintaining automation flows for short test times. | — | 0 |
| Manager, Firmware System Engineering Manager for a firmware system engineering team focused on system bring-up and validation of next-generation networking products and AI platforms/silicon. Responsibilities include team leadership, technical guidance, project planning, and collaboration with other design teams. Requires experience in firmware development/system validation, Python programming, and system-level understanding. | — | 0 |
| CPU Performance Architect NVIDIA is seeking a CPU Performance Architect to innovate and improve CPU performance through modern microarchitectural ideas, performance modeling, and collaboration with build and verification teams. The role requires deep understanding of CPU microarchitecture and architecture, with at least 8 years of experience in frontline CPU projects. | — | 0 |
| ICT and JTAG Manager NVIDIA is seeking an ICT and JTAG group manager to lead strategy and execution for structural testing of their products, ensuring quality and driving innovation in ICT/JTAG solutions. The role involves defining team goals, strategies, tools, and KPIs, and collaborating with global teams. | — | 0 |
| Senior System Software Engineer - Automotive Senior Software Engineer role focused on supporting NVIDIA's DRIVE OS software stack for automotive customers, involving system integration, BSP porting, and device driver development on Linux/QNX. | — | 0 |