Tenstorrent
Semiconductors · RISC-V AI chip (Jim Keller)
- HQ
- Toronto, CA
- Founded
- 2016
- Website
- tenstorrent.com
Tenstorrent currently has 27 active AI-related job listings, with a significant majority, 81%, focused on serving infrastructure. Engineering roles comprise all of their AI hiring. The company is primarily hiring in the United States and Canada. Frequent technical tags include model_serving, inference_infra, and agent_orchestration, suggesting a focus on AI model deployment and management. In the last 30 days, Tenstorrent has not posted any new AI roles, representing a 100% decrease compared to the previous 30-day period.
Semiconductors · RISC-V AI chip (Jim Keller)
Currently tracking 22 active AI roles, down 50% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $100k–$500k (avg $300k).
Tenstorrent currently has 25 active AI-related roles in our index. The most common open titles are: Sr. Engineer, Software - AI Compiler (2), AI/ML Physical Design Flow Engineer, C++ Machine Learning Engineer, Models Training, Design Verification Lead, AI Hardware , Infrastructure and Platform Development Engineer. Most positions are in Engineering and Research.
Tenstorrent's active AI hiring is concentrated in: serving infrastructure (80%), agents (8%), application (4%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
Tenstorrent is hiring AI talent in: United States (10 roles), Canada (8 roles), Serbia (4 roles), Poland (2 roles).
Job postings at Tenstorrent most frequently reference: inference infra, model serving, fine tuning, agent orchestration, vision.
In the past 30 days, Tenstorrent has posted 1 new AI-related role.
| Title | Stage | AI score |
|---|---|---|
| Support Engineer - AI Server Systems Support Engineer for AI Server Systems, responsible for maintenance, troubleshooting, and preventative maintenance of AI infrastructure including GPU clusters, storage, and networking equipment. Requires hardware troubleshooting skills, Linux server experience, and communication abilities in Japanese and English. | — | 5 |
| Staff Mixed Signal Design Engineer, Silicon Validation This role focuses on validating and qualifying die-to-die (D2D) subsystems, AI, and Processor IP testchips for the chiplet ecosystem. Responsibilities include developing hardware infrastructure for validation platforms, performing electrical characterization, and supporting customer silicon bring-up. The role requires expertise in silicon test and characterization, lab environments, and high-speed measurements. | — | 5 |
| Risc-V Architect Tenstorrent is seeking a Risc-V Architect to analyze AI workloads and architect custom RISC-V CPU cores optimized for performance, power, and area. The role involves designing custom instructions and collaborating across teams to co-design the company's next-gen compute architecture, focusing on improving programmability and developer experience for AI compute. |
| — |
| 5 |
| RISC-V CPU Microarchitecture / RTL Tenstorrent is seeking a RISC-V CPU Microarchitecture/RTL owner to develop next-generation CPU designs. This role involves defining microarchitecture specifications, designing RTL, and performing unit verification for CPU components like branch predictors and vector execution units. The candidate will also use AI tools to accelerate the design process and potentially mentor junior engineers. Experience with high-performance CPU RTL design for architectures like x86, Arm, or RISC-V is required. | — | 5 |
| SoC - Chiplet Design Lead Tenstorrent is seeking a SoC Chiplet Design Lead to drive the design and development of advanced System-on-Chip (SoC) architectures targeting AI, HPC, and automotive markets. This role involves leading cross-functional teams through the entire SoC lifecycle, from concept to tape-out, focusing on performance, scalability, and efficiency. The ideal candidate will have deep expertise in SoC and chiplet design, RTL design, and digital architecture, with proven experience in leading end-to-end SoC development and verification. | — | 5 |
| GCC Compiler Engineer Tenstorrent is seeking a GCC Compiler Engineer to design, develop, and optimize compilers for next-generation RISC-V and AI compute architectures. The role involves working across hardware and software teams to improve performance and integration of custom toolchains for both traditional compute and machine learning workloads. | — | 5 |
| Staff, Ethernet Validation Engineer Tenstorrent is seeking a Staff, Ethernet Validation Engineer to work on cutting-edge AI technology, focusing on validating Ethernet IP in silicon. The role involves building robust validation infrastructure for performance, interoperability, and reliability, and collaborating with hardware and software teams on complex networking challenges. | — | 2 |
| Sr. Engineer, Package Design This role is for a Sr. Engineer focused on package design for advanced semiconductors, supporting AI technology development. The responsibilities include board-level routing studies, design mock-ups, and SI/PI modeling for early-stage package/board co-design. The role emphasizes collaboration with various engineering teams and applying engineering judgment to complex routing and electrical design challenges. While the company works on AI technology and the role mentions applying AI techniques to engineering workflows, the core function is in semiconductor package design, not AI model development. | — | 0 |
| (Contractor) HR Project Manager, People Programs This role is for a HR Project Manager, People Programs - Contractor at Tenstorrent, a company focused on AI technology. The role involves managing and structuring key People initiatives such as promotions, performance, and employee surveys. The ideal candidate will be highly organized, detail-oriented, and capable of driving cross-functional programs in a fast-paced environment. | — | 0 |
| Analog Design Engineer Tenstorrent is seeking an experienced Analog Design Engineer to develop cutting-edge die-to-die chiplet PHY IP solutions that power the future of AI computing. The role involves designing, verifying, and bringing up analog/mixed-signal IP in deep sub-micron FinFET technologies, collaborating with cross-functional teams. | — | 0 |
| Recruiter, Business Operations Recruiter for an AI company, supporting various functions including Creative, Communications, DevRel, Product, Operations, Sales, and Support. The role involves full-cycle searches, building diverse pipelines, partnering with hiring managers, and maintaining a scalable recruitment process. Experience in early-stage startups and a passion for AI are preferred. | — | 0 |
| Senior Manager, Global People Operations Tenstorrent is seeking a Senior Manager, Global People Operations to lead and strengthen People Operations across its global footprint. This role will oversee a distributed team, build a consistent and scalable global operating model, and focus on employee data integrity, documentation, compliance, onboarding, and operational excellence. The ideal candidate will have strong judgment, team leadership, and the ability to create clear, repeatable processes for complex multi-country operations. | — | 0 |
| HR Project Manager, People Programs - Contractor This role is for a HR Project Manager, People Programs - Contractor at Tenstorrent, an AI technology company. The primary focus is to bring structure and operational rigor to key People initiatives such as promotions, performance and merit, and employee survey execution. The role involves planning, tracking progress, and ensuring details are managed for cyclical work. It requires strong organizational skills, comfort with ambiguity, and the ability to coordinate across teams. | — | 0 |
| CPU Verification Fellow, RISC-V High-Performance Processor Tenstorrent is seeking a CPU Verification Fellow to lead verification strategy and execution for next-generation RISC-V high-performance processors. This role requires deep CPU verification expertise, strong microarchitecture understanding, and the ability to guide large engineering teams from early design through tapeout and post-silicon validation. The ideal candidate has verified complex out-of-order, speculative, superscalar CPUs and can define scalable methodology across simulation, formal verification, emulation, FPGA, and silicon bring-up. | — | 0 |
| System IP RTL Design Lead Tenstorrent is seeking an experienced System IP RTL Design Lead to drive the definition and implementation of complex datacenter class IP for their next-generation semiconductor products. The role involves leading a design team, defining system-level requirements, and ensuring IP design sign-off. The company is focused on AI technology and developing high-performance RISC-V CPUs and AI platforms. | — | 0 |
| Sr. Engineer, Design Verification,System IP Senior Design Verification Engineer responsible for end-to-end verification of IOMMU IP, ensuring functional correctness and performance. Involves test planning, coverage closure, and debugging complex issues within ASIC/SoC verification using SystemVerilog and UVM. Familiarity with bus protocols and scripting for automation is required. | — | 0 |
| Chip Design Lead Tenstorrent is seeking a Chip Design Lead to drive complex SoC programs from architecture definition through execution, tapeout, and deployment. This role requires strong cross-functional leadership and deep technical credibility across front-end design flows. | — | 0 |
| Sr. Engineer, RTL Implementation This role is for a Sr. Engineer, RTL Implementation focused on CPU design using RISC-V ISA. The engineer will work on front-end CAD flows, collaborate with micro-architects to optimize PPA, and work with DV, PD, RTL, and performance teams to deliver a converged design. The role involves synthesis, place and route, and enhancing physical design methodologies. | — | 0 |
| Sr. Engineer, CPU RTL Design This role is for a Sr. Engineer focused on CPU RTL Design for high-performance RISC-V CPUs, collaborating with various teams to meet functional, timing, and power goals. The role involves owning RTL design and microarchitecture development, optimizing power, performance, and area, and enhancing the RTL design environment. | — | 0 |
| CPU Core Design Verification Testbench Lead Lead CPU core-level testbench development and verification for high-performance out-of-order RISC-V CPUs, utilizing AI-assisted workflows and agents for debug and analysis. | — | 0 |
| Global Supply Chain Manager Tenstorrent is seeking a Global Supply Chain Manager with expertise in managing suppliers and supply chains across Asia to join their dynamic team. This role will report to the Director of Commodity Management and is based in Taipei, Taiwan. The company is focused on cutting-edge AI technology, revolutionizing performance, ease of use, and cost efficiency. | — | 0 |
| Debug Architect Tenstorrent is seeking a Debug Architect to define and scale debug and trace capabilities across their CPU and AI product lines. This role involves working across hardware and software boundaries to enable validation, diagnosis, and optimization of workloads on RISC-V, x86, or ARM systems. | — | 0 |
| Staff Engineer, CPU Core Verification Tenstorrent is seeking a Staff Engineer for CPU Core Verification to own CPU core-level verification and shape how out-of-order RISC-V CPUs behave in silicon. Responsibilities include planning and driving functional verification, developing stimulus and coverage, debugging regressions, and collaborating with cross-functional teams. | — | 0 |
| Staff Cost & Inventory Specialist, Finance This role is a Finance Specialist focused on cost and inventory analytics for AI hardware. It involves product cost forecasting, inventory metrics, and partnering with supply chain and operations to improve gross margin and production planning. While the company works on AI technology, this specific role is within the finance department and does not involve building or directly working with AI models. | — | 0 |
| Manager, Finance Center of Excellence (COE) Manager, Finance COE to build and lead Tenstorrent’s Bangalore finance hub, starting with entity accounting and close operations, expanding to management reporting, data quality, and AI-driven finance automation. This role will also serve as India Country Controller. | — | 0 |
| System Management Tools Engineer Software Engineer role focused on building and maintaining system management tools (tt-smi, utilities) and enhancing OpenBMC for Tenstorrent's AI hardware platforms. The role involves working at the boundary of firmware/BMC and host software, requiring experience in low-level software development, C/C++, Python, and Linux environments. Responsibilities include developing hardware-facing functionality like telemetry, health reporting, and controls, as well as supporting Linux bring-up and test infrastructure. | — | 0 |
| Staff Firmware Engineer Staff Firmware Engineer to develop system management firmware for AI hardware platforms, focusing on embedded controllers, bootloaders, and low-level system software integration. Requires strong C/C++ and embedded systems experience, with collaboration across hardware and software teams. | — | 0 |
| Advanced Packaging Process Engineer Tenstorrent is seeking an Advanced Packaging Process Engineer with experience in 2.5D and 3D chiplet packaging to drive advanced package technology and reliability for next-generation AI/ML products. The role involves close partnership with foundries and OSATs, owning technology implementation, acting as a technical interface, and collaborating with design and reliability teams. | — | 0 |
| Full-Chip Physical Design Verification Engineer Tenstorrent is seeking a SoC Physical Design Verification Engineer to drive full-chip signoff and ensure manufacturable, high-quality silicon across advanced technology nodes. This role involves leading physical verification closure, debugging issues, and collaborating with various teams to achieve successful tapeouts. | — | 0 |
| PDK/CAD Engineer Tenstorrent is seeking an experienced EDA/PDK CAD Engineer to build and maintain design infrastructure for AI silicon innovation. The role involves installing and optimizing PDKs, managing EDA tool flows, and collaborating with various engineering teams to improve design efficiency. Responsibilities include troubleshooting CAD issues and supporting physical verification and simulation flows. | — | 0 |
| Sr. Staff Engineer, Driver Tenstorrent is seeking a Sr. Staff Engineer, Driver to focus on the user-mode driver and interface layer for their AI hardware. This role involves designing and evolving high-performance APIs, defining driver interfaces, collaborating with kernel and hardware teams, driving performance engineering, and supporting external integrations, including in safety-critical use cases. | — | 0 |
| System IP & Site Lead India Tenstorrent is seeking a System IP & Site Lead in India to manage the technical direction of their System IP portfolio and oversee the operational success, cultural health, and strategic growth of their India engineering design center. This role requires deep technical expertise in SoC architecture and System IP development, strategic business acumen, and proven experience in managing large-scale cross-functional engineering teams and engineering sites. | — | 0 |
| Staff Engineer, CPU Core Verification Staff Engineer focused on CPU core-level verification for out-of-order RISC-V CPUs, involving RTL, UVM, C/C++ stimulus development, debug, and collaboration across design and validation teams. | — | 0 |
| Staff Engineer, SoC RTL Engineer Tenstorrent is seeking a Staff Digital Design Engineer to define, build, and optimize high-performance chiplet-based SoC architectures. The role involves RTL development, microarchitecture, and performance/power optimization for AI hardware. | — | 0 |
| Senior Physical Design Engineer Senior Physical Design Engineer for Tenstorrent's AIDC Yayoi project, focusing on chiplet-level and chip-top physical implementation of high-performance CPU-based SoCs in a system-in-package environment. Requires extensive experience in SoC/ASIC/GPU/CPU physical design, proficiency with industry-standard tools, and scripting skills. | — | 0 |
| Top Level Physical Design Engineer This role focuses on the physical design of AI and CPU System-on-Chip (SOC) designs, including floorplanning, power grids, and clock networks, to ensure chip-level closure. It involves collaboration with cross-disciplinary teams and optimization for power, performance, and area. | — | 0 |
| Staff Engineer, Emulation Technical Lead Tenstorrent is seeking a Staff Engineer, Emulation Technical Lead to lead technical efforts and strategy around their emulation infrastructure for high-performance CPUs that power AI products. This role involves leading technical strategy, enabling emulation infrastructure, driving debug efforts, and optimizing performance with design verification teams and tool vendors. The role is hybrid and based in Austin, TX. | — | 0 |
| Sr. Engineer, Performance Infrastructure The role focuses on CPU design infrastructure for performance analysis, correlation, and verification, working with RISC-V ISA and collaborating with core architects and RTL teams to deliver efficient and performant designs. It involves enhancing the design environment, tools, and methodologies, and optimizing power, performance, and area. | — | 0 |
| Power Design Engineer Tenstorrent is an AI company seeking a Power Design Engineer to focus on power analysis and optimization for CPU chiplets. The role involves defining power strategies, managing power vectors, driving analysis on RTL and netlist using tools like Joules and PrimePower, and collaborating with various design teams. While the company is in the AI space, this specific role is focused on semiconductor design (CPU power) rather than direct AI/ML model development or deployment. | — | 0 |
| Silicon Power & Characterization Lead Tenstorrent is seeking a Lead Engineer to own post-silicon power characterization and correlation for AI semiconductor products. Responsibilities include developing and executing power measurement strategies, correlating silicon data with pre-silicon models, and driving improvements in power architecture and methodologies. The role requires deep understanding of silicon power domains and lab measurement techniques, with a focus on cross-functional collaboration. | — | 0 |
| Business Development Lead, India Business Development Lead for Tenstorrent's sovereign AI strategy in India, focusing on identifying opportunities, managing client relationships, and supporting go-to-market execution. Requires experience in the AI hardware/software market and strong client relationships in India. | — | 0 |
| Sr. Manager of Quality, Supply Chain This role is for a Sr. Manager of Quality within the Supply Chain at Tenstorrent, a company focused on AI technology and RISC-V compute. The individual will build and own the quality organization for hardware systems and custom silicon, setting standards for reliability and scalability. Responsibilities include establishing a Quality Management System (QMS), driving Design for Quality, defining manufacturing controls, and managing supplier quality programs. The role requires extensive experience in hardware/semiconductor quality, leadership in building quality functions, and frequent travel. | — | 0 |
| Signal Integrity Engineer Tenstorrent is seeking a Signal Integrity Engineer to design, simulate, and validate high-speed interconnects for AI hardware. The role involves collaboration with ASIC packaging teams, ODMs, and internal layout teams, as well as supporting post-silicon bring-up and troubleshooting. Experience with high-speed digital design, PCB/package design, and SI/PI simulation tools is required. | — | 0 |
| Software Architect, Automotive Robotics Software Architect role focused on defining and developing software stacks for automotive (ADAS, IVI) and robotics applications, particularly for RISC-V based heterogeneous edge computing environments. The role involves working across software development teams, customers, and partners to define software strategy and enable adoption of RISC-V architecture. Experience with ISO26262, IEC61508, and ASPICE is mentioned. | — | 0 |
| Munich Site Manager Site Lead for Tenstorrent's Munich engineering hub, responsible for program planning and execution of silicon and platform initiatives, bridging German engineering with global priorities, and fostering innovation. | — | 0 |
| Staff Engineer, Software Release and Packaging - RISC V Tenstorrent is seeking a Staff Engineer for Software Release and Packaging, focusing on RISC-V and system IP products. The role involves building, packaging, and releasing software that combines Linux and open-source packages with proprietary software to enable customer success. This is a remote or hybrid position in North America or Australia, with compensation ranging from $100k to $500k. A key requirement is eligibility to access U.S. export-controlled technology. | — | 0 |
| SOC Architect Tenstorrent is seeking an SOC Architect to design central compute chiplets for next-generation automotive SoCs. This role involves translating automotive and safety requirements into architecture, focusing on performance, power, and reliability. The position requires a systems mindset and experience with SoC architecture, interconnects, memory, and CPUs, with familiarity in functional safety (ISO 26262) and automotive-grade design challenges. | — | 0 |
| Sr. Staff Design Verification Engineer, Automotive Robotics Sr. Staff Design Verification Engineer for Tenstorrent, focusing on digital designs for AI accelerators and RISC-V CPUs in an automotive robotics context. The role involves leading verification strategy, building test environments, and mentoring engineers, with a strong emphasis on SystemVerilog and UVM. | — | 0 |
| Emulation Engineer, Automotive Robotics Tenstorrent is seeking an Emulation Engineer to build and scale emulation platforms for their SiP-based AI or ML engines. This role involves architecting and developing emulation environments, testbenches, and support systems to enable hardware, software, and architectural validation, with a focus on silicon debug, DV, and performance. | — | 0 |
| DFT Engineer, Automotive Robotics DFT Engineer for Automotive Robotics team, focusing on designing and delivering core hardware modules for next-generation chiplet-based SoCs. The role involves defining DFx strategy, ensuring aggressive performance, quality, and safety targets are met, and collaborating with silicon design, DFT, OSAT partners, and customers. Experience with ATPG, DFx insertion tools, RTL coding for DFx logic, and fault models is required. Exposure to post-silicon testing and fault campaigns is a plus. The role will involve learning about SiP production, chiplet integration, and balancing architecture, DFT, and test costs. | — | 0 |