AMD currently has 35 active AI-related job listings. The majority of these roles, 66%, are focused on serving infrastructure. Engineering is the dominant function, with 32 positions. Frequent technical tags include model_serving, inference_infra, and evals, suggesting a focus on the deployment and evaluation of AI models. In the last 30 days, AMD posted 37 new AI roles.
AMD currently has 59 active AI-related roles in our index. The most common open titles are: DC-GPU Performance Modeling Engineer (3), Sr. Software Development Engineer (3), Data Center Engineer (2), MTS Software Development Engineer (2), Software Development Engineer (2). Most positions are in Engineering and Research.
AMD's active AI hiring is concentrated in: serving infrastructure (78%), data (10%), agents (5%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
AMD is hiring AI talent in: United States (30 roles), India (13 roles), Poland (5 roles), China (5 roles).
Job postings at AMD most frequently mention: GPU Computing, Computer Architecture, Python, C++, PyTorch.
In the past 30 days, AMD has posted 70 new AI-related roles.
| Title | Stage | AI score |
|---|---|---|
| Semicustom DFT Strategy Lead This role is for a Semicustom DFT Strategy Lead at AMD, focusing on Design-for-Test (DFT) and Design-for-Debug (DFD) for complex semiconductor products like APUs, GPUs, and game consoles. The lead will influence strategy, drive adoption of DFT standards, analyze post-silicon experiments, and manage relationships with EDA and ATE industries. While the company mentions AI and data centers, the core responsibilities are in semiconductor DFT, not direct AI/ML model development. | — | 0 |
| Director Silicon Design Engineering Director of Silicon Design Engineering responsible for technical leadership and sign-off of Adaptive & Embedded Computing Group (AECG) device programs from conception to manufacturing release. This role involves problem-solving across the entire device development cycle, including architecture, RTL, analog design, verification, physical design, tapeout, and post-silicon validation. The position requires extensive ASIC design experience, leadership skills, and the ability to resolve inter-team technical issues. | — |
| 0 |
| Lead System Debug Engineer - Server Validation Lead System Debug Engineer for AMD EPYC Server & Instinct products, focusing on post-silicon validation, system and silicon debug, and driving improvements to debug methodology. This role involves leading complex debug efforts, managing technical issues, and communicating program status to stakeholders. | — | 0 |
| Sr. Manager, Customer Program Management AMD is seeking a Sr. Manager, Customer Program Management to lead key AI platforms from concept to execution. This role involves working across engineering and business functions, collaborating with customers, hardware engineers, software developers, business development, and sales teams to deliver high-performance servers and clusters for AI and HPC. The candidate will be responsible for planning, driving, and reporting on joint product development and deployment, serving as the program's internal and external point of contact. | — | 0 |
| Hardware Systems Design Engineer – x86 Embedded Solutions (San Jose/Austin) This role is for a Hardware Systems Design Engineer focused on x86 embedded solutions for networking and storage customers. The engineer will act as a technical leader, guiding customers on integrating AMD processors, performing architecture and schematic reviews, debugging hardware issues, and providing technical guidance. The role requires expertise in hardware architecture, SoC/x86 platform debugging, signal integrity, and familiarity with various hardware standards and scripting languages. | — | 0 |
| System and Component Power Engineer This role is for a System Power Engineer at AMD, focusing on ensuring client products deliver optimal performance and battery life. The engineer will be responsible for power characterization, analysis, debug, and issue resolution, collaborating with cross-functional teams to integrate deliverables and implement test strategies. The role involves hands-on testing, root cause analysis of power challenges, and optimization of PC system components. Experience in SoC architectural characterization, system power optimization, and PC architecture is preferred. | — | 0 |
| CPU Core Physical Design Staff Engineer This role is for a CPU Core Physical Design Staff Engineer at AMD. The primary responsibilities involve owning a portion of the IP from Synthesis to a Placed and Routed design, working with external disciplines like CAD, DFT, and Architecture. The role requires innovation, improving design for lower power and higher performance, preparing schedules, and making technical recommendations. While the company mentions AI and its role in shaping the future, this specific position focuses on core physical design of CPUs, not on building or researching AI/ML models. | — | 0 |
| Infinity Fabric Senior Staff Verification Engineer This role is for a Senior Staff Verification Engineer at AMD, focusing on the Infinity Fabric transport layer. The engineer will be responsible for pre-silicon verification of configurable switches and die-to-die interconnects, which are critical components in AMD's products across various markets including AI and data centers. The role involves defining verification strategies, developing verification environments, debugging complex issues, and leading verification efforts. While the company mentions AI and data centers as markets, the core function of this role is hardware verification, not AI/ML model development. | — | 0 |
| System Design & Debug Manager – AI Customer Engineering This role is a System Design & Debug Manager within AMD's AI Customer Engineering organization. The primary focus is on driving complex silicon, system, and fleet-level issues to resolution for AI-related customer programs. It involves leading debug execution, coordinating cross-functional efforts, managing field failures, and improving debug processes. While the role is within the AI Customer Engineering organization, the core responsibilities are in system design and debug of hardware and infrastructure, not in building or researching AI models themselves. | — | 0 |
| Product Development Engineering Debug Manager This role manages a customer RMA debug team focused on diagnosing and resolving failures in products, including those for AI and data centers. The team uses various test platforms and data analysis to identify issues in silicon, test, package, and system levels, driving improvements in product quality and reliability. The manager coordinates cross-functional efforts and communicates with internal teams and external customers. | — | 0 |
| Senior UEFI/BIOS Firmware Engineer This role is for a Senior UEFI/BIOS Firmware Engineer at AMD, focusing on designing, developing, and debugging firmware for internal and external systems using AMD APUs/CPUs. The position involves C language programming, power management, security features, and collaboration with various internal and external teams. While AMD's broader mission includes AI, this specific role is centered on traditional firmware engineering. | — | 0 |
| Office & Events Manager This role is for an Office & Events Manager at AMD, focusing on managing office operations, facilities, and internal events across European locations. The responsibilities include overseeing daily office operations, managing vendors, coordinating onboarding logistics, and organizing various internal events. The ideal candidate should have strong organizational and project management skills, experience with vendor management and procurement, and a proactive approach. Experience using AI tools and interest in automating workflows are mentioned as required skills. | — | 0 |
| Manufacturing Operation Engineer (Datacenter Platform) This role focuses on manufacturing operations and engineering for data center platforms, including AI and other advanced computing experiences. The engineer will lead the development of manufacturing test strategies, support NPI, analyze yield data, and collaborate with internal and external teams to ensure reliable and scalable production of complex hardware. | — | 0 |
| C++ Lead Software System Design Eng Lead Software System Design Engineer with C++ expertise to develop validation SW tools for next-generation AMD microprocessors, focusing on platform validation and cross-functional collaboration. | — | 0 |
| Senior SerDes Verification Engineer AMD is seeking a Senior SerDes Verification Engineer to verify and validate high-speed interfaces used in advanced SoCs and chiplet designs. The role involves building UVM/SystemVerilog testbenches, running simulations, debugging timing and protocol issues, and evaluating signal integrity, jitter, BER, and eye diagrams. Collaboration with design and hardware teams ensures compliance with protocols such as UCIe, PCIe, and DDR, delivering reliable, high-performance silicon. | — | 0 |
| Senior Staff Product Development Engineer (SOC / Characterization) This role is for a Senior Staff Product Development Engineer at AMD, focusing on the characterization of Memory Controller IPs for next-generation SoCs. The responsibilities include evaluating product performance, developing test strategies, debugging issues, and driving continuous improvement in automated test scripts and frameworks. The role requires expertise in post-silicon validation, SoC architecture, memory protocols, and data analysis, with a preference for experience in Linux environments and scripting languages like Python. | — | 0 |
| Senior Virtual Software Modeling Engineer Develops Fast Platform Models that simulate software-visible behavior of AMD’s next-generation designs, enabling pre-silicon development of firmware, system, driver and application software. Supports emulation acceleration, performance, and power modeling. Enhances simulation infrastructure and develops innovative, new debug features. | — | 0 |
| Product Development Eng. This role focuses on building and supporting GPU platforms for data center solutions, working with partners and customers through the product development lifecycle, including NPI, bring-up, debug, and validation. It requires strong system-level hardware design and debug skills, with a focus on server systems and rack-level integration. | — | 0 |
| HSIO Enablement Lead This role is for a HSIO Enablement Lead at AMD, focusing on the post-silicon enablement of High Speed interfaces (Ethernet, PCIe, Display, USB). The responsibilities include end-to-end enablement, feature coverage, debug, and developing validation plans. While the company mentions AI and its use in screening, this specific role is not directly involved in AI/ML development. | — | 0 |
| Materials Coordinator This role is for a Materials Coordinator at AMD, responsible for managing NPI material flow, inventory accuracy, and logistics operations to support build phases and enhance operational efficiency. It involves coordinating with various teams, managing warehouses, and ensuring compliance with company policies. | — | 0 |
| Manager Packaging Engineering This role provides leadership for a team of engineers working closely with OSATs and cross-functional partners to enable new product bring-up and sustaining support for various advanced packaging technologies (InFO, EFB/CoWoS-L, CoWoS-S, WLFO, FCBGA, LGA, and chiplet packages). The position is accountable for team execution, technical direction, and delivery of manufacturing readiness, yield improvement, and continuous improvement objectives across backend engineering operations. The ideal candidate brings deep technical expertise in these packaging technologies and proven experience leading high-performing engineering teams. | — | 0 |
| Silicon Design Engineer This role is for a Silicon Design Engineer at AMD, focusing on planning, building, and executing the verification of graphics processor IP. The responsibilities include understanding new features, building test plans, writing directed and random verification tests, debugging failures, and reviewing coverage metrics. The role requires proficiency in IP level ASIC verification, debugging firmware and RTL code, and experience with UVM testbenches, Verilog, System Verilog, C, and C++. | — | 0 |
| Senior Silicon Design Engineer This role is for a Senior Silicon Design Engineer at AMD, focusing on the design and verification of next-generation microprocessors for various applications including AI, data centers, gaming, and PCs. The engineer will work on RTL code, advanced testbenches, and contribute to the architecture balancing power and performance. | — | 0 |
| Design Verification Engineer Design Verification Engineer for AMD's graphics processor IP. Responsibilities include planning, building, and executing verification tests, debugging failures, and collaborating with architects and engineers. Requires proficiency in IP level ASIC verification, UVM, Verilog, System Verilog, C/C++, and debugging firmware/RTL. | — | 0 |
| Executive & Digital Content Strategy Lead This role focuses on defining and executing executive thought leadership and digital content strategy, particularly for AI-related products and initiatives, across platforms like YouTube and LinkedIn. It involves narrative development, content programming, and cross-functional collaboration to ensure compelling storytelling aligned with business priorities. While the company is involved in AI, this specific role is centered on content strategy and communication, not direct AI/ML model development or deployment. | — | 0 |
| Serdes Analog Mixed-Signal Design Expert This role is for an Analog Mixed-Signal Design Expert at AMD, focusing on Serdes technology. The responsibilities include designing high-performance analog mixed-signal circuit blocks for Serdes, defining micro-architectures, managing power/performance/area budgets, mentoring, and working with verification and validation teams. Experience with ultra-high-speed electrical and optical PHY design, silicon productization, and advanced CMOS PDKs is preferred. The role is in San Jose, CA. | — | 0 |
| Lead Diagnostics Software Engineer, ATE Integration Lead/Principal Diagnostics Engineer to drive shift from post-silicon software validation frameworks and System-Level Tests (SLT) directly into Automated Test Equipment (ATE) and Wafer Sort environments. Design architecture, tooling, and translation methodologies to pack, convert, and stream complex software-driven GFX and compute test cases into production-grade ATE patterns. | — | 0 |
| Thermal Mechanical Platform Engineer This role is for a Thermal Mechanical Platform Engineer at AMD. Responsibilities include setting up and maintaining lab equipment, instrumenting and testing systems, and writing technical documentation. A Bachelor's or Master's degree in Mechanical Engineering is required, with preferred experience in CFD, liquid and aircooling, and CNC/fabrication. | — | 0 |
| Microprocessor VLSI Physical Design Engineer This role is for a VLSI physical design engineer at AMD, focusing on CPU and cache design for next-generation server, client, and gaming products. The engineer will be a technical lead, optimizing power, performance, and area, and solving complex design and tool problems. The role requires strong analytical skills, experience in deep sub-micron processes, and knowledge of various VLSI design stages. | — | 0 |
| Program Manager Program Manager for AMD's Diagnostics labs in Markham, responsible for day-to-day operations, lab infrastructure maintenance, space planning, equipment management, safety compliance, and ensuring labs meet roadmap demands. The role involves coordinating with facilities, managing asset systems, and adhering to ISO and EHS standards. | — | 0 |
| Director Operations - DC GPU This role provides business oversight for cloud service provider (CSP) and data center (DC) capacity within AMD's Data Center GPU business, focusing on transforming the AI and HPC landscape. Responsibilities include leading cluster acceptance, managing backstop capacity, aligning contracts with operational execution, and coordinating across Finance, Business Development, and Customer Engineering to synchronize plans and outcomes. The role also involves team building as the business scales. | — | 0 |
| Firmware Applications Eng. Develop firmware and software solutions for lab automation, remote control, and orchestration of lab bench instrumentation for AMD's Analog Mixed Signal team, focusing on RF data converters. | — | 0 |
| Silicon Design Engineer This role is for a Silicon Design Engineer at AMD, focusing on the planning, building, and verification of High Speed IO Protocol IPs. The primary responsibilities include developing test plans, building directed and random verification tests, debugging failures, and ensuring coverage metrics are met. While AMD is involved in AI, this specific role is centered on traditional hardware engineering and verification. | — | 0 |
| Graphics and Machine Learning Architecture Modeling Engineer This role focuses on improving the performance of key applications and benchmarks by working with AMD's architecture specialists, applying a data-minded approach to target optimization, staying informed of software and hardware trends, designing new AMD technologies, participating in hardware bring-ups, and debugging/fixing issues. It involves deep software engineering with C/C++ and understanding of operating systems and development tools. | — | 0 |
| Silicon Design Engineer This role focuses on developing and maintaining CAD design flows and automation solutions for silicon design at AMD. While it involves assisting in transforming existing workflows into AI-assisted or agentic workflows, the core function is not AI/ML model development but rather engineering productivity through automation and tool support. | — | 0 |
| Senior Emulation Engineer AMD is seeking a Senior Emulation Engineer to join their growing team. This role involves building and bringing up emulation models, developing transactors/BFMs, bringing up PCIe and Ethernet interfaces, and debugging emulation failures. The ideal candidate will have hands-on experience with Mentor Veloce and familiarity with Synopsys ZeBu, strong C/C++ programming skills, and a good understanding of PCIe, Ethernet, or RISC-V processors, along with Verilog/SystemVerilog RTL and verification flows. A Bachelor's or Master's degree in Electrical/Electronics Engineering and 5+ years of relevant experience are required. | — | 0 |
| Senior BIOS & Firmware Applications Engineer Senior BIOS & Firmware Applications Engineer at AMD in Bangalore, India. This role focuses on UEFI BIOS, EDK2, Coreboot, and system-level understanding of embedded systems. Responsibilities include defining customer demos, supporting customers with BIOS issues, developing and running tests for system performance, and investigating hardware protocols. Requires strong programming skills in Python and C/C++ and experience with bootloaders and operating systems like Linux. | — | 0 |
| Pre-silicon Validation Engineer - Emulation This role focuses on pre-silicon validation engineering for complex System-on-Chip (SoC) programs, involving emulation platforms, debugging, and developing test content for hardware features. It is not directly involved in building or researching AI/ML models. | — | 0 |
| IP Systems Design Engineer AMD is seeking an IP Systems Design Engineer in Shanghai, China. This role involves providing subject matter expertise in systems validation, contributing to the post-silicon development process, and driving the planning, execution, bring-up, and debug of AMD processor and graphics based systems. The engineer will focus on post-silicon hardware validation of SoC internal address and data hub subsystems, as well as complex SoC products. Responsibilities include participating in the entire product lifecycle, debugging hardware interconnect layers, defining validation strategies, and collaborating with design, software, and firmware teams. | — | 0 |
| DFT Silicon Design Engineer This role is for a DFT Silicon Design Engineer at AMD, focusing on the architecture, design, and implementation of Design-for-Test (DFT) and Design-for-Debug (DFD) features for ASIC products. The engineer will develop RTL for DFT features, perform integration, synthesis, timing analysis, and verification, and work with multi-functional teams. Experience with DFT techniques like JTAG, Scan, ATPG, and memory BIST is preferred, along with knowledge of Verilog, scripting languages, and EDA tools. | — | 0 |
| Technical Program Manager - Graphics Drives execution of development programs in alignment with project scope, schedule, and budget within the GFXIP PMO. Partners with IP design and verification teams, engaging with engineering and business stakeholders across the organization. The role offers exposure to Graphics, GPU Compute, Machine Learning, and related technologies. | — | 0 |
| Graphics IP RAS Engineer AMD is seeking a mid-level Graphics IP RAS Engineer to work on system reliability and RAS features for next-generation AMD products, including AI accelerators. The role involves designing, analyzing, and improving RAS features, working with architects, and analyzing reliability metrics. Experience with VLSI designs, digital logic, and computer architecture is required. Exposure to AI/ML accelerator architectures and reliability challenges in AI systems is preferred. | — | 0 |
| Senior System RTL Designer/Architect Seeking a senior-level System RTL designer with a strong background or passion for IP architecture to join AMD’s industry-leading team. This role will influence future architecture directions, own complex IP integration strategies, and collaborate closely with world-class experts to deliver groundbreaking silicon solutions. The candidate will balance performance, power, and area while driving schedules and managing risk, working at the forefront of CPU/GPU/SoC innovation. | — | 0 |
| Formal Verification Engineer AMD is seeking a Formal Verification Engineer to join their Infinity Fabric network on-chip verification team. The role involves driving formal verification efforts on complex hardware designs using methodologies like VC Formal and JasperGold, writing SystemVerilog Assertions (SVA), and collaborating with RTL designers and architects. The position requires a strong focus on formal verification, with a minimum of 8 years of experience, and involves mentoring junior engineers. While the role supports AI/ML products, the core function is hardware verification, not AI model development. | — | 0 |
| SR ASIC Design Engineer - Networking/ DPU/ AI Systems Seeking a Senior ASIC Design Engineer to architect and design key blocks for next-generation DPU ASICs targeting AI networking workloads. This role involves the full ASIC development lifecycle from RTL architecture and design through tapeout, silicon bring-up, and mass production. | — | 0 |
| Product Control Engineer (Supply Chain) This role supports prototype sample operations within an engineering and manufacturing environment, coordinating the planning, scheduling, tracking, and delivery of early prototype samples. The candidate will partner with Product Engineering, Supply Chain, and Manufacturing teams to ensure material readiness, resolve supply constraints, and support on-time execution of engineering builds. | — | 0 |
| Hardware System Architecture Fellow - AI & Data Center Networking This role defines and drives end-to-end hardware system architecture for AMD's next-generation AI and data center networking platforms, focusing on AI-NICs, DPUs, switches, and rack-scale networking solutions. It requires deep system expertise, cross-domain technical leadership, and the ability to influence across organizations without direct people management. | — | 0 |
| FPGA Product Application Engineer FPGA Product Application Engineer providing technical support for Ethernet subsystems on Xilinx FPGAs, SoCs, and ACAPs, including tools, drivers, and IP. The role involves collaborating with customers and internal teams to resolve complex technical issues, enabling customer designs, and recommending product improvements. The environment is fast-moving with a focus on emerging technologies. | — | 0 |
| Lead / Staff Embedded Cybersecurity Engineer AMD is seeking an influential software engineer to join their core team, focusing on improving the performance of key applications and benchmarks. The role involves developing and driving security software for sophisticated new technology and product introduction projects (FPGA/SoC, embedded x86), defining security requirements, participating in customer support, reviewing security architectures, and collaborating with engineering teams throughout the product lifecycle. Responsibilities also include contributing to future architecture design, implementing security features like secure boot and cryptographic algorithms, and supporting Secure Development Lifecycle activities such as Threat Modeling and Penetration Testing. | — | 0 |
| Lead Automative Use Cases Validation Engineer Lead Automative Use Cases Validation Engineer at AMD, focusing on validating Automotive Virtualization on AMD platforms. The role involves validating Xen-based virtualization, multi-OS domains, IVI features, graphics, and Ryzen AI workloads across hypervisor, OS domains, drivers, and system level performance. | — | 0 |