NVIDIA currently has 496 active AI-related job listings. The majority of these roles, 52%, are focused on serving infrastructure, with agents representing another significant segment at 23%. Engineering is the dominant function, with 441 positions. The United States leads hiring geographies with 287 roles, followed by China with 64. Frequent tech tags include model_serving, inference_infra, and agent_orchestration, suggesting a focus on deployment and management of AI models. Over the last 30 days, NVIDIA posted 214 new AI roles, a 27% decrease compared to the previous 30-day period.
Currently tracking 440 active AI roles, down 50% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $100k–$575k (avg $262k).
NVIDIA currently has 487 active AI-related roles in our index. The most common open titles are: Deep Learning Performance Architect (4), Senior Deep Learning Performance Architect (4), AI Research Scientist (3), Developer Technology Engineer - AI (3), Manager, Deep Learning Algorithms (3). Most positions are in Engineering and Research.
NVIDIA's active AI hiring is concentrated in: serving infrastructure (54%), agents (21%), application (8%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
NVIDIA is hiring AI talent in: United States (286 roles), China (59 roles), Israel (50 roles), Germany (21 roles).
Job postings at NVIDIA most frequently reference: model serving, inference infra, agent orchestration, llm observability, multimodal.
In the past 30 days, NVIDIA has posted 110 new AI-related roles. That is a -50% change versus the prior 30 days (218 → 110).
| Title | Stage | AI score |
|---|---|---|
| Senior System Software Engineer - Tegra Senior System Software Engineer to work in the Tegra system software group, focusing on designing and developing test and framework for complex heterogeneous computing systems. The role involves architecting diagnostic software solutions, improving efficiency and robustness, and debugging complex failures. Requires strong C/C++, OS/kernel programming, and computer architecture understanding. | — | 0 |
| Senior Network Engineer - DGX Cloud Senior Network Engineer to develop and manage a cloud network infrastructure supporting NVIDIA's software development workflows and tools, including CI/CD, compute resource management, and developer productivity tools. The role requires expertise in L3 underlay networks, large-scale network design, implementation, and automation. | — | 0 |
| Signal and Power Integrity Engineer - New College Grad 2026 NVIDIA is seeking a Senior Signal & Power Integrity Engineer to work on complex system design problems for high-performance AI systems, graphic cards, and Tegra systems. The role involves system-level power integrity simulations, close collaboration with VLSI power and package/board design teams, and PDN guideline creation and review. |
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| Senior Signal and Power Integrity Engineer - Hardware NVIDIA is seeking a Senior Signal and Power Integrity Engineer to work on crafting creative Signal Integrity solutions to complex system design problems. Responsibilities include system-level signal integrity simulations of high-speed interfaces, modeling of vias and connectors, and design/optimization of Power Delivery Networks. The role involves simulation automation, data gathering, analysis, and visualization, with opportunities to optimize package, PCB, ASIC, and mixed-signal circuits. | — | 0 |
| DFT Engineer - New College Grad NVIDIA is seeking a DFT Engineer to work on end-to-end Design-for-Test for sophisticated semiconductor chips, from methodology to post-silicon support. The role involves partnering with EDA tool vendors and internal teams, delivering scan features, and mentoring junior engineers. Requires knowledge in scan test plans, BIST, fault modeling, ATPG, fault simulation, and silicon debug. Experience with RTL design, STA, place-n-route, and power is beneficial. | — | 0 |
| Senior Logic Design Engineer Senior Logic Design Engineer role focused on FPGA/CPLD development, including micro-architectural definition, RTL coding, logic debug, synthesis, and timing closure. Responsibilities also include supporting verification, implementation, system bring-up, and validation. The role is within the DGX FPGA Logic Team, contributing to Data Center products for AI growth. | — | 0 |
| Pricefx Solutions Architect This role is for a Solutions Architect at NVIDIA focused on designing and delivering scalable pricing and business process solutions using the Pricefx platform. The role requires expertise in enterprise solution architecture, SaaS implementations, and enterprise application delivery within large global organizations. Responsibilities include leading technical architecture, configuring Pricefx solutions, defining integration strategies, and providing technical leadership during testing and deployment. The role emphasizes deep expertise in Pricefx, experience leading implementations, and understanding of object-oriented programming and web services. | — | 0 |
| Senior Product Architect NVIDIA is seeking a Senior Product Architect to define and design SoC- and GPU-based products, driving hardware/software feature improvements. This role involves participating in all facets of product definition, positioning, architecture, and execution across various fields like automotive, robotics, and consumer electronics. The architect will guide design engineers, manage cross-functional teams to balance cost, performance, and schedule, and drive issue resolution. Requires 6+ years of experience in product architecture for chip/platform/hardware optimization, a relevant BS/MS degree, strong analytical and communication skills, and experience with DFx, schematic, PCB layout, and signal integrity. | — | 0 |
| Senior Director, Device and SPICE Modeling NVIDIA's Advanced Technology Group is seeking a Senior Director to lead the Device and SPICE Modeling group. This role involves co-developing advanced device technology with foundries, focusing on achieving performance targets, releasing accurate SPICE models, and validating process readiness through test chip design and analysis. The position requires extensive experience in silicon technologies, engineering management, and a strong understanding of FinFET/GAA processes and BSIM models. | — | 0 |
| Electrical Design Engineer, AI Factory Deployment NVIDIA is seeking an Electrical Design Engineer for AI Factory Deployment to develop and install innovative power systems for AI data centers. Responsibilities include identifying requirements, supporting global build standards, adapting electrical systems for AI Factories, conducting technical evaluations, and providing technical support for construction and commissioning. | — | 0 |
| Senior Power Integrity Methodology CAD Engineer Senior Power Integrity Methodology CAD Engineer at NVIDIA, focusing on developing and implementing physical design methodologies for rail analysis and signoff for NVIDIA chips. Requires expertise in EMIR flow, scripting, and collaboration with hardware/design teams. | — | 0 |
| Lead Post-Silicon Validation Engineer Lead Post-Silicon Validation Engineer for NVIDIA's GPU Engineering Team, focusing on memory systems for GPUs used in graphics, deep learning, HPC, and automotive markets. Responsibilities include managing post-silicon bringup, characterization, productization, and developing/qualifying memory system software and firmware. The role involves customer and vendor interaction for silicon issues and contribution throughout the GPU development cycle. | — | 0 |
| Principal Software Development Engineer, Solid State Drives NVIDIA is seeking a Principal Software Development Engineer to architect new persistent data storage platforms for AI/HPC workloads, own SSD selection and optimization, and lead system integration for SSD-based storage platforms. The role involves influencing the storage-class memory industry roadmap. | — | 0 |
| Senior Manager, Software Development - GPU Accelerated Storage This role is for a Senior Manager, Software Development focused on GPU Accelerated Storage within NVIDIA's data center systems. The primary responsibility is to optimize storage access by enabling direct data paths between GPU memory and storage, bypassing the CPU. The role involves collaborating on reference storage platform designs and leading a global team to drive the storage acceleration roadmap across next-generation systems, frameworks, and applications. It requires deep knowledge of data storage platforms, databases, vector databases, NVMe, RDMA, and system-level architecture, along with significant experience in leading software development teams. | — | 0 |
| Senior Software Engineer, DPU - Networking Senior Software Engineer for NVIDIA DPU Platform team, focusing on developing system software components, firmware, kernel drivers, and user space applications for advanced data centers. Requires deep knowledge of embedded platforms, operating systems, and software distribution technologies, with experience in pre-silicon development, optimization, and full product life-cycle participation. | — | 0 |
| GPU System and Scheduling Architect - New College Grad 2026 NVIDIA is seeking a New College Grad GPU System and Scheduling Architect to design the next generation of their GPU system interface. Responsibilities include understanding GPU sub-system interoperation, architecting features with global teams, creating functional and performance models in C++, and supporting post-silicon validation. Requires a BS/MS/PhD in a related field and strong C/C++ proficiency, with exposure to post-silicon validation and computer architecture coursework. | — | 0 |
| Verification Engineer - Compilers C++ NVIDIA is seeking a Verification Engineer to ensure the quality of their compiler technology. The role involves designing C++ test suites, automating compiler testing, and identifying gaps in current procedures. The engineer will leverage LLM technologies to enhance C++ testing quality and work within existing iterative planning and test development processes. | — | 0 |
| Senior Architect, Simulation Kernel Modelling Develops and improves modeling infrastructure for GPU and SOC models, supporting architecture and engineering teams in building models for next-generation chip architectures using SystemC, C++, and related tools. | — | 0 |
| Senior Bring up Methodology Lead Senior engineer to lead end-to-end planning and execution of NVIDIA's new chip bringup efforts, coordinating multi-functional teams, developing methodologies, and serving as a central point of contact for leadership. | — | 0 |
| Chip Lead, Silicon Co-Design Group NVIDIA is seeking a Chip Lead for their Silicon Co-Design Group. This role serves as the technical lead for silicon programs, focusing on end-to-end technical integrity, feature integration, bug resolution, and shaping the technical narrative. The position requires deep understanding of SoC and ASIC architecture, with expertise in subsystems like HBM, SerDes, power/thermal, or packaging. The role involves guiding technical decisions across functional boundaries without direct authority and translating complex issues for executive leadership. Experience with post-silicon bring-up, validation, or system integration leadership is essential, along with a track record of shipped silicon products. | — | 0 |
| Senior System Software Engineer - GPU Power Management Senior System Software Engineer at NVIDIA focusing on GPU power management and performance optimization. The role involves defining, designing, and developing system software components, driving features from idea to productization, and resolving complex technical issues. Requires strong C programming, low-level firmware concepts, and operating system fundamentals. Experience with Datacenter Power Management and real-time controllers is a plus. | — | 0 |
| ASIC Physical Design Engineer, Netlisting - New College Grad 2026 NVIDIA is seeking a motivated ASIC Physical Design Engineer, Netlisting for their Santa Clara or Austin office. The role involves driving the physical design of high-frequency and low-power CPUs, GPUs, and SoCs, with a focus on netlist-related aspects like equivalence checking, asynchronous checking, and logic synthesis. The ideal candidate will have a Master's or PhD in Electrical or Computer Engineering, knowledge in logic equivalence checking, understanding of hardware architecture, and experience with RTL/logic design for timing closure. Experience with clock-domain-crossing checks, MTBF analysis, logic synthesis, and scripting languages like Python is also required. Experience with AI utilization in workflows is a plus. | — | 0 |
| Manager, System Design Tools and Methodology Manager for System Design Tools and Methodology at NVIDIA, focusing on architecting the engineering pipeline for complex AI systems. The role involves leading a team to evolve CAD/PLM ecosystems, develop data-driven workflows, and streamline the product lifecycle from prototyping to mass production. | — | 0 |
| GPU Development Tools System Software Engineer Software Engineer at NVIDIA focused on developing core verification infrastructure for GPU and SoC chips, using C++ and Python. The role involves programming and testing next-generation features throughout the chip development lifecycle. | — | 0 |
| Senior Platform Software Engineer – Factory NVIDIA is seeking a Senior Platform Software Engineer for their Factory team. This role involves leading factory validation projects for software, firmware, and diagnostics, integrating and handing over these components, and providing strategic direction to engineering teams. The engineer will also analyze and optimize factory processes, develop documentation, perform system testing, and monitor data for improvements. The role requires experience in integration engineering, server manageability, and programming skills in Python, C/C++, and shell scripting, with a focus on GPU platforms. | — | 0 |
| Senior Validation Engineer Senior Validation Engineer at NVIDIA, focusing on leading project validation efforts, interacting with multidisciplinary teams, reporting progress to leadership, setting up debug meetings, and anticipating/solving project issues. Requires 10+ years of experience in validation engineering, strong leadership, communication, and problem-solving skills, with a deep understanding of experimental design, debugging complex technical issues, and various signal/power/EMI/thermal testing methodologies. | — | 0 |
| Senior C++ Software Engineer - Chip Design Tools Senior Software Engineer role focused on developing and supporting infrastructure tools for chip design and verification processes, using C++/Golang to analyze and construct chip designs. Responsibilities include building scalable software, researching solutions for efficiency, and optimizing workflows for chip modelers and designers. | — | 0 |
| Senior Compiler Engineer Infrastructure Senior Compiler Engineer Infrastructure role focused on aligning NVIDIA's compiler codebases with open-source ecosystems and improving developer productivity at scale. This role involves reconciling downstream compiler repositories with upstream open-source projects like LLVM, Clang, and MLIR, and building tooling and infrastructure for compiler engineers. | — | 0 |
| Senior LLVM Compiler Engineer Senior Compiler Engineer focused on upstream engagement with the LLVM ecosystem and advancing NVIDIA’s compiler technology through sustained participation in open-source communities. This role involves working directly with LLVM, Clang, MLIR, and related open-source projects to upstream compiler functionality. | — | 0 |
| Engineering Manager - OpenBMC Platform Engineering Manager for OpenBMC Platform at NVIDIA, responsible for owning and delivering an end-to-end manageability stack for Data Center Systems. This role involves managing a team of software engineers, designing and building OpenBMC based firmware, and ensuring quality, reliability, and performance of the delivered firmware. | — | 0 |
| Senior Formal Verification Engineer - LPU Senior Formal Verification Engineer at NVIDIA focusing on verifying AI-related ASIC designs using formal verification methods. Requires extensive experience in ASIC verification, formal techniques, SystemVerilog Assertions (SVA), and formal verification tools. The role involves collaboration with design teams, methodology leadership, and mentorship. | — | 0 |
| ASIC Design Engineer - New College Grad 2026 NVIDIA is seeking an ASIC Design Engineer for their Memory Subsystem Team, focusing on micro-architecture, RTL design, synthesis, and timing analysis for sophisticated SOC Interconnects. The role involves collaboration with various engineering teams and requires proficiency in Verilog/VHDL and scripting languages, with exposure to high-speed interconnects and industry specifications. | — | 0 |
| Verification Engineer - New College Grad 2026 NVIDIA is seeking a Verification Engineer to verify the design and implementation of memory subsystems for their SoCs and GPUs, which are used in AI and other computing applications. The role involves developing verification infrastructure, executing test plans, and collaborating with design teams. | — | 0 |
| Senior ASIC Timing Engineer, DFT NVIDIA is seeking a Senior ASIC Timing Engineer, DFT to drive timing analysis and closure for DFT logic on all Nvidia chips. The role involves working with various teams to develop timing constraints, drive convergence, and implement ECOs, while also improving workflows through automation. Requires a BS/MS in Electrical or Computer Engineering with significant experience in Static Timing Analysis (STA) and timing convergence, including expertise in ECOs and timing constraint development. | — | 0 |
| Senior Packaging Technical Engineer - Hardware NVIDIA is seeking a Senior Packaging Technical Engineer to define and implement silicon pad rings, substrate interconnect schemes, and lead the package layout design process. This role involves collaborating with various engineering teams and requires expertise in chip floor planning and package design. | — | 0 |
| Lead Performance Modeling Architect, CPU Fabric and LLC Lead Performance Modeling Architect for CPU Fabric and LLC at NVIDIA, focusing on next-generation cache hierarchies and I/O coherent interconnects for Automotive and Data Center platforms. The role involves guiding a team, defining modeling infrastructure vision, and driving advanced modeling methodologies. | — | 0 |
| Senior Performance Modeling Architect, CPU Fabric and LLC Senior Performance Modeling Architect role at NVIDIA focusing on CPU Cache Hierarchies and interconnects for Automotive and Data Center systems. Responsibilities include developing high-fidelity performance models, analyzing bottlenecks, evaluating coherency protocols, and collaborating with other teams. Requires a Master's or Ph.D. in a relevant field with strong computer architecture, C++/SystemC modeling, and Python scripting skills. | — | 0 |
| Senior Software Engineer - Datacenter Systems Senior Software Engineer role focused on designing, building, and improving software systems for datacenter provisioning and management, including rack installation, networking, and cluster scaling. The role involves developing scalable release train architectures, defining and monitoring SLIs/SLOs/SLAs, building CI/CD pipelines, and automating software updates for high-performance GPU clusters running HPC and AI workloads. Requires strong programming skills in Python, Rust, C++, and experience with CI/CD tools and SRE practices. | — | 0 |
| Senior Platform Design Engineer NVIDIA is seeking a Senior Platform Design Engineer to join their Circuit Solutions Group. The role involves designing evaluation boards for NVIDIA products like GPUs and CPUs, managing documentation, collaborating with various engineering teams, and performing hands-on lab testing and validation. The ideal candidate will have extensive experience in board/system design, system bring-up, and validation, with a strong understanding of electrical circuits and SoC platforms. | — | 0 |
| Senior Software Engineer, Kubernetes and Virtualization - DGX Cloud Senior Software Engineer role focused on developing and maintaining a web-based storage management plane, including Kubernetes operators and CSI plugins, for distributed storage infrastructure at NVIDIA. | — | 0 |
| Senior DFT Engineer Senior DFT Engineer role at NVIDIA focusing on optimizing design tradeoffs and methodology for next-generation CMOS technology. Responsibilities include all aspects of testing: methodology, logic insertion, verification, test pattern generation, test program bring-up, and debug/failure analysis. Requires 12+ years of experience in design for test, knowledge of various test architectures, expertise in test logic design verification and pattern generation, and ATE test program development. | — | 0 |
| Mechanical Optical Simulation Engineer Mechanical Optical Simulation Engineer at NVIDIA, responsible for micro-optical component design using simulation software, collaborating with vendors, running optical tests, and performing root cause analysis. Requires a Bachelor's degree in a related field, 5+ years of mechanical design experience, and knowledge of micro-optic design, optical termination standards, and mechanical/optical simulation software. | — | 0 |
| Principal Firmware Engineer - Data Center Server Management NVIDIA is seeking a Principal Firmware Engineer to own end-to-end manageability architecture for data center server management solutions, specifically for next-generation scaling AI supercomputing platforms. The role involves driving server management for large GPU clusters, collaborating with internal and external teams to define requirements, and ensuring the quality, reliability, and telemetry performance of firmware delivered to data centers. | — | 0 |
| Senior Software Engineer - DPU Platform Senior Software Engineer role focused on developing system software components for NVIDIA's DPU platform, including firmware, bootloaders, kernel drivers, and user-space applications. Requires strong C/Python skills, embedded systems experience, and understanding of software/hardware interactions. | — | 0 |
| Senior Mixed Signal Design Engineer NVIDIA is seeking a Senior Mixed Signal Design Engineer to develop and implement high-speed interfaces and analog circuits for next-generation NVLINK technology. The role involves hands-on experience from concept to silicon characterization, including schematic design, layout, verification, and post-silicon support. The ideal candidate will have a Master's or PhD in Electrical Engineering or a related field with extensive analog design experience in deep sub-micron CMOS processes. | — | 0 |
| Senior Mixed Signal Design Engineer NVIDIA is seeking a Senior Mixed Signal Design Engineer to develop and implement high-speed electrical/optical interfaces and analog circuits for next-generation NVLINK. This role involves hands-on experience with integrated circuit design from concept through silicon characterization, including schematic design, layout, verification, and post-silicon support. The ideal candidate will have a Master's or Ph.D. in Electrical Engineering or a related field with 6+ years of analog design experience in deep sub-micron CMOS technologies. | — | 0 |
| Senior Software Engineer - GPU and SOC Senior Software Engineer role focused on SOC and system-level software development, including Pre-OS Firmware, BIOS, drivers, and CI/CD systems. Requires strong C/C++, Python, OS fundamentals, and understanding of ARM microarchitecture. Experience with embedded systems and system-level debugging is a plus. | — | 0 |
| Senior Mask Design Engineer - Hardware Senior Mask Layout Design Engineer responsible for physical layout of mixed-signal functions in advanced CMOS technologies using Cadence tools, collaborating with ASIC and mixed-signal engineers, and performing floor planning and verification. | — | 0 |
| Senior Software Engineer, Fabric Networking - GPU Senior Software Engineer role focused on GPU Fabric Networking, developing and maintaining software for GPU-to-GPU communication in High Performance Computing and Deep Learning platforms. Requires strong C/C++ and systems programming skills. | — | 0 |
| Lead System Software Engineer Platform - Server Embedded Firmware Lead System Software Engineer focusing on embedded firmware for GPU server platforms, specifically microcontroller firmware development using C/C++ in an RTOS environment. Responsibilities include designing, implementing, debugging, and optimizing firmware for server manageability, communication protocols, and system integration, collaborating with hardware and security teams. | — | 0 |