This role focuses on optimizing communication libraries (oneCCL, SHMEM, MPI) for High-Performance Computing (HPC) and AI workloads, specifically identifying and resolving performance bottlenecks in Intel's oneCCL library for AI applications. The engineer will optimize runtime software for distributed systems, ensuring low latency and high bandwidth on Intel GPUs and CPUs, contributing to advancements in scientific discovery and AI systems.

This role focuses on validating and developing hardware structures and interfaces to accelerate deep learning hardware and software performance for AI systems. It involves developing test plans, leading pre- and post-silicon activities, and collaborating with product and design teams to define next-generation requirements and influence the AI product roadmap. The work impacts AI solutions in both on-device and data center deployments.

Internship role focused on building AI software stacks, GPU programming, and performance optimization. Contributes to design, development, and optimization of AI software solutions, algorithms, frameworks, and architectures. Assists in implementing and tuning models for performance and accuracy, applied research, and hardware-software integration. May involve creating AI software solutions and system-level deployment for scalable and efficient AI.

This intern role focuses on the hardware engineering aspects of AI ecosystem solutions, involving algorithm and framework design, AI software architecture, and optimizing AI solutions for hardware performance. It combines hardware engineering with AI/ML techniques for design efficiency and analysis, including implementing and tuning models, applied research, and system-level deployment. The role emphasizes AI augmenting engineering judgment.

Intel is seeking fresh graduates and early career professionals for talent opportunities in Malaysia. The program focuses on contributing to cutting-edge projects, hands-on training, and supporting innovative solutions within the AI era. Roles span various engineering and STEM fields, with a focus on developing technical and professional skills.

Principal Engineer role focused on shaping the future of datacenter and cloud software by engaging with customers, defining optimization opportunities, and influencing technical direction. The role involves architecting solutions, optimizing workloads, and driving technical excellence for Intel platforms. Responsibilities include customer engagement, technical leadership, workload optimization across various environments, mentoring junior leaders, and contributing to open-source communities. The role is critical for shaping next-generation Intel software and silicon codesign.

This role focuses on developing and optimizing communication libraries (Intel SHMEM, MPI, oneCCL) for high-performance computing (HPC) and AI systems, particularly for supercomputers like Aurora. The engineer will work on low-latency, high-bandwidth software for Intel GPUs and CPUs, collaborating with scientists and engineers to advance scientific computing and machine learning.

Senior Compiler Engineer role focused on developing and optimizing compiler software for Intel's GPU programming models, including OpenCL, SYCL, and OpenMP. The role involves designing IR interfaces, implementing optimization algorithms, collaborating with hardware architects, and evaluating workload performance to enhance AI and high-performance computing applications.

Intel is seeking an experienced Compiler Engineer to develop and advance their open-source compiler stack, focusing on C/C++/DPC++/Fortran compilers and LLVM. The role involves setting technical direction, designing language extensions and runtimes, and collaborating with the LLVM community to ensure high performance and reliability for CPU and GPU accelerators, particularly for AI and HPC workloads.

Analog Layout Design Engineer responsible for designing complex analog signal circuits, running verification tools, and optimizing layouts for area, power, and performance. Collaborates with cross-functional teams and develops new layout methodologies.

The Site Services Specialist role at Intel focuses on managing and coordinating employee and building services, including transportation, cafeteria operations, maintenance, and events. Responsibilities include project management, change management, supplier relationship management, quality audits, and ensuring compliance with local regulations. The role requires experience in project management, supplier management, and building maintenance.

This role focuses on developing, executing, and automating Bluetooth and Wi-Fi connectivity tests for hardware and software products. It involves creating validation environments, identifying and reporting issues, developing test plans, and collaborating with cross-functional teams. The role requires experience with test automation (Python) and network protocol analyzers, with a mention of integrating Gen AI Agents into validation tasks.

This role focuses on developing, executing, and automating Bluetooth and Wi-Fi connectivity tests for hardware and software products. It involves creating validation environments, identifying and reporting issues, developing test plans, and collaborating with cross-functional teams. The role requires experience with test automation (Python) and network protocol analyzers, with a mention of integrating Gen AI Agents into validation tasks.

Performs functional verification of CPU logic, develops IP verification plans, test benches, and verification environments. Executes verification plans, runs system simulation models, analyzes power and timing, and debugs issues. Collaborates with architects, RTL developers, and physical design teams. Maintains verification infrastructure and methodology. Participates in defining CPU architecture and microarchitecture features.

This role focuses on developing, executing, and automating Bluetooth and Wi-Fi connectivity tests for hardware and software products. It involves creating validation environments, identifying and reporting issues, developing test plans, and collaborating with cross-functional teams. The role requires experience with test automation (Python) and network protocol analyzers, with a mention of integrating Gen AI Agents into validation tasks.

Physical Design Engineer responsible for delivering end-to-end Physical Design and Analog Layout for Intel's Hard-IP portfolios, supporting implementation from RTL/Netlist through GDSII. The role involves synthesis, place and route, clock tree synthesis, static timing analysis, and power/clock distribution, as well as verification and signoff.

Physical Design Engineer responsible for end-to-end Physical Design and Analog Layout for Intel's Client, Server and ASIC Hard-IP portfolios, as well as advanced testchips. The role involves execution from RTL/Netlist through GDSII using established Physical Design methodologies and sign-off practices, impacting product-level parameters such as power, frequency, and area.

CPU Design Verification Engineer responsible for Pre-Silicon functional verification of CPU logic, developing test benches and verification environments, executing verification plans, and debugging issues in the Pre-silicon environment. Collaborates with architects and RTL developers to ensure design meets specifications.

This role focuses on the validation and debug of Design-For-Debug (DFD) logic in Intel CPUs. The engineer will develop verification plans, test benches, and software solutions for pre-silicon and post-silicon environments, collaborating with architects and designers to ensure CPU reliability and functionality. The role requires expertise in System Verilog, UVM, and scripting languages like Python, Perl, and C/C++, along with a strong understanding of CPU architecture.

This role is for a Hardware Platform Applications Engineer focused on the military and aerospace market. Responsibilities include customer engagement, system support, proof-of-concept development, debugging platform issues, technical collateral creation, and working with hardware/software architects on platform requirements. Requires a BS in EE or CS, 3+ years of hardware design experience, and US Citizenship with the ability to obtain a security clearance.

Internship role focused on power and performance validation of Intel silicon products (Xeon family). Responsibilities include debugging, data collection, data analysis, validation coverage assessment, and potentially test automation and infrastructure development. Requires pursuing a degree in a relevant field and 6 months of experience in computer architecture, programming (C, C++, Python), and SoC microarchitecture.

Senior Member of Technical Staff role at Intel focused on process innovation and optimization for advanced semiconductor technologies, specifically thin film deposition. The role involves leading process development, ensuring manufacturability, collaborating across engineering disciplines, and meeting customer requirements in high-volume manufacturing.

Process Integration Development Engineer at Intel, focusing on advancing semiconductor manufacturing processes for Logic Technology Development (LTD). Responsibilities include leading quality event responses, performing statistical analysis on fab and E-test data, monitoring yield indicators, conducting root cause analyses, and developing process targeting strategies to optimize product performance and yield. Requires a Bachelor's degree in a relevant STEM field and experience in semiconductor industry, statistical data analysis, and root cause analysis.

This role focuses on validating Design for Test (DFT) for manufacturing functional testing and developing functional test content for Intel's next-generation CPU IP designs. The engineer will work with design, SOC, and manufacturing teams, using fault simulators to measure coverage, debug pre-silicon issues, and implement corrective measures.

Product Development Engineer (Contract) at Intel Manufacturing and Product Engineering (MPE) in Malaysia. Responsibilities include evaluating and debugging new test programs, resolving product manufacturability issues, performing data analysis to improve test coverage and yield, and developing support software for test program validation. Requires a Bachelor/Master's degree in relevant engineering or computer science fields with 1-3 years of experience. PERL and object-oriented programming skills are a plus.

Develops cloud and hybrid-cloud applications using frameworks from internal and external cloud providers like Amazon Web Services, Google Cloud, and Azure. Architects and coordinates cloud solutions across areas such as application development, identity and access management, network and data management, and security. Defines and implements DevSecOps solutions, linking them to cloud platforms and ensuring adherence to security standards. Drives the implementation of DevOps processes, automation, and culture for application deployment and infrastructure maintenance. Builds and designs web services in the cloud while orchestrating and automating cloud-based platforms. Develops responsive frontend interfaces for applications that run on mobile and PC form factors utilizing technologies like HTML5, TypeScript, and JavaScript frameworks (React, Angular, Bootstrap). Troubleshoots and resolves technical issues, identifies root causes, and implements preventive measures to ensure high application performance and scalability. Educates and mentors multidisciplinary teams on cloud-based solutions and best practices, fostering collaboration and technical growth. Defines and documents strategies for infrastructure maintenance and application deployment, ensuring alignment with company guidelines.

Internship role focused on developing and enhancing middleware software components for Intel's platforms, involving API design, performance tuning, and open-source contributions. Requires a Bachelor's or Master's degree in Computer Science or related field, proficiency in C/C++, and familiarity with open-source technologies.

Supply Chain Engineer role focused on optimizing Intel's supply chain strategy and tactical processes, defining next-generation methodology capabilities, and exploring emerging technologies. Responsibilities include supporting management in implementing alternate/localize parts projects, collaborating on supply-demand trends, driving supplier selection, performing risk mitigation, establishing control standards, managing part change control, and managing strategic supply chain programs.

Senior Logic Design Verification Engineer at Intel in Malaysia, focusing on Power Management Controller IP (PMC). Responsibilities include defining and developing verification testbenches, building RTL models, validating architectural features, and resolving RTL test failures. Requires extensive experience with UVM and System Verilog.

This role focuses on developing, executing, and automating Bluetooth and Wi-Fi connectivity tests for hardware and software products. It involves creating validation environments, identifying and reporting issues, developing test plans, and collaborating with cross-functional teams. The role requires experience with test automation (Python) and network protocol analyzers, with a mention of integrating Gen AI Agents into validation tasks.

Seeking a SoC Debug / Post-Silicon PnP Validation Engineer to perform power and performance validation, low-level debug, and complex analysis at the SoC level for Intel products. Responsibilities include developing DFD tools, automation scripts, root cause analysis, and collaborating with cross-functional teams.

This role focuses on the development and optimization of analog and RF test methodologies for Intel's semiconductor products. Responsibilities include designing test boards, developing software for test equipment, debugging functionality and performance issues, and releasing production test solutions to ensure product quality and yield. The role requires expertise in RF design and test, ATE testing, and electrical simulation tools.

This role is for a Module Equipment Technician at Intel, responsible for maintaining and troubleshooting manufacturing equipment in a semiconductor fabrication environment. The position involves performing electrical and mechanical repairs, conducting preventative maintenance, analyzing equipment data, and collaborating with engineering teams to ensure optimal equipment performance and support production ramps. It is a hands-on role focused on operational efficiency and reliability within Intel's manufacturing processes.

This role is for a Module Equipment Technician in semiconductor manufacturing, responsible for maintaining and troubleshooting manufacturing equipment. It involves electrical and mechanical troubleshooting, equipment repair, calibration, and preventative maintenance. The role supports engineers in data collection and experiments to improve tool performance. It requires technical certifications or related experience in equipment maintenance.

Senior Physical Design Engineer for CPU Core IP at Intel, focusing on synthesis, place and route, and design closure for high-speed processors. Requires extensive experience in integrated circuit design tools and methodologies.

This role is for a Defect Review Technician in Intel's Advanced Packaging Command Center (APCC). The technician will be responsible for classifying, validating, and disposing of defects identified by inspection systems in a semiconductor manufacturing environment. The goal is to minimize defect noise, drive defect reduction, and maintain quality control and manufacturing efficiency.

This role focuses on Supply Chain IT Systems and Tools, requiring expertise in Sourcing, Procurement, EDI, B2B protocols, and SAP MM/IM. The analyst will identify business requirements, configure systems, perform testing, analyze business procedures, design new systems, troubleshoot issues, and manage projects. Experience with Agile and SaFE methodologies is also needed.

Intel is seeking a Security Software Development Engineer to validate TDX (Trusted Domain Extensions), a technology for confidential computing. The role involves validating across the stack (firmware, OS, drivers, middleware, SDKs, apps), building frameworks and automation, and operating at the intersection of security, virtualization, and cloud. Requires 5-7 years of software/hardware validation or verification experience and coding proficiency in C, C++, or Java.

Staff SOC DFT Engineer responsible for the testability, debuggability, and reliability of complex SoC designs. This role involves developing DFT methodologies, optimizing workflows with AI, and enhancing post-silicon efficiency. The engineer will collaborate with cross-functional teams and ensure products meet quality standards.

Develops and supports advanced assembly processes and equipment for next-generation substrate packaging technologies, applying statistical analysis and data-driven methodologies to improve quality, reliability, process capability, manufacturing efficiency, and cost. Troubleshoots packaging and manufacturing issues using engineering principles and analytical problem-solving techniques.

Facilities Electrical Engineer responsible for the analysis, design, and maintenance of electrical systems in a manufacturing environment, ensuring performance, safety, and reliability.

Commodity Manager role at Intel focused on global supply chain strategy for semiconductor manufacturing equipment. Responsibilities include contract negotiation, supplier management, market analysis, and developing commodity strategies to ensure cost, quality, and availability of materials and services. Requires experience in supply chain management and negotiation, with preferred experience in the semiconductor industry and AI tools for efficiency.

Engineering Manager role focused on process integration, yield improvement, and defect reduction in advanced semiconductor packaging manufacturing. Requires collaboration with various engineering teams to optimize manufacturing performance and develop scalable solutions. Involves leading a team, developing roadmaps, and implementing monitoring systems.

This role involves designing, developing, and implementing analog circuits for advanced process nodes, optimizing circuit floorplans, simulating analog behavior models, and developing/executing test plans to ensure designs meet specifications. The engineer will evaluate test results, verify circuit functionality, and collaborate with cross-functional teams to resolve design challenges. Research into industry trends and innovations in analog and mixed-signal design is also a key responsibility.

This role focuses on the design, development, and optimization of analog circuits for advanced process nodes within Intel's Central Engineering Group. The engineer will work on analog and mixed-signal IPs, create floorplans, simulate behavior models, develop and execute test plans, analyze test results, and optimize circuits for performance, power, area, and leakage. Collaboration with cross-functional teams and staying informed on emerging trends in analog circuit design are also key aspects of the role. The position requires a Bachelor's or BS degree in Electrical Engineering with 0-1+ years of experience, or a Master's degree with 0 years of experience, and proficiency in circuit simulation tools and analog circuit design principles.

This role focuses on the research and development of next-generation Power Delivery IPs for Intel's AI and Datacenter Products. The researcher will work on analog, mixed-signal, and digital circuit technologies to achieve industry-leading performance and efficiency in advanced process nodes. Responsibilities include developing innovative power delivery techniques, designing new IPs, conducting circuit analysis and simulation, and collaborating with engineering teams and external partners. The role requires a PhD in Electrical Engineering with specialization in power delivery and expertise in analog electronics and semiconductor device physics.

Senior Process Engineer role at Intel in Ireland, focusing on semiconductor manufacturing process optimization, yield improvement, and data-driven problem-solving within a high-technology fab environment. Requires 5+ years of experience in semiconductor manufacturing and expertise in specific process areas.

This role focuses on the design, development, and verification of analog and mixed-signal integrated circuits (IPs) for advanced process nodes at Intel. The engineer will be responsible for circuit design, simulation, test plan development, result analysis, and optimization to meet power, performance, area, and yield goals, collaborating with cross-functional teams.